CN113224940B - Control method, control circuit and PFC circuit - Google Patents
Control method, control circuit and PFC circuit Download PDFInfo
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- CN113224940B CN113224940B CN202110485369.6A CN202110485369A CN113224940B CN 113224940 B CN113224940 B CN 113224940B CN 202110485369 A CN202110485369 A CN 202110485369A CN 113224940 B CN113224940 B CN 113224940B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
- H02M1/4208—Arrangements for improving power factor of AC input
- H02M1/4225—Arrangements for improving power factor of AC input using a non-isolated boost converter
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
- H02M1/4208—Arrangements for improving power factor of AC input
- H02M1/4216—Arrangements for improving power factor of AC input operating from a three-phase input voltage
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
- H02M3/1584—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load with a plurality of power processing stages connected in parallel
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The invention discloses a control method, a control circuit and a PFC circuit. Wherein, the method comprises the following steps: determining the conduction time of each single-phase circuit in a total switching period according to the phase number of the PFC circuit; determining a delay compensation coefficient according to the conduction time of the single-phase circuit; and carrying out current loop control according to the delay compensation coefficient. The invention can compensate the lag generated by the switch delay effect and improve the accuracy of the control of the PFC circuit.
Description
Technical Field
The invention relates to the technical field of electronic power, in particular to a control method, a control circuit and a PFC circuit.
Background
The PFC (power factor correction) technology plays an important role in the field of power electronics, has a boosting function, and can correct the power factor and improve the quality of input current electric energy. With the improvement of the unit capacity and the national harmonic standard, the inductance value of the PFC increases, which causes serious heating of the driving board, and the conventional one-way or two-way interleaved PFC cannot meet the requirement. Because the multi-path interleaved PFC circuit is different from a single path or a double path, the control difficulty is complex, the control strategy setting difficulty is higher, and because the multi-path switches of the PFC circuit are alternately turned on, a delay effect is generated, so that the regulation is delayed.
Aiming at the problem that in the prior art, the adjustment lag is caused by the delay effect generated by the alternate opening of the multi-way switches of the PFC circuit, an effective solution is not provided at present.
Disclosure of Invention
The embodiment of the invention provides a control method, a control circuit and a PFC circuit, and aims to solve the problem that in the prior art, the adjustment lag is caused by a delay effect caused by the alternate opening of multiple switches of the PFC circuit.
In order to solve the above technical problem, the present invention provides a control method, applied to a PFC circuit, the method including: determining the conduction time of each single-phase circuit in a total switching period according to the phase number of the PFC circuit; determining a delay compensation coefficient according to the conduction time of the single-phase circuit; and carrying out current loop control according to the delay compensation coefficient.
Further, the conduction duration of each single-phase circuit in a total switching period is determined according to the number of phases of the PFC circuit, and the formula is as follows:
T＝T1/N；
wherein, T is the on-time of the single-phase circuit, T1 is the total switching period, and N is the number of phases of the PFC circuit.
Further, the shorter the conduction time of the single-phase circuit is, the larger the delay compensation coefficient is.
Further, a delay compensation coefficient is determined according to the conduction time of the single-phase circuit, and the formula is as follows:
K＝e-Ts；
and K is a delay compensation coefficient, e is the base number of a natural logarithm, T is the conduction duration of the single-phase circuit, and s is a Laplace operator.
Further, the current loop control according to the delay compensation coefficient includes:
inputting the difference between the instruction current and the current loop output current to a current loop PI regulator;
multiplying the voltage output by the current loop PI regulator by the delay compensation coefficient to obtain a compensated voltage;
and calculating according to the compensated voltage, and obtaining the current loop output current again until the current loop output current is equal to the instruction current.
Further, calculating according to the compensated voltage to obtain the current loop output current again, wherein the formula is as follows:
wherein i0For the current loop output current u1For the compensated voltage, L is the inductance value of the currently conducting single-phase circuit, and s is the laplacian operator.
Further, the method further comprises:
and performing voltage loop control according to the command voltage and the output voltage of the voltage loop.
Further, voltage loop control is performed according to the command voltage and the output voltage of the voltage loop, including:
inputting the difference between the instruction voltage and the voltage output by the voltage loop into a voltage loop PI regulator to generate an instruction current controlled by a current loop;
and calculating according to the current loop output current, and obtaining the voltage loop output voltage again until the voltage loop output voltage is equal to the instruction voltage.
Further, the calculation is carried out according to the current loop output current, and the voltage loop output voltage is obtained again according to the following formula:
wherein u is0For the voltage loop output voltage i0And C is the total capacitance of the PFC circuit, and s is a Laplace operator.
The invention also provides a control circuit, which is applied to a PFC circuit, and comprises:
the first determining module is used for determining the conducting time of each single-phase circuit in a total switching period according to the phase number of the PFC circuit;
the second determining module is used for determining a delay compensation coefficient according to the conduction time of the single-phase circuit;
and the first control module is used for carrying out current loop control according to the delay compensation coefficient.
The invention also provides a PFC circuit, which comprises at least two single-phase circuits and the control circuit.
The present invention also provides a computer-readable storage medium having stored thereon a computer program which, when executed by a processor, implements the above-described control method.
By applying the technical scheme of the invention, the conduction time T of the single-phase circuit in a total switching period T1 is determined according to the phase number N of the PFC circuit, and then the delay compensation coefficient is determined according to the conduction time of the single-phase circuit, so that the delay generated by the switching delay effect can be compensated, and the control accuracy of the PFC circuit is improved.
Drawings
Fig. 1 is a block diagram of a PFC circuit according to an embodiment of the present invention;
FIG. 2 is a waveform of a driving signal of a switch of a single-phase circuit according to an embodiment of the present invention;
FIG. 3 is a flow chart of a control method according to an embodiment of the invention;
FIG. 4 is a block diagram of a current loop control according to an embodiment of the present invention;
FIG. 5 is a current pattern of a first phase circuit when conducting according to an embodiment of the present invention;
fig. 6 is a current pattern of a second phase circuit in a conducting state according to an embodiment of the present invention;
FIG. 7 is a current pattern of a third phase circuit when conducting according to an embodiment of the present invention;
fig. 8 is an equivalent circuit diagram of a PFC circuit according to an embodiment of the present invention;
FIG. 9 is a block diagram of a voltage loop control according to an embodiment of the present invention;
FIG. 10 is a block diagram of a control circuit according to an embodiment of the present invention;
fig. 11 is a block diagram of a control circuit according to another embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the present invention will be described in further detail with reference to the accompanying drawings, and it is apparent that the described embodiments are only a part of the embodiments of the present invention, not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The terminology used in the embodiments of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the examples of the present invention and the appended claims, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise, and "a plurality" typically includes at least two.
It should be understood that the term "and/or" as used herein is merely one type of association that describes an associated object, meaning that three relationships may exist, e.g., a and/or B may mean: a exists alone, A and B exist simultaneously, and B exists alone. In addition, the character "/" herein generally indicates that the former and latter related objects are in an "or" relationship.
It should be understood that although the terms first, second, etc. may be used to describe determination modules in embodiments of the present invention, these determination modules should not be limited by these terms. These terms are only used to distinguish one determination module from another. For example, the first determining module may also be referred to as the second determining module, and similarly, the second determining module may also be referred to as the first determining module, without departing from the scope of the embodiments of the present invention.
The words "if", as used herein, may be interpreted as "at … …" or "at … …" or "in response to a determination" or "in response to a detection", depending on the context. Similarly, the phrases "if determined" or "if detected (a stated condition or event)" may be interpreted as "when determined" or "in response to a determination" or "when detected (a stated condition or event)" or "in response to a detection (a stated condition or event)", depending on the context.
It is also noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that an article or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such article or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in the article or device in which the element is included.
Alternative embodiments of the present invention are described in detail below with reference to the accompanying drawings.
Example 1
The present embodiment provides a control method applied to a PFC circuit, and fig. 1 is a structural diagram of the PFC circuit according to an embodiment of the present invention, as shown in fig. 1, the PFC circuit includes:
and the inductors are respectively arranged in each single-phase circuit, the inductance values of the inductors are respectively L1, L2 and L3, each single-phase circuit is respectively provided with a bus capacitor, and the capacitance values are respectively C1, C2 and C3. u. ofiU is the input voltage of the PFC circuit, and u is the output voltage of the PFC circuit. The three-phase circuit is characterized in that i1, i2 and i3 are respectively a first-phase input current, a second-phase input current and a third-phase input current, i is a main-circuit current, a diode D1, a diode D2 and a diode D3 are respectively arranged in the three-phase circuit and used for preventing the voltage of a bus from being fed back, and a first switch Q1, a second switch Q2 and a third switch Q3 are respectively arranged in the three-phase circuit. The values of L1, L2, and L3 may be equal or unequal, and the values of C1, C2, and C3 may be equal or unequal.
The first switch Q1, the second switch Q2 and the third switch Q3 may be IGBT switch tubes, fig. 2 shows the waveforms of the driving signals of the switches of the single-phase circuit according to the embodiment of the invention, as shown in fig. 2, the driving signals are high level, the IGBT switch tubes are turned on, and the input voltage u isiAn inductor in the PFC circuit is charged, and the load is powered by a bus capacitor. At low level, the IGBT switch tube is cut off, and the input voltage uiThe inductor of the PFC circuit and the three bus capacitors are simultaneously supplied with energy, and the load still obtains energy from the buses.
Fig. 3 is a flowchart of a control method according to an embodiment of the present invention, and as shown in fig. 3, the control method includes:
s101, determining the conduction duration of each single-phase circuit in a total switching period according to the number of phases of the PFC circuit.
The total switching period is the total time required for conducting all the single-phase circuits once, the conducting time of the single-phase circuits refers to the conducting time of the switch in each phase circuit, and the conducting time of the switches in each single-phase circuit is equal in one total switching period.
And S102, determining a delay compensation coefficient according to the conduction time of the single-phase circuit.
In the prior art, a plurality of paths of PFC circuits exist, but in a control method, the delay effect of a switch is not considered, so that the problem of regulation lag exists. In this embodiment, in the multi-path PFC circuit, if the number of phases is greater, the number of switches is greater, and the conduction time of the single-phase circuit is shorter, the delay effect of the switches is more obvious, and the compensation amount for compensating the delay effect of the switches is greater, so that the delay compensation coefficient needs to be determined according to the conduction time of the single-phase circuit.
And S103, carrying out current loop control according to the delay compensation coefficient.
According to the control method, firstly, the conduction time of each single-phase circuit in a total switching period is determined according to the phase number N of the PFC circuit, and then the delay compensation coefficient is determined according to the conduction time of the single-phase circuit, so that the delay generated by the switching delay effect can be compensated, and the accuracy of the control of the PFC circuit is improved.
Example 2
In this embodiment, according to the above description, in one total switching period T1, the on-time periods of the switches in the phase circuits are all equal, and in order to accurately determine the on-time period of the single-phase circuit, the above step S101 is executed according to the following formula: t is T1/N; wherein, T is the conduction duration of the single-phase circuit, T1 is the total switching period, and N is the phase number of the PFC circuit.
The shorter the conduction time of the single-phase circuit is, that is, the shorter the conduction time of each switch is, it indicates that the more the number of phases of the PFC circuit is, the more the number of switches is, and thus the more the delay effect is, the larger the amount to be compensated is, and therefore, the relationship between the delay compensation coefficient and the conduction time of the single-phase circuit satisfies: the shorter the conduction time of the single-phase circuit is, the larger the delay compensation coefficient is.
In specific implementation, the delay compensation coefficient can be determined by constructing a functional relationship between the delay compensation coefficient and the conduction time of the single-phase circuit, and a specific formula can be as follows: k ═ e-Ts(ii) a K is a delay compensation coefficient, e is the base number of a natural logarithm, T is the conduction duration of the single-phase circuit, and s is a Laplace operator.
It should be noted that the formula of the present invention is not limited to the above one, and those skilled in the art can construct a corresponding formula according to actual situations, as long as the requirement that the delay compensation coefficient is negatively correlated with the conduction time of the single-phase circuit is satisfied, that is, the shorter the conduction time of the single-phase circuit is, the larger the delay compensation coefficient is.
Fig. 4 is a block diagram of a current loop control according to an embodiment of the present invention, and as shown in fig. 4, the current loop control according to the delay compensation coefficient includes:
will command current i*The difference is made with the current loop output current i and then the current loop output current i is input into a current loop PI regulator; current loop PI regulator based on internal transfer function
Performing operation to output a voltage, multiplying the voltage output by the current loop PI regulator by the delay compensation coefficient K to obtain a compensated voltage u1(ii) a According to the compensated voltage u1And calculating to obtain the current loop output current again until the current loop output current is equal to the instruction current. Wherein, according to the compensated voltage u1Calculating to obtain the output current of the current loop again according to the formula:
wherein i0For current loop output current u1For the compensated voltage, L is the inductance value of the currently conducting single-phase circuit, and s is the laplacian operator.
It should be noted that, since the control of the current loop is a loop control, an initial current is required to trigger the loop, and the current in the initial state is obtained by sampling the PFC circuit.
Fig. 5 is a current pattern of a first phase circuit when conducting according to an embodiment of the present invention, fig. 6 is a current pattern of a second phase circuit when conducting according to an embodiment of the present invention, fig. 7 is a current pattern of a third phase circuit when conducting according to an embodiment of the present invention, fig. 8 is an equivalent circuit diagram of a PFC circuit according to an embodiment of the present invention, and arrows represent paths and directions of current flow.
As can be seen from fig. 8, during one switching cycle, the three-phase PFC can be equivalent to a single-phase PFC circuit, where the inductance L is the inductance of the currently turned-on single-phase circuit. The derivation process of the above formula is specifically as follows:
for the PFC circuit described above, the following equation holds:
wherein u isiIs the input voltage of the PFC circuit, u is the output voltage of the PFC circuit, L is the inductance value of the currently conducting single-phase circuit,
the derivative obtained is the derivative of the current with respect to time.
The laplace transform is performed on equation (1) to obtain:
when the time-domain function f (t) is subjected to complex frequency-domain transformation, let s be δ + j ω, where a real part δ of s represents the attenuation or divergence degree of the time-domain function f (t), ω is an imaginary part of the laplacian s, which represents the oscillation degree thereof, and j is a coefficient of the imaginary part, then the laplacian equation of the complex frequency domain is:
f(s) is a complex frequency domain function, s is the minimum unit of a time domain function f (t) in a complex frequency domain and is defined as a Laplace operator, e is the base number of a natural logarithm, t is time, t is0Is the upper time limit.
From the above equation (2), the compensated voltage u1Calculating to obtain the output current of the current loop again according to the formula:
the PI regulator is selected to perform feedforward compensation correction on the current loop, considering that the control of the current loop is related to the system stability, and therefore, considering the delay effect of the switch in the single-phase circuit thereof, the control block diagram of the current loop thereof is shown in fig. 4 mentioned above. The current loop control principle is as follows: the instruction current i generated by the voltage loop PI regulator and the current loop output current i0Taking difference, inputting the difference into a current loop PI regulator, multiplying the voltage output by the current loop PI regulator by a delay compensation coefficient e-TsThen, the current needed to act on the actual inductor is obtained through calculation, which is a period of the control algorithm, and the steps are repeated in a circulating mode until the reference value i of the current loop and the output current i of the current loop are given0And the output current value can keep up with the change of the instruction current value, so that the quick control is realized.
In order to realize the double-loop control of the voltage and the current, the control method further comprises the following steps: and performing voltage loop control according to the command voltage and the voltage output by the voltage control loop.
Fig. 9 is a block diagram of voltage loop control according to an embodiment of the present invention, and as shown in fig. 9, the voltage loop control according to the command voltage and the voltage output by the voltage control loop includes:
the difference between the instruction voltage and the output voltage of the voltage loop is input to a voltage loop PI regulator, and the voltage loop PI regulator performs a transfer function according to the internal voltage loop PI regulator
Performing operation to generate an instruction current controlled by a current loop; and calculating according to the current loop output current, and obtaining the voltage loop output voltage again until the voltage loop output voltage is equal to the instruction voltage. Calculating according to the current loop output current, and obtaining the voltage loop output voltage again according to the following formula:
wherein u is0For the voltage ring output voltage, i0The current output by the voltage loop PI regulator, C is the total capacitance of the PFC circuit, and s is the Laplace calculationAnd (4) adding the active ingredients.
As shown in fig. 8 mentioned above, for the bus capacitance, the following formula holds:
wherein i1I is the input current of the PFC circuit, i is the output current of the PFC circuit, C is the total current of the PFC circuit,
the derivative obtained is the voltage derivative over time.
Laplace transform of formula (3) yields:
taking a three-phase PFC circuit as an example, in the above formula, the calculation formula of C is as follows:
C＝C1+C2+C3 (5)。
the voltage loop output voltage can be obtained through the formula (4), the calculation is carried out according to the current loop output current, and the voltage loop output voltage is obtained again according to the following formula:
the PI regulator is selected to perform feedforward correction on the voltage loop, the control block diagram of the voltage loop is shown in the above mentioned FIG. 9, and the voltage loop control principle is as follows: firstly, a voltage ring reference value u is given, the difference value is made with the voltage ring output voltage, the difference value is input into a PI regulator to generate a command current i of a current ring, and the current i is output after the command current i passes through the current ring0Calculating and outputting the current i0The voltage u generated by acting on a capacitor in the actual circuit0. This is a cycle of the control algorithm, which is repeated until the voltage loop reference value u and the voltage loop output voltage u are given0Are equal.
It should be noted that, since the control of the voltage loop is a loop control, an initial voltage is required to trigger the loop, and the output voltage of the PFC circuit is sampled and obtained in an initial state.
Example 3
The present embodiment provides a control circuit applied to a PFC circuit, and fig. 10 is a structural diagram of the control circuit according to the embodiment of the present invention, as shown in fig. 10, the control circuit includes:
the first determining module 10 is configured to determine, according to the number of phases of the PFC circuit, a conduction duration T of the single-phase circuit in a total switching period T1.
The total switching period T1 is a total required time for turning on all the single-phase circuits once, and the on-time T of the single-phase circuit refers to the on-time of the switch in each phase circuit, where the on-time of the switches in each single-phase circuit is equal in one total switching period T1.
And a second determining module 20, configured to determine a delay compensation coefficient according to the conduction time of the single-phase circuit.
In the prior art, a plurality of paths of PFC circuits exist, but in a control method of the PFC circuit, the delay effect of a switch is not considered, and the problem of regulation hysteresis exists. In this embodiment, in the multi-path PFC circuit, if the number of phases is larger, the number of switches is larger, and the conduction time period T of the single-phase circuit is shorter, the delay effect of the switches is more obvious, and the compensation amount for compensating the delay effect of the switches is larger, so that the delay compensation coefficient needs to be determined according to the conduction time period T of the single-phase circuit.
And the first control module 30 is configured to perform current loop control according to the delay compensation coefficient.
In the control circuit of the embodiment, the first determining module 10 determines the conduction time T of the single-phase circuit in a total switching period T1 according to the phase number N of the PFC circuit, and then the second determining module 20 determines the delay compensation coefficient according to the conduction time of the single-phase circuit, so that the delay caused by the switching delay effect can be compensated, and the accuracy of the control of the PFC circuit is improved.
Example 4
In this embodiment, another control circuit is provided, and fig. 11 is a structural diagram of a control circuit according to another embodiment of the present invention, as shown in fig. 11, the first control module 30 includes: the first control unit 301 is configured to input a difference between the instruction current and the current loop output current to the current loop PI regulator; a first calculating unit 302, configured to multiply a voltage output by the current loop PI regulator by a delay compensation coefficient to obtain a compensated voltage; and a second calculating unit 303, configured to perform calculation according to the compensated voltage, and obtain the current loop output current again.
In order to implement dual-loop control, the control circuit further includes: and the second control module 40 is used for performing voltage loop control according to the instruction voltage and the output voltage of the voltage loop. Specifically, the second control module 40 includes: a second control unit 401, configured to input a difference between the command voltage and the voltage output by the voltage loop to the voltage loop PI regulator, and generate a command current for current loop control; and a third calculating unit 402, configured to calculate according to the current loop output current, and obtain the voltage loop output voltage again.
Example 5
The embodiment provides a PFC circuit, which includes the above control circuit, and is configured to compensate for switching delay, and improve control accuracy, thereby improving performance of the entire PFC circuit.
Example 6
The present embodiment provides a computer-readable storage medium on which a computer program is stored, which when executed by a processor implements the control method in the above-described embodiments.
The above-described embodiments of the control circuit are merely illustrative, and the units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
Through the above description of the embodiments, those skilled in the art will clearly understand that each embodiment can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware. With this understanding in mind, the above-described technical solutions may be embodied in the form of a software product, which can be stored in a computer-readable storage medium such as ROM/RAM, magnetic disk, optical disk, etc., and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the methods described in the embodiments or some parts of the embodiments.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (11)
1. A control method is applied to a Power Factor Correction (PFC) circuit and is characterized by comprising the following steps:
determining the conduction time of each single-phase circuit in a total switching period according to the phase number of the PFC circuit;
determining a delay compensation coefficient according to the conduction time of the single-phase circuit; the shorter the conduction time of the single-phase circuit is, the larger the delay compensation coefficient is;
and carrying out current loop control according to the delay compensation coefficient.
2. The method of claim 1, wherein the on-time of each single-phase circuit in a total switching period is determined based on the number of phases of the PFC circuit according to the formula:
T＝T1/N；
wherein, T is the on-time of the single-phase circuit, T1 is the total switching period, and N is the number of phases of the PFC circuit.
3. The method of claim 1, wherein the delay compensation factor is determined based on a conduction duration of the single-phase circuit according to the formula:
K＝e-Ts；
and K is a delay compensation coefficient, e is the base number of a natural logarithm, T is the conduction duration of the single-phase circuit, and s is a Laplace operator.
4. The method of claim 1, wherein performing current loop control based on the delay compensation factor comprises:
inputting the difference between the instruction current and the current loop output current to a current loop PI regulator;
multiplying the voltage output by the current loop PI regulator by the delay compensation coefficient to obtain a compensated voltage;
and calculating according to the compensated voltage, and obtaining the current loop output current again until the current loop output current is equal to the instruction current.
5. The method of claim 4, wherein the current loop output current is recovered by performing a calculation based on the compensated voltage according to the formula:
wherein i0For the current loop output current u1For the compensated voltage, L is the inductance value of the currently conducting single-phase circuit, and s is the laplacian operator.
6. The method of claim 1, further comprising:
and performing voltage loop control according to the command voltage and the output voltage of the voltage loop.
7. The method of claim 6, wherein performing voltage loop control based on the command voltage and the output voltage of the voltage loop comprises:
inputting the difference between the instruction voltage and the voltage output by the voltage loop into a voltage loop PI regulator to generate an instruction current controlled by a current loop;
and calculating according to the current loop output current, and obtaining the voltage loop output voltage again until the voltage loop output voltage is equal to the instruction voltage.
8. The method of claim 7, wherein the voltage loop output voltage is recovered by performing a calculation based on the current loop output current according to the formula:
wherein u is0For the voltage loop output voltage i0And C is the total capacitance of the PFC circuit, and s is a Laplace operator.
9. A control circuit applied to a Power Factor Correction (PFC) circuit is characterized by comprising:
the first determining module is used for determining the conducting time of each single-phase circuit in a total switching period according to the phase number of the PFC circuit;
the second determining module is used for determining a delay compensation coefficient according to the conduction time of the single-phase circuit; the shorter the conduction time of the single-phase circuit is, the larger the delay compensation coefficient is;
and the first control module is used for carrying out current loop control according to the delay compensation coefficient.
10. A PFC circuit comprising at least two single-phase circuits, further comprising the control circuit of claim 9.
11. A computer-readable storage medium, on which a computer program is stored, which program, when being executed by a processor, carries out the method according to any one of claims 1 to 8.
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