CN113224735A - Interface protection circuit and interface circuit with same - Google Patents
Interface protection circuit and interface circuit with same Download PDFInfo
- Publication number
- CN113224735A CN113224735A CN202010072261.XA CN202010072261A CN113224735A CN 113224735 A CN113224735 A CN 113224735A CN 202010072261 A CN202010072261 A CN 202010072261A CN 113224735 A CN113224735 A CN 113224735A
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- Prior art keywords
- interface
- module
- protection
- protection circuit
- circuit
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
- H02H9/02—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess current
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
- H02H3/20—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess voltage
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/14—Arrangements for reducing ripples from dc input or output
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/44—Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Electromagnetism (AREA)
- Emergency Protection Circuit Devices (AREA)
Abstract
The invention provides an interface protection circuit and an interface circuit with the same. The interface protection circuit is used for being electrically connected to an interface and comprises a power supply module and a protection module, one end of the protection module is electrically connected to the power supply module, the other end of the protection module is electrically connected to the interface, when the power supply module is electrified, the power supply module generates instantaneous current, the protection module receives the instantaneous current, carries out current limiting processing on the instantaneous current and then outputs the instantaneous current to the interface, and therefore the protection module is prevented from outputting overhigh instantaneous current. The interface protection circuit and the interface circuit with the interface protection circuit effectively reduce transient current impact of an interface, thereby reducing the risk of fusing of an interface circuit.
Description
Technical Field
The invention relates to an interface protection circuit and an interface circuit with the same.
Background
At present, in the circuit design of Display Port (DP), it often happens that some signals are subjected to excessive current instantaneously, which causes the aging and even burning of signal lines and stroboflash of Display, affecting the service life of the DP interface.
Disclosure of Invention
The present invention provides an interface protection circuit for reducing transient current impact of an interface and an interface circuit having the same.
An interface protection circuit is used for being electrically connected to an interface and comprises a power supply module and a protection module, wherein one end of the protection module is electrically connected to the power supply module, the other end of the protection module is electrically connected to the interface, when the power supply module is electrified, the power supply module generates an instantaneous current, the protection module receives the instantaneous current, carries out current limiting processing on the instantaneous current and then outputs the instantaneous current to the interface, and therefore the protection module is prevented from outputting overhigh instantaneous current.
Furthermore, the internal resistance value interval of the protection module is 17500-26500 ohms, so that the current output to the interface by the protection module is reduced.
Further, the protection module comprises a signal input end and a signal output end, the signal input end is electrically connected to the power supply module, and the signal output end is electrically connected to the interface; and when the voltage of the signal output end is higher than the threshold voltage of the protection module, the protection module is automatically disconnected.
Furthermore, the interface protection circuit further comprises a first filter element and a second filter element, wherein one end of the first filter element is electrically connected with the power supply module, and the other end of the first filter element is grounded; one end of the second filter element is electrically connected with the protection module, and the other end of the second filter element is grounded.
Further, the first filter element and the second filter element are both capacitors.
Furthermore, the interface protection circuit further comprises a first anti-interference element and a second anti-interference element, one end of the first anti-interference element and one end of the second anti-interference element are connected in parallel to the interface, and the other end of the first anti-interference element and the other end of the second anti-interference element are grounded.
Further, the first anti-jamming element and the second anti-jamming element are both resistors.
In another aspect, the present invention further provides an interface circuit, which includes the interface protection circuit and an interface as described in any one of the above embodiments, wherein the interface protection circuit is electrically connected to the interface.
Further, the interface is a display interface.
The interface protection circuit provided by the invention effectively reduces the instantaneous current of the interface, thereby reducing the risk of fusing the interface circuit, prolonging the service life of the interface and further achieving the purpose of protecting hardware equipment connected with the interface. The interface provided by the invention comprises the interface protection circuit, so that the risk of fusing the interface is reduced.
Drawings
Fig. 1 is a functional block diagram of an interface circuit with an interface protection circuit according to a preferred embodiment of the present invention.
Fig. 2 is a circuit diagram of the interface circuit shown in fig. 1.
Fig. 3 is a current test chart of the interface protection circuit shown in fig. 1 outputting to the DP interface.
Description of the main elements
The following detailed description will further illustrate the invention in conjunction with the above-described figures.
Detailed Description
It will be understood that when an element is referred to as being "electrically connected" to another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "electrically connected" to another element, it can be connected by contact, e.g., by wires, or by contactless connection, e.g., by contactless coupling.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.
Referring to fig. 1, the preferred embodiment of the present invention provides an interface protection circuit 100, wherein the interface protection circuit 100 is electrically connected to an interface 20 for reducing transient current impact of the interface 20. In the present embodiment, the interface 20 is taken as a Display Port (DP) for example. The interface 20 includes a power input pin V _ DPC _ PWR (see fig. 2).
Referring to fig. 2, the interface protection circuit 100 includes a power module 10 and a protection module 30. The protection module 30 has one end electrically connected to the power module 10 and the other end electrically connected to the interface 20. In this embodiment, the protection module 30 has a current limiting function, so as to reduce the impact of transient current on the interface 20.
In this embodiment, the power module 10 is a dc power source for outputting a power supply voltage to the protection module 30. The voltage value of the supply voltage may be 3.135-3.465 volts (V). In one embodiment, the voltage value of the supply voltage is 3.3V. The power module 10 may be a power supply or a power circuit, such as a chip or a circuit with a power supply function.
The protection module 30 is electrically connected to the power module 10. When the power module 10 is powered on, the power module 10 will generate a transient current. The protection module 30 receives the instantaneous current, performs current limiting processing on the instantaneous current, and outputs the current to the interface 20, so as to prevent the protection module 30 from outputting an excessively high instantaneous current.
In this embodiment, the protection module 30 includes a signal input terminal VIN, a signal output terminal VOUT, and a ground terminal GND. Wherein the signal input terminal VIN is electrically connected to the power module 10. The signal output terminal VOUT is connected to a current input pin V _ DPC _ PWR of the interface 20. The ground terminal GND is grounded.
In one embodiment, the protection module 30 may be a chip with model number APL 3534. The APL3534 chip is a chip with a current limiting function. In the present embodiment, the protection module 30 has a large internal resistance. Specifically, the internal resistance value interval is 17500-26500 ohms. In this way, when the power module 10 supplies power to the interface 20 and the protection module 30, since the total voltage of the power module 10 is unchanged, and the APL3534 chip has a larger internal resistance, the total current of the circuit composed of the power module 10, the protection module 30 and the interface 20 is reduced, so as to reduce the current output by the protection module 30, and the protection module 30 plays a role of current limiting when the interface protection circuit 100 is connected to the interface 20.
It can be understood that, since the protection module 30 is a chip with model number APL3534, an NMOS transistor is integrated in the APL3534 chip. Therefore, the protection module 30 also has an overvoltage protection function. When the protection module 30 is powered on with the interface 20 and the power module 10 generates an abnormal voltage, the voltage of the signal input terminal VIN of the protection module 30 is higher than the threshold voltage of the protection module 30. In this way, the NMOS transistor in the protection module 30 is triggered to turn off, so that the protection module 30 is automatically turned off, and the interface 20 is prevented from being damaged due to the excessive voltage. When the voltage of the power module 10 is recovered to normal, the voltage of the signal input terminal VIN of the protection module 30 is lower than the threshold voltage of the protection module 30, so that the NMOS transistor is turned on, and the power module 10, the protection module 30 and the interface 20 are reconnected, so that the interface protection circuit 100 and the interface 20 operate normally without replacing the protection module 30.
It can be understood that, because the protection module 30 has a current limiting function, the problem of line aging and fusing of the interface 20 due to excessive instantaneous current can be effectively prevented. Since the protection module 30 has an output overvoltage protection function, the interface 20 can be effectively prevented from being damaged due to an excessively high voltage.
It is understood that in other embodiments, the interface protection circuit 100 further includes a first filter element and a second filter element. In one embodiment, the first filter element and the second filter element are both capacitors, such as a first capacitor C1 and a second capacitor C2. One end of the first capacitor C1 is electrically connected to the power module 10, and the other end is grounded. The first capacitor C1 is used to filter the current output by the power module 10, so that the current output by the power module 10 has less variation and more stable current peak value. Preferably, the capacitance value of the first capacitor C1 is 470 picofarads (pF).
One end of the second capacitor C2 is connected to the signal output terminal VOUT of the interface 20, and the other end is grounded. The second capacitor C2 is used to filter the current output by the signal output terminal VOUT, so that the current output by the signal output terminal VOUT has less variation and more stable current peak value. Preferably, the capacitance value of the second capacitor C2 is 2.2 microfarads (uF).
It is understood that in other embodiments, the interface protection circuit 100 further includes a first anti-jamming element and a second anti-jamming element. In one embodiment, the first anti-jamming element and the second anti-jamming element are resistors, such as a first resistor R1 and a second resistor R2. One end of the first resistor R1 and one end of the second resistor R2 are connected in parallel to the interface 20, and the other end of the first resistor R1 and the other end of the second resistor R2 are grounded.
Specifically, one end of the first resistor R1 is connected to the first signal pin V _ DPC _ RV64_ GND of the interface 20, and the other end is grounded. One end of the second resistor R2 is connected to the second signal pin V _ DPC _ HPD _ SINK of the interface 20, and the other end is grounded. The first resistor R1 and the second resistor R2 respectively enable the first signal pin V _ DPC _ RV64_ GND and the second signal pin V _ DPC _ HPD _ SINK to be maintained at a low level, so as to reduce interference to the interface 20. Preferably, the first resistor R1 has a resistance of 1 megaohm (M Ω), and the second resistor R2 has a resistance of 100 kiloohms (k Ω).
Referring to fig. 3, fig. 3 is a current test chart of the interface protection circuit 100 output to the DP interface 20. Wherein, the dotted line represents the current value outputted to the DP interface 20 when the protection module 30 is not set in the interface protection circuit 100; the point a on the dashed line represents the highest instantaneous current when the interface protection circuit 100 is not set to the protection module 30. The solid line represents the current value that the interface protection circuit 100 outputs to the DP interface 20 when it sets the protection module 30; the point b on the solid line represents the highest instantaneous current at which the interface protection circuit 100 sets the protection module 30. Obviously, comparing the point a on the dotted line and the point b on the solid line in fig. 3, it can be seen that, by arranging the protection module 30 between the power module 10 and the interface 20, the interface protection circuit 100 provided by the present invention can effectively reduce the instantaneous current generated when the DP interface 20 is powered on, compared with the conventional fuse, thereby reducing the risk of fusing and aging of the interface 20, and thus effectively protecting the DP interface and the device connected to the interface 20.
Further, the power module 10 is grounded through the first capacitor C1, and the signal output terminal VOUT of the protection module 30 is grounded through the second capacitor C2, so that the current flowing through the interface 20 is less varied and more stable. Further, the first signal pin V _ DPC _ RV64_ GND of the interface 20 is grounded through the first resistor R1, and the second signal pin V _ DPC _ HPD _ SINK of the interface 20 is grounded through the second resistor R2, so that interference of the interface 20 is reduced.
It is understood that in other embodiments, the Interface protection circuit 100 is not limited to be applied to the DP Interface 20, and the Interface protection circuit 100 may also be applied to other interfaces, such as an HDMI (High Definition Multimedia Interface) Interface, a bluetooth protection switch, and the like.
It is understood that the protection module 30 is not limited to the APL3534 chip. For example, the protection module 30 may also be other chips or circuits having a current limiting function.
It is understood that another aspect of the present invention further provides an interface circuit 200, where the interface circuit 200 includes the interface 20 and the interface protection circuit 100.
Finally, it should be noted that the above embodiments are only used for illustrating the technical solutions of the present invention and are not limited. It will be understood by those skilled in the art that various modifications and equivalent arrangements can be made without departing from the spirit and scope of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Claims (10)
1. An interface protection circuit for electrically connecting to an interface, the interface protection circuit comprising a power module, the interface protection circuit comprising: the interface protection circuit further comprises a protection module, one end of the protection module is electrically connected to the power supply module, the other end of the protection module is electrically connected to the interface, when the power supply module is powered on, the power supply module generates an instantaneous current, the protection module receives the instantaneous current, carries out current limiting processing on the instantaneous current and outputs the current to the interface, and therefore the protection module is prevented from outputting overhigh instantaneous current.
2. The interface protection circuit of claim 1, wherein: the internal resistance value interval of the protection module is 17500-26500 ohms, so that the current output to the interface by the protection module is reduced.
3. The interface protection circuit of claim 1, wherein: the protection module comprises a signal input end and a signal output end, the signal input end is electrically connected to the power supply module, and the signal output end is electrically connected to the interface; and when the voltage of the signal output end is higher than the threshold voltage of the protection module, the protection module is automatically disconnected.
4. The interface protection circuit of claim 1, wherein: the interface protection circuit further comprises a first filter element and a second filter element, wherein one end of the first filter element is electrically connected with the power supply module, and the other end of the first filter element is grounded; one end of the second filter element is electrically connected with the protection module, and the other end of the second filter element is grounded.
5. The interface protection circuit of claim 4, wherein: the first filter element and the second filter element are both capacitors.
6. The interface protection circuit of claim 1, wherein: the interface protection circuit further comprises a first anti-interference element and a second anti-interference element, one end of the first anti-interference element and one end of the second anti-interference element are connected to the interface in parallel, and the other end of the first anti-interference element and the other end of the second anti-interference element are grounded.
7. The interface protection circuit of claim 6, wherein: the first anti-jamming element and the second anti-jamming element are both resistors.
8. The interface protection circuit of claim 3, wherein: the protection module is a chip with model number APL 3534.
9. An interface circuit, characterized by: the interface circuit comprises the interface protection circuit of any one of claims 1-8 and an interface, the interface protection circuit being electrically connected to the interface.
10. The interface circuit of claim 9, wherein: the interface is a display interface.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202010072261.XA CN113224735A (en) | 2020-01-21 | 2020-01-21 | Interface protection circuit and interface circuit with same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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CN202010072261.XA CN113224735A (en) | 2020-01-21 | 2020-01-21 | Interface protection circuit and interface circuit with same |
Publications (1)
Publication Number | Publication Date |
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CN113224735A true CN113224735A (en) | 2021-08-06 |
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Family Applications (1)
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CN202010072261.XA Pending CN113224735A (en) | 2020-01-21 | 2020-01-21 | Interface protection circuit and interface circuit with same |
Country Status (1)
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CN (1) | CN113224735A (en) |
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2020
- 2020-01-21 CN CN202010072261.XA patent/CN113224735A/en active Pending
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