CN113224225A - LED display panel - Google Patents

LED display panel Download PDF

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Publication number
CN113224225A
CN113224225A CN202110498187.2A CN202110498187A CN113224225A CN 113224225 A CN113224225 A CN 113224225A CN 202110498187 A CN202110498187 A CN 202110498187A CN 113224225 A CN113224225 A CN 113224225A
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CN
China
Prior art keywords
metal layer
led
layer
display panel
leds
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Pending
Application number
CN202110498187.2A
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Chinese (zh)
Inventor
王婷
谢惠敏
林建南
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xiamen Institute Of Technology Xiamen Senior Technical School Xiamen Public Training Service Center For High Skilled Talents Xiamen Labor Protection Publicity And Education Center
Original Assignee
Xiamen Institute Of Technology Xiamen Senior Technical School Xiamen Public Training Service Center For High Skilled Talents Xiamen Labor Protection Publicity And Education Center
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Application filed by Xiamen Institute Of Technology Xiamen Senior Technical School Xiamen Public Training Service Center For High Skilled Talents Xiamen Labor Protection Publicity And Education Center filed Critical Xiamen Institute Of Technology Xiamen Senior Technical School Xiamen Public Training Service Center For High Skilled Talents Xiamen Labor Protection Publicity And Education Center
Priority to CN202110498187.2A priority Critical patent/CN113224225A/en
Publication of CN113224225A publication Critical patent/CN113224225A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09FDISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/33Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission
    • H01L27/153Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays

Abstract

The invention discloses an LED display panel, which arranges a first metal layer and a second metal layer on different planes, adopts a vertical LED to arrange the cathode and the anode of the LED on two planes respectively, and is connected with the anode end of the LED through the first metal layer, the second metal layer is connected with the cathode end of the LED, simultaneously, the projection of the connecting area formed by the first metal layer on the plane of the second metal layer is mutually overlapped with the connecting area formed by the second metal layer, so that the size of the second metal layer is saved on the same plane, thereby saving about 30um, reducing the wiring density by 18.9 percent, avoiding the condition that metal wires are arranged in the same plane and are respectively connected with the anode end and the cathode end of the LED, further converting the single metal layer layout into a double metal layer layout, reducing the area of the single layer metal layout and simplifying the difficulty of the LED circuit layout, and leading the LED layer to be capable of arranging more LEDs, the pixel density of the display panel is improved.

Description

LED display panel
Technical Field
The invention relates to the field of Micro LEDs, in particular to an LED display panel.
Background
With the development of Display technology, the performance of a novel Micro LED (Micro Light Emitting Diode) is superior to that of an existing OLED (Organic Light Emitting Diode) and LCD (Liquid Crystal Display) in terms of power consumption, Light Emitting efficiency, and lifetime. Current Micro LEDs are typically designed based on a 7T1C driving scheme or a PWM driving scheme. As shown in fig. 1, which is designed based on a 7T1C driving scheme, the luminance of the LED is controlled by varying the current, and as shown in fig. 2 and 3, when the current driving is performed at low luminance, the luminous efficiency is low, and a color shift phenomenon occurs. As shown in fig. 4, based on the PWM driving scheme design, different voltage operating times are realized by adding the data signal and sweep, and then the analog signal is converted into a digital signal by using the comparator, so as to finally realize different voltage control square wave duty ratios. As shown in fig. 5, the line scan driving circuit in the prior art has a dense wiring manner, and the wiring widths of VEE (cathode terminal) and VDD (anode terminal) are both over 30um, so that the pixel point cannot be covered in a large range, resulting in a low PPI (pixel density). Where the pixel pitch (pixel pitch) in the PWM scheme is a minimum of 211.5 and cannot be further compressed, far from the existing 500ppi of LCD cell phones. Therefore, neither the 7T1C driving scheme nor the PWM driving scheme can satisfy the requirement of the existing high PPI.
Disclosure of Invention
The technical problem to be solved by the invention is as follows: the utility model provides a LED display panel, solve the problem of current display panel low pixel density.
In order to solve the technical problems, the invention adopts the technical scheme that:
an LED display panel comprises a first metal layer, a second metal layer and an LED;
the first metal layer and the second metal layer are on different planes;
the anode end of the LED is connected with the first metal layer, and the cathode end of the LED is connected with the second metal layer;
the first metal layer has a projection on the second metal layer.
The invention has the beneficial effects that: the first metal layer and the second metal layer are arranged on different planes, the cathode and the anode of the LED are respectively arranged on the two planes by adopting a vertical LED, and is connected with the anode terminal of the LED through the first metal layer, the second metal layer is connected with the cathode terminal of the LED, meanwhile, the projection of the connection region formed by the first metal layer on the plane of the second metal layer is mutually overlapped with the connection region formed by the second metal layer, so that the size of the second metal layer is saved on the same plane, thereby saving about 30um, reducing 18.9% of wiring area, avoiding the situation that metal wires are arranged in the same plane and are respectively connected with the anode end and the cathode end of the LED, therefore, the layout of the single metal layer is converted into the layout of the double metal layers, the area of the single metal layer is reduced, the difficulty of the LED circuit layout is simplified, more LEDs can be arranged on the LED layer, and the pixel density of the display panel is improved.
Drawings
FIG. 1 is a schematic circuit diagram of a 7T1C driving scheme in the prior art;
FIG. 2 is a graph of luminous efficiency for a 7T1C drive scheme of the prior art;
FIG. 3 is a color shift graph of a 7T1C drive scheme of the prior art;
FIG. 4 is a schematic circuit diagram of a PWM driving scheme according to the prior art;
FIG. 5 is a diagram of a layout structure of a row scan driving circuit in the prior art;
fig. 6 is a schematic structural diagram of an LED display panel according to an embodiment of the present invention;
FIG. 7 is a schematic view of another structure of an LED display panel according to an embodiment of the present invention;
fig. 8 is a schematic circuit layout structure of an LED display panel according to an embodiment of the invention;
description of reference numerals:
1. a first metal layer; 2. an LED; 3. a second metal layer; 4. a die bonding area; 5. a gate insulating layer; 6. an insulating interlayer; 7. a passivation layer; 8. and (7) a planarization layer.
Detailed Description
In order to explain technical contents, achieved objects, and effects of the present invention in detail, the following description is made with reference to the accompanying drawings in combination with the embodiments.
Referring to fig. 6, an LED display panel includes a first metal layer, a second metal layer and an LED;
the first metal layer and the second metal layer are on different planes;
the anode end of the LED is connected with the first metal layer, and the cathode end of the LED is connected with the second metal layer;
the first metal layer has a projection on the second metal layer.
From the above description, the beneficial effects of the present invention are: the first metal layer and the second metal layer are arranged on different planes, the cathode and the anode of the LED are respectively arranged on the two planes by adopting a vertical LED, and is connected with the anode terminal of the LED through the first metal layer, the second metal layer is connected with the cathode terminal of the LED, meanwhile, the projection of the connection region formed by the first metal layer on the plane of the second metal layer is mutually overlapped with the connection region formed by the second metal layer, so that the size of the second metal layer is saved on the same plane, thereby saving about 30um, reducing 18.9% of wiring area, avoiding the situation that metal wires are arranged in the same plane and are respectively connected with the anode end and the cathode end of the LED, therefore, the layout of the single metal layer is converted into the layout of the double metal layers, the area of the single metal layer is reduced, the difficulty of the LED circuit layout is simplified, more LEDs can be arranged on the LED layer, and the pixel density of the display panel is improved.
Further, the device also comprises a solid crystal area;
the die bond region is disposed between the first metal layer and the anode end of the LED.
As can be seen from the above description, the LED is fixed on the die attach region by disposing the die attach region between the first metal layer and the anode end of the LED, so that the LED works more stably and the subsequent processing of the display array is facilitated.
Further, the structure also comprises a gate insulating layer, an insulating interlayer and a passivation layer which are sequentially stacked;
the gate insulating layer, the insulating interlayer and the passivation layer are correspondingly provided with pits one by one;
the second metal layer is arranged on one side, far away from the insulating interlayer, of the passivation layer;
the first metal layer and the anode end of the LED are arranged in the recess.
According to the description, after the gate insulating layer, the insulating interlayer and the passivation layer which are sequentially stacked are arranged to form a certain vertical height, the anode end of the LED is arranged in the recess formed by the gate insulating layer, the insulating interlayer and the passivation layer, so that the height difference between the second metal layer and the cathode end of the LED is reduced, and the process difficulty is simplified.
Further, the height formed by sequentially laminating the gate insulating layer, the insulating interlayer and the passivation layer is more than 3 um;
the height of the recess is less than 1 um.
As can be seen from the above description, the height formed by sequentially stacking the gate insulating layer, the insulating interlayer and the passivation layer is greater than 3um, and the height of the recess is less than 1um, so that the height difference between the second metal layer and the LED anode can be reduced as much as possible within the process production range, and the difficulty of the production process can be simplified.
Further, a planarization layer is also included;
the planarization layer is arranged on one side of the passivation layer away from the insulating interlayer;
the second metal layer is disposed on a side of the planarization layer away from the passivation layer.
As can be seen from the above description, by providing the planarization layer on the side of the passivation layer away from the insulating interlayer, the height of the structure outside the LED is further increased, and the second metal layer is provided on the side of the planarization layer away from the passivation layer, so that the height difference between the second metal layer on the planarization layer and the second metal layer on the LED anode end is reduced, and the difficulty in the production process of the second metal layer is simplified.
Further, the height of the planarization layer is greater than 2.3 um.
From the above description, it can be known that the height difference between the second metal layer and the LED anode end is reduced by setting the height of the planarization layer to be greater than 2.3um, thereby simplifying the difficulty of the production process.
Further, a plurality of groups of the LEDs are included;
a display array is formed by the multiple groups of LEDs;
each column includes red, green and blue LEDs;
the LEDs in the same row are the same color LEDs.
As can be seen from the above description, each column of the display array includes red LEDs, green LEDs, and blue LEDs, and the LEDs in the same row are the same color LEDs, so that the display array can display more uniform colors.
Further, the LED is disposed between the first and second metal layers;
the second metal layers are distributed in a shape of a Chinese character jing.
It can be known from the above description that through being "well" style of calligraphy with the second metal layer and arranging to set up LED between first metal layer and second metal layer, simplified the wiring of second metal layer, can set up more LED in the coplanar, simultaneously, adopt "well" style of calligraphy to arrange and make the second metal layer can not shelter from the light that LED launched completely, thereby make light radiate away from the space of not having arranged the metal layer when satisfying improvement pixel density.
Further, the second metal layer comprises a plurality of transverse parts arranged at intervals and a plurality of longitudinal parts arranged at intervals;
the transverse portions and the longitudinal portions are connected in a staggered manner.
From the above description, the plurality of transverse portions and the plurality of longitudinal portions of the second metal layer are connected in a staggered manner to form a 'well' -shaped arrangement, so that the wiring is clearer and more efficient.
Further, the LEDs of each column correspond to one longitudinal portion;
each three rows of LEDs correspond to one transverse part;
each longitudinal part is connected with the cathode end of the LED of the corresponding column;
each lateral portion is used for inputting display signals of the LEDs of the row corresponding thereto.
As is apparent from the above description, the cathode terminals of the LEDs of the corresponding column are connected by one longitudinal portion, and the cathode terminals of the LEDs of the three rows are connected by one lateral portion, thereby enabling the signal line to efficiently control the LEDs of each row and each column.
The LED display panel is suitable for products such as a mobile phone LED display panel, and the following description is provided by specific embodiments:
example one
Referring to fig. 6, an LED display panel includes a first metal layer 1, a second metal layer 3, an LED2, and a die attach region 4; the LED2 is a vertical LED, and an anode end and a cathode end of the vertical LED are respectively arranged on different planes;
the first metal layer 1 and the second metal layer 3 are on different planes; the anode end of the LED2 is connected with the first metal layer 1, and the cathode end of the LED is connected with the second metal layer 3; the first metal layer 1 has a projection on the second metal layer 3; the die bond region 4 is arranged between the first metal layer 1 and the anode end of the LED 2; in the specific LED process steps, the arrangement of the anode end of the LED2 and the first metal layer 1 is firstly completed, then the micro LED is transferred, and finally the arrangement of the cathode end of the LED2 and the second metal layer 3 is completed; the second metal layer is not connected with the cathode end of the LED2 through ITO (conductive glass); and because the resistivity of ITO is too large, it is difficult to achieve uniformity of the entire display, so a metal material is used as the second metal layer 3 for connecting with the cathode terminal of the LED 2.
Example two
This embodiment is different from the first embodiment in that a gate insulating layer 5, an insulating interlayer 6, a passivation layer 7, and a planarization layer 8 are further included;
referring to fig. 7, the gate insulating layer 5, the insulating interlayer 6 and the passivation layer 7 are sequentially stacked;
the gate insulating layer 5, the insulating interlayer 6 and the passivation layer 7 are correspondingly provided with pits one by one; the second metal layer 3 is arranged on the side of the passivation layer 7 away from the insulating interlayer 6; the first metal layer 1 and the anode end of the LED2 are arranged in the recess;
the height of the existing micro LED is about 8um, if the LED2 is directly disposed on the passivation layer 7 without a recess, the step of the second metal layer 3 will reach above 8um when the second metal layer 3 is subsequently disposed on the passivation layer 7 and the LED2, which cannot be achieved by the existing process; therefore, after the gate insulating layer 5, the insulating interlayer 6 and the passivation layer 7 are sequentially stacked to form a structure with a height greater than 3um, the gate insulating layer 5, the insulating interlayer 6 and the passivation layer 7 are formed into a recessed structure through photoetching, etching and other process steps, and the recessed height is less than 1 um; the LED2 is arranged in the recess, so that the segment difference of the subsequent process of manufacturing the second metal layer 3 can be reduced to be within 5um, and the LED can be produced by the conventional process;
further, a step of adding a planarization layer after the step of passivating the layer 7;
in particular, the planarization layer 8 is arranged on the side of the passivation layer 7 away from the insulating interlayer 6; the second metal layer 3 is arranged on the side of the planarization layer 8 away from the passivation layer 7; under the condition of having a recess, after the first metal layer 1 and the die bonding region 4 are arranged at the anode end of the LED2, the height of the LED lamp reaches about 10 um; the height formed by sequentially laminating the gate insulating layer 5, the insulating interlayer 6 and the passivation layer 7 is only 3um, and the step difference of the subsequent process steps of the second metal layer 3 is still large; therefore, by adding the process of the planarization layer 8 and setting the height of the planarization layer 8 to be greater than 2.3um, the outer side of the LED2 reaches 5.3um, and the step difference of the second metal layer 3 is further reduced.
EXAMPLE III
The difference between the present embodiment and the first or second embodiment is that the arrangement of the second metal layer is specifically limited;
referring to fig. 8, the LED display panel includes a plurality of groups of the LEDs 2;
specifically, a plurality of groups of the LEDs 2 form a display array; each column includes red, green and blue LEDs; the LEDs in the same row are the LEDs with the same color;
the second metal layers are distributed in a shape of a Chinese character 'jing', and connect the cathode ends of the display array; the first metal layer connects the anode terminals of the display array; the LED2 is arranged between the first metal layer 1 and the second metal layer 3; the second metal layers 3 are arranged in a shape of a Chinese character 'jing';
specifically, the second metal layer 3 includes a plurality of transverse portions arranged at intervals and a plurality of longitudinal portions arranged at intervals; the transverse parts and the longitudinal parts are connected in a staggered manner; each column of LEDs corresponds to one longitudinal part, and each longitudinal part forms a VDD area; each three rows of LEDs correspond to one transverse part, and each transverse part forms a VEE area; each longitudinal part is connected with the cathode end of the LED of the corresponding column; each transverse part is used for inputting display signals of the LEDs of the corresponding row; the input display signals are RGB control signals which are dataR1, dataG1 and dataB1 respectively, and each column of LEDs corresponds to one group of the RGB control signals; the projections of the VDD area and the VEE on the same plane are overlapped, so that the area of VEE wiring is saved on the same plane, and the wiring area is reduced by 18.9%.
In summary, in the LED display panel provided by the present invention, the first metal layer and the second metal layer are disposed on different planes, the vertical LED is adopted to dispose the cathode and the anode of the LED on two planes respectively, and is connected to the anode terminal of the LED through the first metal layer, the second metal layer is connected to the cathode terminal of the LED, the projection of the connection region formed by the first metal layer on the plane of the second metal layer is overlapped with the connection region formed by the second metal layer, so that the size of the second metal layer is saved on the same plane, thereby saving about 30um, reducing the wiring density by 18.9%, avoiding the situation that the metal wires are disposed in the same plane and are connected to the anode terminal and the cathode terminal of the LED respectively, and meanwhile, since the second metal layer is made of metal material and is not transparent, the second metal layer is adaptively disposed in a "well" shape wiring manner, simplifying the wiring difficulty of the metal layers, and the LED can radiate light from the space without the metal wires, thereby improving the pixel density, simplifying the layout difficulty of the second metal layer and realizing the light transmission of LED display.
The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all equivalent changes made by using the contents of the present specification and the drawings, or applied directly or indirectly to the related technical fields, are included in the scope of the present invention.

Claims (10)

1. An LED display panel is characterized by comprising a first metal layer, a second metal layer and an LED;
the first metal layer and the second metal layer are on different planes;
the anode end of the LED is connected with the first metal layer, and the cathode end of the LED is connected with the second metal layer;
the first metal layer has a projection on the second metal layer.
2. The LED display panel of claim 1, further comprising a die attach region;
the die bond region is disposed between the first metal layer and the anode end of the LED.
3. The LED display panel according to claim 1, further comprising a gate insulating layer, an insulating interlayer, and a passivation layer sequentially stacked;
the gate insulating layer, the insulating interlayer and the passivation layer are correspondingly provided with pits one by one;
the second metal layer is arranged on one side, far away from the insulating interlayer, of the passivation layer;
the first metal layer and the anode end of the LED are arranged in the recess.
4. The LED display panel according to claim 3, wherein the gate insulating layer, the insulating interlayer and the passivation layer are sequentially stacked to form a height greater than 3 um;
the height of the recess is less than 1 um.
5. The LED display panel of claim 3, further comprising a planarization layer;
the planarization layer is arranged on one side of the passivation layer away from the insulating interlayer;
the second metal layer is disposed on a side of the planarization layer away from the passivation layer.
6. The LED display panel of claim 5, wherein the planarization layer has a height greater than 2.3 um.
7. The LED display panel according to claim 1, comprising a plurality of groups of said LEDs;
a display array is formed by the multiple groups of LEDs;
each column includes red, green and blue LEDs;
the LEDs in the same row are the same color LEDs.
8. The LED display panel of claim 1, wherein the LEDs are disposed between the first metal layer and the second metal layer;
the second metal layers are distributed in a shape of a Chinese character jing.
9. The LED display panel of claim 8, wherein said second metal layer comprises a plurality of spaced apart lateral portions and a plurality of spaced apart longitudinal portions;
the transverse portions and the longitudinal portions are connected in a staggered manner.
10. The LED display panel of claim 9, wherein each column of LEDs corresponds to a longitudinal portion;
each three rows of LEDs correspond to one transverse part;
each longitudinal part is connected with the cathode end of the LED of the corresponding column;
each lateral portion is used for inputting display signals of the LEDs of the row corresponding thereto.
CN202110498187.2A 2021-05-08 2021-05-08 LED display panel Pending CN113224225A (en)

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Application Number Priority Date Filing Date Title
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Application Number Priority Date Filing Date Title
CN202110498187.2A CN113224225A (en) 2021-05-08 2021-05-08 LED display panel

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Citations (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104035646A (en) * 2014-05-09 2014-09-10 友达光电股份有限公司 Touch display panel and operation method thereof
CN104317470A (en) * 2014-11-14 2015-01-28 深圳市华星光电技术有限公司 Mutual capacitance type OGS touch panel and manufacture method thereof
CN104423682A (en) * 2013-08-30 2015-03-18 胜华科技股份有限公司 Touch panel and manufacturing method thereof
CN104730792A (en) * 2015-04-08 2015-06-24 合肥京东方光电科技有限公司 Array substrate and display device
CN108089748A (en) * 2017-12-14 2018-05-29 武汉华星光电半导体显示技术有限公司 Flexible touch panel and flexible OLED display panel
CN108732837A (en) * 2018-05-29 2018-11-02 武汉华星光电技术有限公司 TFT array substrate and liquid crystal display panel
CN208999732U (en) * 2018-10-10 2019-06-18 惠科股份有限公司 A kind of display panel and display device
CN209045611U (en) * 2017-11-06 2019-06-28 亿光电子工业股份有限公司 Semiconductor package, light emitting device and the equipment with the device
CN110018597A (en) * 2019-03-18 2019-07-16 厦门天马微电子有限公司 Display panel and display device
CN111146362A (en) * 2019-12-31 2020-05-12 武汉天马微电子有限公司 Display panel and display device
CN211265472U (en) * 2020-03-10 2020-08-14 重庆康佳光电技术研究院有限公司 LED display backboard and LED display
CN111952323A (en) * 2020-08-19 2020-11-17 京东方科技集团股份有限公司 Preparation method of display substrate, display substrate and display device
WO2020230497A1 (en) * 2019-05-13 2020-11-19 株式会社ジャパンディスプレイ Display device
CN112420764A (en) * 2020-11-09 2021-02-26 深圳市华星光电半导体显示技术有限公司 Display driving substrate, manufacturing method of display driving substrate and display panel
CN112435594A (en) * 2020-11-30 2021-03-02 南京中电熊猫液晶显示科技有限公司 Micro LED backboard and repairing method thereof

Patent Citations (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104423682A (en) * 2013-08-30 2015-03-18 胜华科技股份有限公司 Touch panel and manufacturing method thereof
CN104035646A (en) * 2014-05-09 2014-09-10 友达光电股份有限公司 Touch display panel and operation method thereof
CN104317470A (en) * 2014-11-14 2015-01-28 深圳市华星光电技术有限公司 Mutual capacitance type OGS touch panel and manufacture method thereof
CN104730792A (en) * 2015-04-08 2015-06-24 合肥京东方光电科技有限公司 Array substrate and display device
CN209045611U (en) * 2017-11-06 2019-06-28 亿光电子工业股份有限公司 Semiconductor package, light emitting device and the equipment with the device
CN108089748A (en) * 2017-12-14 2018-05-29 武汉华星光电半导体显示技术有限公司 Flexible touch panel and flexible OLED display panel
US20210124206A1 (en) * 2018-05-29 2021-04-29 Wuhan China Star Optoelectronics Technology Co., Ltd. Tft array substrate and lcd panel
CN108732837A (en) * 2018-05-29 2018-11-02 武汉华星光电技术有限公司 TFT array substrate and liquid crystal display panel
CN208999732U (en) * 2018-10-10 2019-06-18 惠科股份有限公司 A kind of display panel and display device
CN110018597A (en) * 2019-03-18 2019-07-16 厦门天马微电子有限公司 Display panel and display device
WO2020230497A1 (en) * 2019-05-13 2020-11-19 株式会社ジャパンディスプレイ Display device
CN111146362A (en) * 2019-12-31 2020-05-12 武汉天马微电子有限公司 Display panel and display device
CN211265472U (en) * 2020-03-10 2020-08-14 重庆康佳光电技术研究院有限公司 LED display backboard and LED display
CN111952323A (en) * 2020-08-19 2020-11-17 京东方科技集团股份有限公司 Preparation method of display substrate, display substrate and display device
CN112420764A (en) * 2020-11-09 2021-02-26 深圳市华星光电半导体显示技术有限公司 Display driving substrate, manufacturing method of display driving substrate and display panel
CN112435594A (en) * 2020-11-30 2021-03-02 南京中电熊猫液晶显示科技有限公司 Micro LED backboard and repairing method thereof

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