CN113219503B - Digital code phase resolution error smoothing method and satellite navigation receiver - Google Patents

Digital code phase resolution error smoothing method and satellite navigation receiver Download PDF

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CN113219503B
CN113219503B CN202110765906.2A CN202110765906A CN113219503B CN 113219503 B CN113219503 B CN 113219503B CN 202110765906 A CN202110765906 A CN 202110765906A CN 113219503 B CN113219503 B CN 113219503B
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jitter
code phase
code
period
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马春江
唐小妹
孙广富
黄仰博
牟卫华
李柏渝
倪少杰
吴健
王思鑫
赵鑫
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National University of Defense Technology
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S19/00—Satellite radio beacon positioning systems; Determining position, velocity or attitude using signals transmitted by such systems
    • G01S19/01—Satellite radio beacon positioning systems transmitting time-stamped messages, e.g. GPS [Global Positioning System], GLONASS [Global Orbiting Navigation Satellite System] or GALILEO
    • G01S19/13—Receivers
    • G01S19/24—Acquisition or tracking or demodulation of signals transmitted by the system
    • G01S19/30—Acquisition or tracking or demodulation of signals transmitted by the system code related

Abstract

The invention discloses a resolution error smoothing method of a digital code phase and a satellite navigation receiver. The traditional code phase control unit is improved, and phase period jitter is added to the local code phase. Three phase period dither patterns are designed for different implementations. The amplitude and period of the phase period jitter are designed according to the digital correlator code phase resolution and coherent integration time constraints. The estimation accuracy of the digital code phase can be improved obviously under the condition of not increasing the calculation amount obviously.

Description

Digital code phase resolution error smoothing method and satellite navigation receiver
Technical Field
The invention relates to the field of satellite navigation signal processing, in particular to a digital code phase resolution error smoothing method and a satellite navigation receiver.
Background
In a satellite navigation receiver, a code phase is an important time delay observation quantity and is used for supporting functions of positioning, time service and the like of the receiver. For all-digital satellite navigation receivers, the sampling clock of the baseband signal has a significant impact on the accuracy of the code phase estimation. When the sampling clock is equal to the integral multiple of the spread spectrum code rate, the signal code phase is repeatedly sampled, and the code phase ergodicity of the corresponding sampling point is insufficient, so that the digital code phase estimation generates serious resolution error.
The resolution of the digital code phase estimation can be effectively improved by increasing the sampling clock of the baseband signal or designing the unequal sampling frequency which is not in proportional relation with the spread spectrum code rate. However, the sampling clock of the digital baseband signal is closely related to the hardware resources of the receiver, and under the condition that the hardware resources are constrained, the sampling clock cannot be increased or an unequal sampling frequency cannot be used. The current smoothing method cannot smooth the digital code phase resolution error without increasing the calculation amount significantly.
Disclosure of Invention
The present invention is directed to solving at least one of the problems of the prior art. Therefore, the invention provides a digital code phase resolution error smoothing method and a satellite navigation receiver, which can smooth the digital code phase resolution error without increasing the calculated amount remarkably.
According to the embodiment of the first aspect of the invention, the method for smoothing the resolution error of the digital code phase comprises the following steps:
constructing a pseudo code phase tracking loop, and generating a phase lead local code signal and a phase lag local code signal;
calculating a code phase estimate of the local signal and the received signal, adding periodic phase jitter to the code phase estimate,
and the actual code phase is obtained according to the code phase resolution of the digital correlator and the amplitude and period of coherent integration time constraint phase jitter.
The method for smoothing the resolution error of the digital code phase according to the embodiment of the first aspect of the present invention has at least the following technical effects:
according to the characteristic of the resolution error of the digital code phase discriminator, namely the insufficient ergodic degree of different discrete signals to code phase sampling, the embodiment of the invention adopts a mode of adding code phase period jitter to local signals to smooth the resolution error. Firstly, a pseudo code phase tracking loop is constructed, then periodic jitter is added to a local code phase, and the improvement of phase resolution is realized by controlling the equivalence of a local signal; then, aiming at different implementation modes, designing a phase period jitter pattern; and finally, designing the amplitude and period of phase period jitter according to the code phase resolution and coherent integration time constraint of the digital correlator.
The embodiment of the invention can obviously smooth the code phase resolution error of the digital discriminator and improve the estimation precision of the code phase by adding the phase cycle jitter on the code phase of the local signal. In addition, only the local code phase control unit of the classical receiver is changed in the whole process, and complex operations such as matrix inversion, characteristic decomposition and the like are not involved, so that the method is simple to implement, has small operand and is convenient to implement and can be directly used for the traditional pseudo code tracking loop.
According to some embodiments of the invention, the pseudo code phase tracking loop comprises a phase period dither control unit, a local code phase control unit, a local code generator, a multiplier, an integral accumulator, a code phase discriminator, and a code loop filter.
According to some embodiments of the invention, the periodic phase jitter comprises at least one of continuous phase period jitter, sawtooth phase period jitter and cosine phase period jitter.
According to some embodiments of the invention, the time domain representation of continuous phase period dithering is
Figure 526732DEST_PATH_IMAGE001
Is composed of
Figure 640182DEST_PATH_IMAGE002
，
Time domain expression of the sawtooth phase period jitter
Figure 627729DEST_PATH_IMAGE003
Is composed of
Figure 852037DEST_PATH_IMAGE004
Time domain expression of the cosine phase period jitter
Figure 975851DEST_PATH_IMAGE005
Is composed of
Figure 260202DEST_PATH_IMAGE006
Where T denotes the local signal time, A denotes the amplitude of the phase jitter, TnRepresenting the period of the phase jitter, k representing the number of different periods, dnThe sawtooth width representing the sawtooth phase jitter.
According to some embodiments of the invention, the amplitude a of the phase jitter is formulated as
Figure 239440DEST_PATH_IMAGE007
Wherein p is0The code phase resolution of the digital code phase correlator.
According to some embodiments of the invention, the period T of the phase jitter isnIs of the formula
Figure 267439DEST_PATH_IMAGE008
Wherein, TcohRepresenting the coherent integration time of the digital code phase correlator.
The satellite navigation receiver according to the second aspect of the present invention includes a digital code phase discriminator for smoothing a code phase resolution error by the above-described resolution error smoothing method for a digital code phase.
The method for smoothing the resolution error of the digital code phase according to the embodiment of the second aspect of the present invention has at least the following technical effects: according to the characteristic of the resolution error of the digital code phase discriminator, namely the insufficient ergodic degree of different discrete signals to code phase sampling, the embodiment of the invention adopts a mode of adding code phase period jitter to local signals to smooth the resolution error. Firstly, a pseudo code phase tracking loop is constructed, and a mechanism of code phase estimation in a navigation receiver is analyzed; then, adding periodic jitter to the local code phase, and realizing the improvement of the phase resolution by controlling the equivalence of local signals; then, aiming at different implementation modes, designing a phase period jitter pattern; and finally, designing the amplitude and period of phase period jitter according to the code phase resolution and coherent integration time constraint of the digital correlator.
The embodiment of the invention can obviously smooth the code phase resolution error of the digital discriminator and improve the estimation precision of the code phase by adding the phase cycle jitter on the code phase of the local signal. In addition, only the local code phase control unit of the classical receiver is changed in the whole process, and complex operations such as matrix inversion, characteristic decomposition and the like are not involved, so that the method is simple to implement, has small operand and is convenient to implement and can be directly used for the traditional pseudo code tracking loop.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
The above and/or additional aspects and advantages of the present invention will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
FIG. 1 is a flow chart of a method for smoothing resolution error of a digital code phase according to an embodiment of the present invention;
FIG. 2 is a block diagram of a code phase tracking structure based on local phase cycle jitter according to an embodiment of the present invention;
FIG. 3 is a time domain schematic of three different phase period dithering patterns according to an embodiment of the present invention;
FIG. 4 is a graph of correlation loss variation for different initial code phases according to an embodiment of the present invention;
FIG. 5 is a digital code phase discrimination graph under different phase jitter conditions according to an embodiment of the present invention;
FIG. 6 is a diagram illustrating error of code phase resolution under different phase jitter conditions according to an embodiment of the present invention;
FIG. 7 is a diagram of code phase tracking errors under several phase cycle jitters in an embodiment of the present invention.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are illustrative only for the purpose of explaining the present invention, and are not to be construed as limiting the present invention.
In the description of the present invention, unless otherwise explicitly limited, terms such as arrangement, installation, connection and the like should be understood in a broad sense, and those skilled in the art can reasonably determine the specific meanings of the above terms in the present invention in combination with the specific contents of the technical solutions.
Referring to fig. 1, a method for smoothing a resolution error of a digital code phase includes the following steps
S100, constructing a pseudo code phase tracking loop;
referring to fig. 2, the constructed pseudo code phase tracking loop includes a phase period jitter control unit, a local code phase control unit, a local code generator, a multiplier, an integral accumulator, a code phase discriminator and a code loop filter, wherein an output end of the phase period jitter control unit is connected to an input end of the local code phase control unit, an output end of the local code phase control unit is connected to an input end of the local code generator, an output end of the local code generator is connected to an input end of the multiplier, an output end of the multiplier is connected to an input end of the integral accumulator, an output end of the integral accumulator is connected to an input end of the code phase discriminator, an output end of the code phase discriminator is connected to an input end of the code loop filter, and an output end of the code loop filter is simultaneously fed back and input to the local code phase control unit.
S200, adding periodic jitter to a local code phase;
the pseudo code phase tracking loop generates two groups of local code signals with phase advance and phase lag, and the corresponding local code phases are
Figure 511339DEST_PATH_IMAGE009
And
Figure 701012DEST_PATH_IMAGE010
and t denotes a local signal time. Setting the local code phase to
Figure 663151DEST_PATH_IMAGE011
The correlation interval of the discriminator is 2d0Then the code phase is advanced by
Figure 229262DEST_PATH_IMAGE012
And the lagging code phase is
Figure 593247DEST_PATH_IMAGE013
。
If periodic phase jitter is added to the local code phase
Figure 953821DEST_PATH_IMAGE014
The local code phase of the advance and the lag, respectively, can then be expressed as:
Figure 904722DEST_PATH_IMAGE015
Figure 274523DEST_PATH_IMAGE016
s300, designing a periodic code phase jitter pattern;
in the embodiment, from the perspective of implementation of a navigation receiver, three different patterns of continuous phase period jitter, sawtooth phase period jitter and cosine phase period jitter are designed.
Continuous phase cycle jitter is a periodic piecewise linear function, the time domain expression of which
Figure 227436DEST_PATH_IMAGE017
Comprises the following steps:
Figure 24491DEST_PATH_IMAGE018
where A denotes the amplitude of the phase jitter, TnIndicating the period of the phase jitter and k the different number of periods.
Continuous phase cycle jitter can be realized by changing code frequency, the calculation complexity is moderate, and most satellite navigation receivers have realizable capacity.
Sawtooth phase period jitter is a discrete form of continuous phase period jitter, the time domain expression of which
Figure 695643DEST_PATH_IMAGE019
Is composed of
Figure 869136DEST_PATH_IMAGE020
Wherein d isnThe sawtooth width representing the sawtooth phase jitter.
In a satellite navigation receiver, a lookup table is usually used to implement sawtooth phase period dithering, and the smaller the width of a sawtooth is, the higher the order of a corresponding phase lookup table is. The computational complexity of the sawtooth phase period jitter is lower than that of the continuous phase period jitter.
The cosine phase period jitter has similar effect to continuous phase period jitter and sawtooth phase period jitter, and the time domain expression thereof
Figure 942134DEST_PATH_IMAGE021
Comprises the following steps:
Figure 910090DEST_PATH_IMAGE022
the cosine phase period jitter needs to modify the local code phase in real time, cannot be realized by adjusting the frequency, and has the highest calculation complexity. The hardware receiver is also implemented in the manner of sampling a cosine phase look-up table, which is similar to the implementation of sawtooth phase period dithering.
S400, designing amplitude A and period T of phase jittern。
Code phase resolution p of digital code phase correlator0Can be expressed as:
Figure 567074DEST_PATH_IMAGE023
wherein, TcohRepresenting the coherent integration time, N, of the correlatorCRepresenting the number of chips in the coherent integration time, NSRepresenting coherent integration time TcohThe number of sampling points in.
Covering an integer number of code phase resolution intervals p due to code phase period jitter0Thus, the amplitude a of the phase jitter is designed to be:
Figure 278678DEST_PATH_IMAGE024
where m may be any positive integer, but is usually 1. The larger the value of m is, the larger the influence on the frequency of the local code signal is.
Due to the coherent integration time TcohWithin which an integer number of phase jitter periods T can be acceptednThus, the period T of the phase jitternThe design is as follows:
Figure 143866DEST_PATH_IMAGE025
in this case, l may be any positive integer, but is usually 1. The larger the value of l is, the larger the influence on the frequency of the local code signal is.
The invention also relates to a satellite navigation receiver comprising a digital code phase discriminator for smoothing code phase resolution errors by the above method.
The invention is illustrated below with a specific simulation example:
FIG. 2 shows a code based on local phase cycle jitterA phase tracking structure block diagram, wherein the received signal r (t) is converted by quadrature down-conversion to obtain an in-phase branch signal zi(t) and quadrature branch signal zq(t) and are respectively compounded with the advanced (E) and delayed (L) local code sequences, and after passing through an integral accumulation module, I is obtainedES、ILS、QLSAnd QESA four-way correlation accumulation value. After passing through the code phase discriminator, the code phase error estimated value of the local signal and the received signal is obtained
Figure 345040DEST_PATH_IMAGE026
. Code loop low pass filter to raw code phase error estimate
Figure 928468DEST_PATH_IMAGE027
Filtering to obtain initial code phase estimation value
Figure 240501DEST_PATH_IMAGE026
. The phase period jitter control module directly converts the phase jitter value into a digital value
Figure 225774DEST_PATH_IMAGE028
Superimposed on the initial code phase estimate
Figure 597850DEST_PATH_IMAGE029
Above, obtain the actual initial code phase
Figure 668574DEST_PATH_IMAGE030
。
FIG. 3 is a time domain diagram of three different phase period jitter patterns, wherein the phase jitter amplitude A is 0.1 chip and the period T of the phase jitter isnIs 1ms, the tooth width d of the sawtooth phase jitternIs 0.1 ms. When the tooth width of the sawtooth phase jitter approaches zero, the sawtooth phase jitter can be equivalent to continuous phase jitter, and therefore the continuous phase jitter can be regarded as a special case of the sawtooth phase jitter.
Fig. 4 shows the correlation loss variation curves corresponding to different initial code phases. Setting phase jitter amplitude by simulationDegree A of 0.1 chip, period of phase jitter TnIs 1ms, the tooth width d of the sawtooth phase jitternIs 0.1 ms. The average correlation loss of the sawtooth phase jitter is 0.48 dB, and the maximum phase loss is 0.70 dB; the average correlation loss of continuous phase jitter is 0.46 dB, the maximum phase loss is 0.56 dB; the average correlation loss of cosine phase jitter is 0.59 dB and the maximum phase loss is 0.62 dB. The results show that the correlation loss of the three different phase dithering modes is approximately equivalent, wherein the correlation loss of the sawtooth phase dithering and the cosine phase dithering is relatively large.
Fig. 5 shows simulation results of digital code phase discrimination curves under different phase jitter modes. The simulation selects the condition of equivalent sampling for analysis, wherein the nominal code rate is set to be 1 MHz, the sampling frequency is set to be 10 MHz, the coherent integration time is 1ms, the period of phase jitter is 1ms, the amplitude of the phase jitter is 0.1 chip, the sawtooth width of the sawtooth jitter is 0.01 chip, and the initial phase of the periodic jitter is 0 chip. Simulation results show that the phase resolution of the digital code phase discrimination curve can be obviously improved by three kinds of periodic phase jitters, namely continuous phase jitters, sawtooth jitters and cosine jitters.
Fig. 6 shows simulation results of digital code phase resolution errors in different phase dither patterns, wherein simulation conditions are kept unchanged. The maximum error of the local signal without increasing the jitter is 4.98x10-2 chips, and the average error is 2.49x10-2 chips; the maximum error after the sawtooth phase jitter is added is 9.80x10-3 chips, and the average error is 4.90x10-3 chips; the maximum error of adding cosine phase jitter is 7.60x10-3 chips, and the average error is 4.90x10-3 chips; the maximum error and the average error of the continuous phase jitter are both 0 chips. Simulation results show that three kinds of periodic phase jitters, namely continuous phase jitters, sawtooth phase jitters and cosine phase jitters, can effectively inhibit phase resolution errors of digital codes, wherein the inhibition effect of the continuous phase jitters is most obvious.
Fig. 7 shows the code phase tracking error after adding phase period jitter to the local signal. To traverse the initial phase of the received signal, the code doppler frequency of the generated signal is set to 1 m/s. Wherein, the period of the three phase jitters is 1ms, the amplitude of the phase jitters is 0.1 chip, and the duration of the sawtooth jitters is 0.1 ms. The phase resolution of the digital discriminator when the local signal does not increase the phase jitter is 7.47m, and the minimum tracking precision of the corresponding code phase is 9.18 m; when continuous phase jitter is added to the local signal, the phase resolution of the digital discriminator is 0 m theoretically, and the tracking precision of the corresponding code phase is 0.16 m at most.
In summary, according to the characteristics of the resolution error of the digital code phase discriminator, that is, the traversal degree of different discrete signals to code phase samples is insufficient, the embodiment of the present invention adopts a method of adding code phase period jitter to the local signal to smooth the resolution error. Firstly, a pseudo code phase tracking loop is constructed, and a mechanism of code phase estimation in a navigation receiver is analyzed; secondly, adding periodic jitter to the local code phase, and realizing the improvement of the phase resolution by controlling the local signal equivalent; then, aiming at different implementation modes, three phase period jitter patterns are designed; and finally, designing the amplitude and period of phase period jitter according to the digital correlator code phase resolution and coherent integration time constraint.
The invention can obviously smooth the code phase resolution error of the digital discriminator and improve the estimation precision of the code phase by adding the phase cycle jitter on the code phase of the local signal. In addition, only a local code phase control unit of a classical receiver is changed in the whole implementation process of the pseudo code tracking method, and complex operations such as matrix inversion, feature decomposition and the like are not involved, so that the pseudo code tracking method is simple to implement, small in operation amount and convenient to implement, and can be directly used for a traditional pseudo code tracking loop.
The embodiments of the present invention have been described in detail with reference to the accompanying drawings, but the present invention is not limited to the above embodiments, and various changes can be made within the knowledge of those skilled in the art without departing from the gist of the present invention.
The embodiments of the present invention have been described in detail with reference to the accompanying drawings, but the present invention is not limited to the above embodiments, and various changes can be made within the knowledge of those skilled in the art without departing from the gist of the present invention.

Claims (7)

1. A method for smoothing resolution errors in digital code phase, comprising the steps of:
constructing a pseudo code phase tracking loop, and generating a phase lead local code signal and a phase lag local code signal;
calculating a code phase estimate of the local signal and the received signal, adding periodic phase jitter to the code phase estimate,
and the actual code phase is obtained according to the code phase resolution of the digital correlator and the amplitude and period of coherent integration time constraint phase jitter.
2. The method of smoothing resolution error of digital code phase of claim 1, wherein: the pseudo code phase tracking loop comprises a phase period jitter control unit, a local code phase control unit, a local code generator, a multiplier, an integral accumulator, a code phase discriminator and a code loop filter.
3. The method of smoothing resolution error of digital code phase of claim 1, wherein: the periodic phase jitter includes at least one of continuous phase period jitter, sawtooth phase period jitter, and cosine phase period jitter.
4. The method of claim 3, wherein the step of smoothing the resolution error of the digital code phase comprises: time domain expression of the continuous phase cycle jitter
Figure 869976DEST_PATH_IMAGE001
Is composed of
Figure 205405DEST_PATH_IMAGE002
，
Time domain expression of the sawtooth phase period jitter
Figure 156044DEST_PATH_IMAGE003
Is composed of
Figure 38549DEST_PATH_IMAGE004
Time domain expression of the cosine phase period jitter
Figure 718929DEST_PATH_IMAGE005
Is composed of
Figure 661477DEST_PATH_IMAGE006
Where T denotes the local signal time, A denotes the amplitude of the phase jitter, TnRepresenting the period of the phase jitter, k representing the number of different periods, dnThe sawtooth width representing the sawtooth phase jitter.
5. The method of smoothing resolution error of digital code phase of claim 1, wherein: the formula of the amplitude A of the phase jitter is
Figure 896149DEST_PATH_IMAGE007
Wherein p is0M is any positive integer for the code phase resolution of the digital code phase correlator.
6. The method of smoothing resolution error of digital code phase of claim 1, wherein: period T of the phase jitternIs of the formula
Figure 316767DEST_PATH_IMAGE008
Wherein, Tcoh denotes the coherence of the digital code phase correlatorIntegration time, l, is taken to be any positive integer.
7. A satellite navigation receiver comprising a digital code phase discriminator for smoothing code phase resolution error by the digital code phase resolution error smoothing method of any one of claims 1 to 6.
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