CN113191109B - AutoCAD-based circuit model extraction method, storage medium and electronic equipment - Google Patents
AutoCAD-based circuit model extraction method, storage medium and electronic equipment Download PDFInfo
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- G06F30/30—Circuit design
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Abstract
The application discloses a circuit model extraction method, a storage medium and electronic equipment based on AutoCAD, which comprises the steps of firstly obtaining original position coordinates of each element in a circuit model to generate an original coordinate table; modifying the original position coordinates in the original coordinate table according to the topological relation of each element to generate a topological element coordinate table; searching the topological element coordinate table and determining an initial node of a circuit model; marking node numbers of other nodes in the circuit model by taking the starting node as a starting point; marking the position number of each element according to the node number; and finally, generating a circuit model data extraction table comprising element names, node numbers and position numbers. The automatic extraction of the circuit model is realized, the manual calculation amount is reduced, and the accuracy of data extraction is improved.
Description
Technical Field
The present disclosure relates to the field of circuit model extraction technologies, and in particular, to an automatic cad-based circuit model extraction method, a storage medium, and an electronic device.
Background
The relay protection setting calculation has important significance in the aspect of ensuring the safe, stable and economic operation of the power system. Along with the continuous expansion of the power grid scale, the system power supply diagram is becoming huge and complex, and most units in the electric industry adopt AutoCAD with strong universality to draw the power supply schematic diagram. And a great amount of time is consumed from the drawing stage of the system power supply schematic diagram to the system relay protection setting calculation stage. Traditional relay protection setting is not unified in management standard in the aspects of drawing of a power supply drawing, setting calculation and verification supervision, and the workload of personnel is huge; in the aspect of calculation, an empirical setting mode is often adopted, data support of a circuit model is lacked, and in some special cases, the phenomenon that the setting value is inaccurate occurs.
In order to reduce the complexity of extracting circuit data from AutoCAD and improve the uniformity between drawings and calculation, it is necessary to provide an extraction method of a circuit model based on AutoCAD.
Disclosure of Invention
The purpose of the application is to overcome the defect that the circuit model extraction in the prior art depends on manual calculation, and provide an AutoCAD-based circuit model extraction method, a storage medium and electronic equipment.
The technical scheme of the application provides an AutoCAD-based circuit model extraction method, which comprises the following steps:
acquiring original position coordinates of each element in the circuit model, and generating an original coordinate table;
modifying the original position coordinates in the original coordinate table according to the topological relation of each element to generate a topological element coordinate table;
searching the topological element coordinate table and determining an initial node of a circuit model;
marking node numbers of other nodes in the circuit model by taking the starting node as a starting point;
marking the position number of each element according to the node number;
a circuit model data extraction table including a component name, a node number, and a position number is generated.
Further, the original coordinate table includes an element name, an element attribute, and an original position coordinate.
Further, the modifying the original position coordinates in the original coordinate table according to the topological relation of each element to generate a topological element coordinate table specifically includes:
acquiring the element attribute of each element, and determining a corresponding topological relation;
modifying the original position coordinates of each element into topological position coordinates according to the topological relation;
and merging the elements with the same topological position coordinates to generate a topological element coordinate table.
Further, the original position coordinates comprise input end original coordinates and output end original coordinates;
the modifying the original position coordinates of each element to topological position coordinates according to the topological relation specifically comprises:
and according to the topological relation, modifying the original coordinates of the input end into starting point coordinates and modifying the original coordinates of the output end into end point coordinates.
Further, the searching the topological element coordinate table to determine the initial node of the circuit model specifically includes:
acquiring the starting point coordinates of each element, and traversing the ending point coordinates of other elements;
if the end point coordinates of the other elements are not coincident with the start point coordinates, storing the start point coordinates into a start node list;
and deleting repeated coordinates in the initial node list, and determining all coordinates in the initial node list as initial nodes of the circuit model.
Further, the marking the node number of the rest nodes in the circuit model by using the starting node as a starting point specifically includes:
determining a subordinate element of each element;
using an element with a starting point coordinate as the starting point node as a starting element, and marking node numbers of the starting point coordinate and the end point coordinate according to the element attribute of the starting element;
taking a lower element of the initial element as a current node marking element;
marking node numbers of end point coordinates of the current node marking element according to the element attributes of the current node marking element;
and taking the lower element of the current node marking element as the current node marking element, and repeating the previous step until node number marking of the end point coordinates of all the elements is completed.
Further, the determining the subordinate element of each element specifically includes:
searching starting point coordinates of other elements by taking the ending point coordinates of the current element as a reference;
and determining the element with the same starting point coordinate as the ending point coordinate of the current element as the subordinate element of the current element.
Further, labeling the position number of each element according to the node number, specifically including:
merging the same node numbers;
using an element with a starting point coordinate as the starting point node as a current position marking element, and marking the position number of the current position marking element;
using an element with the same node number of the starting point coordinate and the node number of the ending point coordinate of the current position marking element as the current position marking element, and marking the position number of the current position marking element;
repeating the previous step until the labeling of the position numbers of all the elements is completed.
The technical solution of the present application also provides a storage medium storing computer instructions for performing all the steps of the AutoCAD-based circuit model extraction method as described above when the computer executes the computer instructions.
The technical scheme of this application still provides an electronic equipment, includes:
at least one processor; the method comprises the steps of,
a memory communicatively coupled to the at least one processor; wherein,
the memory stores instructions executable by the at least one processor to enable the at least one processor to perform all the steps of the AutoCAD-based circuit model extraction method as described above.
After the technical scheme is adopted, the method has the following beneficial effects:
according to the invention, circuit model extraction is performed based on AutoCAD, an original coordinate table is firstly generated, then a topological element coordinate table is generated according to element topological relation, and node numbers and position numbers are marked on the topological element coordinate table to obtain a circuit model data extraction table, so that automatic extraction of a circuit model is realized, the manual calculation amount is reduced, and the accuracy of data extraction is improved.
Drawings
The disclosure of the present application will become more readily understood with reference to the accompanying drawings. It should be understood that: the drawings are for illustrative purposes only and are not intended to limit the scope of the present application. In the figure:
FIG. 1 is a flow chart of an AutoCAD-based circuit model extraction method according to one embodiment of the present application;
FIG. 2 is an AutoCAD-based drawn circuit model;
FIG. 3 is an original coordinate table of the circuit model of FIG. 2;
FIG. 4 is a table of topological elements coordinates modified from the original table of FIG. 3;
FIG. 5 is a circuit model data extraction table of the circuit model extraction of FIG. 2;
FIG. 6 is a schematic diagram of a coordinate modification of a multiport element;
FIG. 7 is a schematic diagram of a coordinate modification of another multiport component;
FIG. 8 is a schematic diagram of a coordinate modification of a bus bar;
fig. 9 is a schematic diagram of a coordinate modification of a cable with a circuit breaker attached;
FIG. 10 is a circuit model that completes node number labeling and merges the same node numbers;
FIG. 11 is a flow chart of an AutoCAD-based circuit model extraction method according to a preferred embodiment of the present application;
fig. 12 is a hardware configuration diagram of an electronic device in an embodiment of the present application.
Detailed Description
Specific embodiments of the present application are further described below with reference to the accompanying drawings.
It is easy to understand that, according to the technical solution of the present application, those skilled in the art may replace various structural manners and implementation manners without changing the true spirit of the present application. Accordingly, the following detailed description and drawings are merely illustrative of the present application and are not intended to be exhaustive or to be limiting of the application.
Terms of orientation such as up, down, left, right, front, rear, front, back, top, bottom, etc. mentioned or possible to be mentioned in the present specification are defined with respect to the configurations shown in the drawings, which are relative concepts, and thus may be changed according to different positions and different use states thereof. These and other directional terms should not be construed as limiting terms. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present application, it should be noted that, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communication between the two components. The above-described specific meanings belonging to the present application are understood as appropriate by those of ordinary skill in the art.
The circuit model extraction method based on AutoCAD in the embodiment of the application, as shown in FIG. 1, comprises the following steps:
step S101: acquiring original position coordinates of each element in the circuit model, and generating an original coordinate table;
step S102: modifying the original position coordinates in the original coordinate table according to the topological relation of each element to generate a topological element coordinate table;
step S103: searching the topological element coordinate table and determining an initial node of a circuit model;
step S104: marking node numbers of other nodes in the circuit model by taking the starting node as a starting point;
step S105: marking the position number of each element according to the node number;
step S106: a circuit model data extraction table including a component name, a node number, and a position number is generated.
Specifically, the circuit model is built based on AutoCAD software, each element in the circuit model has a fixed position coordinate, and step S101 is to extract the position coordinate of each element in the circuit model as an original position coordinate, and store it in an original coordinate table. Step S101 then modifies the original coordinate table into a topological element coordinate table according to the topological relation of each element, including: and (3) carrying out port combination on the multiport elements, combining the invalid elements in the topological relation, and only embodying the topological relation among the valid elements in the topological element coordinate table. Step 103 to step 104 label node numbers to two ends of each element in the topological element coordinate table according to the circuit topological relation, step 105 labels the position number of each element by taking the node numbers as reference, and finally extracts a circuit model data extraction table comprising element names, node numbers and position numbers.
According to the embodiment of the application, the automatic extraction of the AutoCAD circuit model data can be realized through the C language design extraction logic, so that the manual calculation amount is reduced, and the accuracy of data extraction is improved.
Further, the original coordinate table in step S101 includes an element name, an element attribute, and an original position coordinate.
Taking the circuit model shown in fig. 2 as an example, the circuit model generates a corresponding original coordinate table as shown in fig. 3, where the table includes element names, corresponding element numbers, and element attributes, the element numbers are used to distinguish identical elements in the circuit, the original position coordinates of each element include an input end coordinate and an output end coordinate, and each coordinate includes an X-axis coordinate value and a Y-axis coordinate value. Taking the element ZK as an example, the element ZK shown in fig. 2 includes one input end and two output ends, and in the original coordinate table in fig. 3, the element ZK occupies two rows, and each row corresponds to one output end coordinate.
Further, in step S102, the modifying the original position coordinates in the original coordinate table according to the topological relation of each element to generate a topological element coordinate table specifically includes:
acquiring the element attribute of each element, and determining a corresponding topological relation;
modifying the original position coordinates of each element into topological position coordinates according to the topological relation;
and merging the elements with the same topological position coordinates to generate a topological element coordinate table.
Specifically, for different elements, there are different topological relations in the circuit according to their element attributes, and the original position coordinates of the elements need to be modified according to the different topological relations.
Since the original position coordinates include an input end original coordinate and an output end original coordinate; therefore, according to the topological relation, the original position coordinates of each element are modified into topological position coordinates, specifically:
and according to the topological relation, modifying the original coordinates of the input end into starting point coordinates and modifying the original coordinates of the output end into end point coordinates.
The change of the original position coordinates of the element comprises the coordinate modification of the multiport element, the coordinate modification of the bus and the coordinate modification of the cable.
Coordinate modification with respect to the multiport element: fig. 6 shows a multiport element with one input and multiple outputs, where the outputs are combined to the same coordinates if the topology between the outputs is a parallel relationship. Fig. 7 shows a multiport element with an input and a plurality of outputs, wherein the topology between the input and the outputs is parallel, and the input and the output connected in parallel with the input are combined to the same coordinate.
Modification of busbar coordinates: in the electrography, the bus is connected with a plurality of parallel lower lines in a common passage way, as shown in fig. 8, the bus is converted into a coordinate point according to the topological relation of bus connection, and the coordinates of the bus are modified by the coordinates of the input end of the lower element connected with the bus.
Modification of cable coordinates: the cable serves as a special electric element and plays a role in connecting the electric elements and transmitting electric energy in an actual circuit model. In the extraction of the circuit model, the circuit breaker, the transformer and other elements connected with the cable are not usually represented by independent node numbers, but the topological relation is represented by the node numbers of the cable connected with the circuit breaker, the transformer and other elements. Therefore, when the two cables are connected and the connection point is not a branch point, the two cables are combined and the coordinates of the connection point are canceled when it is determined that the unit resistances and the unit reactances of the two cables are equal. In special cases, when the short-circuit device and the mutual inductor are connected in the cable, and the information of the short-circuit device and the mutual inductor needs to be represented by the information of the node and the position number of the cable, as shown in fig. 9, the elements connected with the upper and lower stages of the short-circuit device are all cables, the coordinates of the two ends of the short-circuit device are extended to refer to the cables on the two sides respectively, the coordinates of the two ends of the cable are canceled, and the short-circuit device is connected in the extended cable (and recorded in a final circuit model data extraction table).
After the original position coordinates of each element are modified into topological position coordinates according to the topological relation, the elements with the same topological position coordinates are combined, a topological element coordinate table generated by modifying the original coordinate table shown in fig. 3 is shown in fig. 4, wherein elements B1, B2, L3, L7 and the like are omitted, and ports of the multiport element are combined.
Further, the step S103: searching the topological element coordinate table and determining an initial node of a circuit model, wherein the method specifically comprises the following steps:
acquiring the starting point coordinates of each element, and traversing the ending point coordinates of other elements;
if the end point coordinates of the other elements are not coincident with the start point coordinates, storing the start point coordinates into a start node list;
and deleting repeated coordinates in the initial node list, and determining all coordinates in the initial node list as initial nodes of the circuit model.
In the electric power supply, there is an element for connecting to the power source, and in the circuit model, the end of the element connected to the power source is the initial node of the circuit model. The start node is characterized by not being connected to the end points of other elements. Therefore, the starting point coordinates of each element are sequentially used as a reference, the ending point coordinates of other elements are traversed, if the ending point coordinates of all other elements do not coincide with the starting point coordinates of the element, the starting point coordinates of the element are the starting nodes, the starting point coordinates are stored in a starting node list, and a plurality of elements can be directly connected with a power supply in one circuit model, so that the circuit model can have a plurality of starting nodes.
Since there is a case where one starting node is connected to multiple branches, the starting node is collected multiple times during the traversal process, so that the coordinates repeated in the starting node list need to be deleted, and each starting node only retains one coordinate data.
Further, in the step S104: marking node numbers of other nodes in the circuit model by taking the starting node as a starting point, wherein the method specifically comprises the following steps of:
determining a subordinate element of each element;
using an element with a starting point coordinate as the starting point node as a starting element, and marking node numbers of the starting point coordinate and the end point coordinate according to the element attribute of the starting element;
taking a lower element of the initial element as a current node marking element;
marking node numbers of end point coordinates of the current node marking element according to the element attributes of the current node marking element;
and taking the lower element of the current node marking element as the current node marking element, and repeating the previous step until node number marking of the end point coordinates of all the elements is completed.
Specifically, other elements connected to the end point of the element are lower elements of the element, in node number labeling, firstly, the overlapped coordinates are a node, one node number is labeled, and secondly, according to the element attribute, the starting point coordinates and the end point coordinates of the special element attribute are considered as a node, and the same node number is labeled.
It should be noted that, in different practical applications, the element attribute of the element needs to be set according to different extraction purposes of the circuit model, so as to meet the extraction requirements.
In the embodiment of the application, the element with the starting point coordinate as the starting node is used as the starting element, and the node number is marked according to the branching sequence of each element. Firstly, marking a node number 1 on a starting point coordinate of a starting element and marking a node number 2 on an ending point coordinate; then, the lower-level element of the initial element is used as a current node marking element, the end point coordinates of the current node marking element are marked in sequence, whether the node number needs to be marked with 1 is determined according to the element attribute of the current node marking element, for example, the initial element is provided with three lower-level elements which are A, B, C respectively, and if the element attribute of A determines that the node number needs to be marked with 1, the end point coordinates of A are marked with the node number 3; marking the node number of B, namely marking the end point coordinate of B with the node number 2 (the same node number as the start point coordinate of the element B) if the element attribute of B determines that the node number does not need to be marked with 1; and marking the node number of C, and marking the endpoint coordinate of C with the node number 4 if the element attribute of C determines that the node number needs to be marked with 1.
And then, using the lower element of the current node marking element as the current node marking element, continuing marking the node number, and repeating the steps until the node number marking of the end point coordinates of all the elements is completed.
Further, the determining the subordinate element of each element specifically includes:
searching starting point coordinates of other elements by taking the ending point coordinates of the current element as a reference;
and determining the element with the same starting point coordinate as the ending point coordinate of the current element as the subordinate element of the current element.
The above steps are performed for each element, thereby determining the number of lower elements and lower elements of each element (i.e., the number of lower connections in fig. 4).
Further, in step S105, the number of positions of each element is marked according to the node number, which specifically includes:
merging the same node numbers;
using an element with a starting point coordinate as the starting point node as a current position marking element, and marking the position number of the current position marking element;
using an element with the same node number of the starting point coordinate and the node number of the ending point coordinate of the current position marking element as the current position marking element, and marking the position number of the current position marking element;
repeating the previous step until the labeling of the position numbers of all the elements is completed.
Specifically, the same node numbers are combined before the position number is marked, and the circuit model is simplified, and as an example, fig. 10 shows a circuit model in which the node number marking is completed and the same node numbers are combined.
Then, marking the position number, wherein the sequential logic of the position number marking is similar to the logic of the node number marking, and the element with the node number of 1 of the starting point coordinate is used as the current position marking element, and the marking position number is 1; and then taking the element with the same node number as the node number 2 of the element marked at the current position of the starting point coordinate as the element marked at the current position, marking the position number as 2, repeating the steps, and adding 1 to the position number marked each time until the marking of the position numbers of all the elements is completed. Reference is specifically made to fig. 9 for an indication of the number of positions of the individual elements.
The extraction of the node number and the position number in the circuit model is completed, and the extraction of the circuit model is completed by generating a circuit model data extraction table comprising the element name, the node number and the position number. As shown in fig. 5, a circuit model data extraction table generated by the circuit model of fig. 2 after the above data extraction is shown.
Fig. 11 is a flowchart of an AutoCAD-based circuit model extraction method according to a preferred embodiment of the present application, including:
step S201: acquiring original position coordinates of each element in the circuit model, and generating an original coordinate table;
step S202: acquiring the element attribute of each element, and determining a corresponding topological relation;
step S203: according to the topological relation, the original coordinates of the input end are modified to the starting point coordinates, and the original coordinates of the output end are modified to the end point coordinates;
step S204: merging the elements with the same topological position coordinates to generate a topological element coordinate table;
step S205: acquiring the starting point coordinates of each element, and traversing the ending point coordinates of other elements;
step S206: if the end point coordinates of the other elements are not coincident with the start point coordinates, storing the start point coordinates into a start node list;
step S207: deleting repeated coordinates in the initial node list, and determining all coordinates in the initial node list as initial nodes of a circuit model;
step S208: searching starting point coordinates of other elements by taking the ending point coordinates of the current element as a reference;
step S209: determining an element with the same starting point coordinate as the ending point coordinate of the current element as a subordinate element of the current element;
step S210: using an element with a starting point coordinate as the starting point node as a starting element, and marking node numbers of the starting point coordinate and the end point coordinate according to the element attribute of the starting element;
step S211: taking a lower element of the initial element as a current node marking element;
step S212: marking node numbers of end point coordinates of the current node marking element according to the element attributes of the current node marking element;
step S213: if the node number labeling of all the elements is completed, step S215 is executed; otherwise, executing step S214;
step S214: taking a lower element of the current node marking element as the current node marking element, and returning to the step S212;
step S215: merging the same node numbers;
step S216: using an element with a starting point coordinate as the starting point node as a current position marking element, and marking the position number of the current position marking element;
step S217: if the labeling of the position numbers of all the elements is completed, executing step S219, otherwise executing step S218;
step S218: taking an element with the same node number of the starting point coordinate and the node number of the ending point coordinate of the current position marking element as the current position marking element, marking the position number of the current position marking element, and returning to the step S217;
step S219: a circuit model data extraction table including a component name, a node number, and a position number is generated.
The present application provides a storage medium storing computer instructions that, when executed by a computer, are configured to perform all the steps of the AutoCAD-based circuit model extraction method in any of the method embodiments described above.
Fig. 12 shows an electronic device of the present application, comprising:
at least one processor 121; the method comprises the steps of,
a memory 122 communicatively coupled to the at least one processor 121; wherein,
the memory 122 stores instructions executable by the at least one processor 121 to enable the at least one processor 121 to perform all the steps of the AutoCAD-based circuit model extraction method in any of the method embodiments described above.
An example of a processor 122 is illustrated in fig. 12:
the electronic device may further include: an input device 123 and an output device 124.
The processor 121, memory 122, input device 123, and display device 124 may be connected by a bus or other means, for example.
The memory 122 is used as a non-volatile computer readable storage medium, and may be used to store a non-volatile software program, a non-volatile computer executable program, and modules, such as program instructions/modules corresponding to the circuit model extraction method based on AutoCAD in the embodiment of the present application, for example, the method flows shown in fig. 1 and 11. The processor 121 executes various functional applications and data processing by running nonvolatile software programs, instructions, and modules stored in the memory 122, that is, implements the AutoCAD-based circuit model extraction method in the above-described embodiment.
Memory 122 may include a storage program area that may store an operating system, at least one application program required for functionality, and a storage data area; the storage data area may store data created according to the use of an AutoCAD-based circuit model extraction method, or the like. In addition, memory 122 may include high-speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other non-volatile solid-state storage device. In some embodiments, memory 122 optionally includes memory remotely located relative to processor 121, which may be connected via a network to a device performing the AutoCAD-based circuit model extraction method. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The input device 123 may receive input user clicks and generate signal inputs related to user settings and function controls of the AutoCAD-based circuit model extraction method. The display 124 may include a display device such as a display screen.
The AutoCAD-based circuit model extraction method in any of the method embodiments described above is performed when the one or more modules are stored in the memory 122 and when executed by the one or more processors 121.
What has been described above is merely illustrative of the principles and preferred embodiments of the present application. It should be noted that, for a person skilled in the art, embodiments which are obtained by appropriately combining the technical solutions respectively disclosed in the different embodiments are also included in the technical scope of the present invention, and that several other modifications are possible on the basis of the principles of the present application and should also be regarded as the protection scope of the present application.
Claims (8)
1. The circuit model extraction method based on AutoCAD is characterized by comprising the following steps:
acquiring original position coordinates of each element in the circuit model, and generating an original coordinate table;
modifying the original position coordinates in the original coordinate table according to the topological relation of each element to generate a topological element coordinate table;
searching the topological element coordinate table and determining an initial node of a circuit model;
marking node numbers of other nodes in the circuit model by taking the starting node as a starting point;
marking the position number of each element according to the node number;
generating a circuit model data extraction table comprising element names, node numbers and position numbers;
the searching of the topological element coordinate table and the determination of the initial node of the circuit model specifically comprise:
acquiring the starting point coordinates of each element, and traversing the ending point coordinates of other elements;
if the end point coordinates of the other elements are not coincident with the start point coordinates, storing the start point coordinates into a start node list;
deleting repeated coordinates in the initial node list, and determining all coordinates in the initial node list as initial nodes of a circuit model;
the marking of node numbers of other nodes in the circuit model by taking the starting node as a starting point specifically comprises the following steps:
determining a subordinate element of each element;
using an element with a starting point coordinate as the starting point node as a starting element, and marking node numbers of the starting point coordinate and the end point coordinate according to the element attribute of the starting element;
taking a lower element of the initial element as a current node marking element;
marking node numbers of end point coordinates of the current node marking element according to the element attributes of the current node marking element;
and taking the lower element of the current node marking element as the current node marking element, and repeating the previous step until node number marking of the end point coordinates of all the elements is completed.
2. The AutoCAD-based circuit model extraction method of claim 1, wherein the raw coordinate table includes a component name, a component attribute, and raw position coordinates.
3. The method for extracting an AutoCAD-based circuit model according to claim 2, wherein the modifying the original position coordinates in the original coordinate table according to the topological relation of each element to generate a topological element coordinate table specifically includes:
acquiring the element attribute of each element, and determining a corresponding topological relation;
modifying the original position coordinates of each element into topological position coordinates according to the topological relation;
and merging the elements with the same topological position coordinates to generate a topological element coordinate table.
4. The AutoCAD-based circuit model extraction method according to claim 3, wherein the original position coordinates include input end original coordinates and output end original coordinates;
the modifying the original position coordinates of each element to topological position coordinates according to the topological relation specifically comprises:
and according to the topological relation, modifying the original coordinates of the input end into starting point coordinates and modifying the original coordinates of the output end into end point coordinates.
5. The method for extracting an AutoCAD-based circuit model according to claim 1, wherein the determining a subordinate element of each element specifically includes:
searching starting point coordinates of other elements by taking the ending point coordinates of the current element as a reference;
and determining the element with the same starting point coordinate as the ending point coordinate of the current element as the subordinate element of the current element.
6. The method for extracting an AutoCAD-based circuit model according to claim 1, wherein the labeling the number of positions of each element according to the node number specifically comprises:
merging the same node numbers;
using an element with a starting point coordinate as the starting point node as a current position marking element, and marking the position number of the current position marking element;
using an element with the same node number of the starting point coordinate and the node number of the ending point coordinate of the current position marking element as the current position marking element, and marking the position number of the current position marking element;
repeating the previous step until the labeling of the position numbers of all the elements is completed.
7. A storage medium storing computer instructions which, when executed by a computer, are adapted to carry out all the steps of the AutoCAD-based circuit model extraction method according to any one of claims 1 to 6.
8. An electronic device, comprising:
at least one processor; the method comprises the steps of,
a memory communicatively coupled to the at least one processor; wherein,
the memory stores instructions executable by the at least one processor to enable the at least one processor to perform all the steps of the AutoCAD-based circuit model extraction method as claimed in any one of claims 1 to 6.
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