CN103544359A - Secondary loop simulation method for substation simulation training system - Google Patents
Secondary loop simulation method for substation simulation training system Download PDFInfo
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Abstract
The invention discloses a secondary loop simulation method for a substation simulation training system. The secondary loop simulation method includes the steps: building a component math model according to component properties of a secondary loop; reordering node arrays in a breadth-first search mode; forming a loop unit in a depth-first search mode; calculating all node voltage; receiving and processing input of the substation simulation training system; calculating node voltage in the loop according to loop state change conditions. Topology is simplified by taking the loop as a unit according to the characteristics of loop connection, the operating state of a main trunk circuit of the loop is analyzed, finally, the loop is reversely pushed back to an original topological network, and simulation of an electrical network of the whole secondary loop is analyzed.
Description
Technical field
The present invention relates to a kind of secondary circuit simulation method, relate in particular to a kind of secondary circuit simulation method for Substation Training Simulator, belong to Simulating technique in Electric Power System field.
Background technology
As everyone knows, the electrical equipment of electric system is divided into primary equipment and secondary device.Primary equipment is the main body that forms electric system, and it is the equipment of direct production, conveying and distribution electric energy, comprises generator, power transformer, isolating switch, disconnector, power bus-bar, power cable and transmission line of electricity etc.Secondary device is the equipment that primary equipment is controlled, regulates, protected and monitors, and it comprises controling appliance, relay protection and aut.eq., measurement instrument, signal utensil etc.Secondary device is obtained electrical link by voltage transformer (VT) summation current transformer and primary equipment.The loop of primary equipment and connection thereof is called primary circuit.The electric loop that secondary device couples together to realize certain technical requirement according to certain rule is called secondary circuit.This secondary circuit comprises control, adjusting, relay protection and aut.eq., measurement and the signal circuit of generating plant and substation primary equipment and operating power system etc.
Continuous expansion along with electric system scale; transformer station's first and second system is day by day complicated; also more and more higher to power transformation operation, relay protection professional's theoretical rope matter and level of skill requirement, the training of secondary circuit related service is also had higher requirement simultaneously.Due to electric system self, depend theoretical analysis alone and be often difficult to obtain comprehensive knowledge, must combine and could obtain more comprehensive working experience with experimental study.The experimental technique of electric system can carry out in practical power systems, also can on electric system simulation model, carry out.At present, oneself becomes effective training tool of domestic power transformation operation professional Substation Training Simulator, but it cannot be directly used in the training of power transformation operation, relay protection professional secondary circuit level of skill.
In existing secondary circuit simulation method, secondary circuit real-time analysis method has a lot, is mainly summarized as two classes:
One class is similar with analysis electric system primary network, need to set up incidence matrix.When analyzing secondary circuit, these class methods need to do a lot of hypothesis, the nonlinear problem of avoiding model by simplifying loop.Compare with electrical network primary network, secondary circuit also exists in large scale, element characteristic complicated situation, calculates incidence matrix and is on a grand scale.
Another kind of be switching network is carried out abstract, with graph theory alanysis methods analyst loop element connected relation.These class methods are very effective when analyzing secondary circuit regular event logic, but because the method has been ignored component resistance, make its in loop, come in contact bad, when the faults such as transition resistance eutral grounding accurate decision element the result of the action, also cannot be provided for the measurement data (node voltage) of looking up the fault, for secondary circuit, emulation is significant deficiency for this.
Summary of the invention
For the existing deficiency of prior art, technical matters to be solved by this invention is to provide a kind of secondary circuit simulation method for Substation Training Simulator.
For realizing above-mentioned goal of the invention, the present invention adopts following technical scheme:
A secondary circuit simulation method for Substation Training Simulator, comprises the following steps:
According to secondary circuit component attributes, set up element mathematical model;
Adopt BFS (Breadth First Search) mode, node array is resequenced;
Adopt depth-first search mode, form circuit units;
Calculate all node voltages;
Receive input the processing of Substation Training Simulator;
According to loop state, change node voltage in situation counter circuit.
Wherein more preferably, the described step of setting up element mathematical model according to secondary circuit component attributes further comprises:
According to the physical characteristics of secondary circuit element to secondary circuit part classification;
According to the topological property of secondary circuit element, electrical specification, action logic, set up element mathematical model.
Wherein more preferably, the described step to the rearrangement of node array further comprises:
Element array is carried out to initialization;
Read in next component data, 0, within the scope of component population, judged whether that element is connected with current element;
If described element is connected with new element, described new element group is deposited in next element array, after original next element array, move, component population is added to 1 simultaneously, then read in next element repetition above-mentioned steps;
If this element is connected with new element, this element is deposited in element array, component population is added to 1 simultaneously, then read in next component data repetition above-mentioned steps;
According to above-mentioned steps, circulate successively, until travel through all elements.
Wherein more preferably, the step of described employing depth-first search mode further comprises:
First search out all major loops, then search for all branches, form circuit units.
Wherein more preferably, the step that searches out all major loops described in further comprises:
First initialization loop bypass elements information array, starts search from positive bus-bar;
Judged whether that element is connected, if do not have element array to be connected, search finishes;
If had, deposit interim loop in, continue whether the decision element array other end is negative busbar, now circuit branch sum adds 1;
If the other end is negative busbar, interim loop is deposited in to circuit branch component information array, and described in mark, all elements of circuit branch component information array were searched for, continue to start search from positive bus-bar;
If the other end is not negative busbar, judge that the other end whether in loop, adds 1 by circuit branch sum;
If the other end, in loop, deposits interim loop in circuit branch component information array, and all elements of mark circuit branch component information array searched for, continued to start search from positive bus-bar;
If the other end not in loop, judges whether that element array is connected in addition, continue search until search for complete.
Wherein more preferably, the step of described search all branches further comprises:
Step 1: the loop that traversal search arrives and branch road, 0, in element array maximum range, all whether decision node institute Connection Element searched mistake;
Step 2: if described node institute Connection Element was not searched for, continue to judge whether element that described node connects has the element of not searching for;
Step 3: if the element that element that described node connects was not searched for returns;
Step 4: if element that described node connects has the element of not searching for, element that described node connects is deposited in to interim loop, from current element search, until read in node or the unsettled node in loop;
Step 5: if last node is unsettled, and do not empty interim loop, return to step 2;
Step 6: if final node is not unsettled node, deposit interim loop in circuit branch component information array, in this circuit branch component information array of mark, all elements were searched for, returned to step 2.
Wherein more preferably, the step of all node voltages of described calculating further comprises:
Simplify and process the short-circuit component of series connection and short-circuit component in parallel;
Calculate branchiess loop node voltage, push back and calculate global node voltage.
Wherein more preferably, the step of the short-circuit component of simplification processing series connection further comprises:
0, in element array maximum range, whether decision element array current state is short circuit Qie Wu branch state successively;
If so, merge switch array two end nodes, continue to simplify the short-circuit component of other series connection;
If not, directly return to the short-circuit component that continues to simplify other series connection, until the short-circuit component of all series connection is all simplified and is disposed.
Wherein more preferably, step that simplify to process short-circuit component in parallel further comprises:
0, in element array maximum range, judge successively whether this node has branch;
If there is no branch, return and simplify other short-circuit components in parallel;
If there is branch, travel through all branch roads that this node starts, and whether judgement line state is that to be communicated with and current element resistance value is set be 0;
If do not meet above-mentioned condition, return and simplify other short-circuit components in parallel;
If meet above-mentioned condition, merge branch road and after node, return to other short-circuit components in parallel of simplification end to end.
Wherein more preferably, the step that pushes back calculating global node voltage described in further comprises:
Calculate branchiess loop node voltage;
Calculate current element resistance value and be not 0 parallel branch node voltage;
From calculating the node of voltage, search for the node of short circuit with it, give magnitude of voltage;
Branch road and loop node are cut-off in search, give magnitude of voltage;
Remaining node is put to isolated node sign.
Compared with prior art, the present invention has following beneficial effect: secondary loop current, key point voltage directly adopt Ohm law to calculate rapidly and accurately, according to node voltage computational data, can analyze more accurately, judge the action situation of secondary circuit, there is not extensive matrix computations, calculated amount is reduced greatly, can be looking up the fault measurement data is provided.
Accompanying drawing explanation
Fig. 1 is the overall flow schematic diagram of secondary circuit simulation method provided by the present invention;
Fig. 2 is the mathematical model exemplary plot of terminal i;
Fig. 3 is the schematic diagram of secondary circuit circuit node rearrangement;
Fig. 4 is BFS (Breadth First Search), the schematic diagram of node rearrangement;
Fig. 5 is the schematic flow sheet of BFS (Breadth First Search);
Fig. 6 is the schematic diagram that secondary circuit circuit node forms circuit units;
Fig. 7 is depth-first search, starts the schematic flow sheet of searching loop from positive bus-bar;
Fig. 8 is depth-first search, the schematic flow sheet of search parallel branch;
Fig. 9 is the secondary circuit circuit diagram before simplifying;
Figure 10 is the secondary circuit circuit diagram of simplifying after open circuit;
Figure 11 is the secondary circuit circuit diagram of simplifying after series element;
Figure 12 is the secondary circuit circuit diagram of simplifying after element in parallel;
Figure 13 simplifies the schematic flow sheet of processing series connection short-circuit component;
Figure 14 simplifies the schematic flow sheet of processing parallel connection short circuit element;
Figure 15 is the schematic flow sheet that pushes back global node voltage;
Figure 16 arranges the secondary circuit circuit diagram that virtual component is realized fault simulation;
Figure 17 is the schematic flow sheet that recalculates the loop node voltage of state change.
Embodiment
Below in conjunction with the drawings and specific embodiments, the present invention is described in further detail.
As shown in Figure 1, the invention provides a kind of secondary circuit simulation method for Substation Training Simulator, comprise the steps: to set up element mathematical model according to secondary circuit component attributes; Adopt BFS (Breadth First Search) mode, node array is resequenced; Adopt depth-first search mode, form circuit units; Calculate all node voltages; Receive input the processing of Substation Training Simulator; According to loop state, change node voltage in situation counter circuit.The concrete operation step of this secondary circuit simulation method is launched to detailed explanation below.
First, introduce the step of setting up element mathematical model according to secondary circuit component attributes.
In the present invention, according to the physical characteristics of secondary circuit element by secondary circuit part classification.Secondary circuit element is divided into wire, terminal, contact, relay, change-over switch, resistance six classes.According to the topological property of secondary circuit element, electrical specification, action logic, set up element mathematical model.
As shown in Figure 2, take terminal below as preference, to setting up the step of element mathematical model, describe in detail.Terminal belongs to both-end element, so the topological attribute of terminal can define with two end nodes, a deciliter state.For example, when normal, terminal resistance is 0 can ignore; But while having loose contact etc. abnormal, may there is transition resistance, need to increase resistance attribute.Because terminal belongs to manual operation element, self attonity logic.In addition, according to the needs of Substation Training Simulator, need to increase other attributes such as element color, initial deciliter state, current element Exception Type.The mathematical model of setting up terminal component is as shown in table 1:
The mathematical model of table 1 terminal component
Most of secondary circuit elements are both-end element, and elements such as the two-position relay in secondary circuit, change-over switch also can be decomposed into n both-end element.Therefore, for convenience of topology search, when topology search, ignore component type, electric attribute etc., deposit in element array (cb) for on-off element all elements are abstract.This element array recording element topological property, for example the first and last node of element.In addition, defined node array (nd), node array records the ranking results of BFS (Breadth First Search) and the node voltage that loop analysis calculates.
As shown in Figure 2, between each element and element array, node array, be relation one to one.Terminal i, element j, node k, node n are the form respondings of array.Wherein terminal i array, comprises terminal title id, headend node nd, endpoint node znd, element sequence number i_cb, headend node sequence number i_nd, endpoint node sequence number i_znd; Element j array comprises element title id, headend node nd, endpoint node znd, headend node sequence number i_nd, endpoint node sequence number i_znd; Node k array comprises nodename id, a node institute adaper element sequence number p_cb1, node voltage.
Secondly, introduce the BFS (Breadth First Search) mode that adopts, the step to the rearrangement of node array.
BFS (Breadth First Search) mode simply says to be exactly from root node to endpoint node, one by one layering traversal.In the present invention, till searching negative busbar from positive bus-bar.The typical secondary circuit of take below as shown in Figure 3 launches explanation to BFS (Breadth First Search) mode as example.
As shown in Figure 3, Figure 4, from positive bus-bar, to negative busbar, finish.Positive bus-bar is labeled as to node 0, and the wire being connected with positive bus-bar has two, and the breakpoint place of article one wire is labeled as node 1, and second wire is connected with positive bus-bar, is all node 0; Then through two element relays and diode, the vertex ticks after relay is node 2, and the vertex ticks after diode is node 3; From node 2s through resistive element, arrive negative busbar, negative busbar is labeled as to node 4; Vertex ticks from node 3s after resistance is node 5; From node 5s, through relay element and capacity cell, by the vertex ticks after relay, be node 6, the vertex ticks after electric capacity is node 7; From node 6s through resistive element, arrive negative busbar node 4, the vertex ticks from node 7s after resistance is node 8, arrives again negative busbar node 4 after element; BFS (Breadth First Search) completes.
As shown in Figure 5, first element array is carried out to initialization, now component population (lv_cb) is 0.Read in next component data, 0, within the scope of component population, judged whether that element array is connected with this element array.If this element array is connected with new element array, this new element array is deposited in next element array (cb[i+1]), after original next element array (cb[i+1]), move, component population is added to 1(Lv_cb++) simultaneously.Read in again next element array circulation.If do not have element array to be connected with this element array 0 within the scope of component population, this element array is deposited in and take in the element array that component population is element title (cb[lv_cb]), component population is added to 1(Lv_cb++ simultaneously), then read in next component data circulation.Circulation successively according to the method described above, until traveled through all element arrays.
Again, introduce the depth-first search mode that adopts, form circuit units.
Depth-first search mode is according to a certain direction, first search out all major loops and (from positive bus-bar to negative busbar, only have a circuit, there is no branch road), then in the element of remaining not search part, combing goes out all branches (node has at least not on little bus end to end), and all loops and branch road Search Results exist in circuit branch component information array (loop).While searching out all major loops, for DC loop, from positive bus-bar to negative busbar; Ac circuit, from phase-splitting power supply point to neutral point.In the present invention, take DC loop as preference, and ac circuit computing method are similar.While adopting depth-first search mode to search for, only need to judge the annexation of two nodes, not need decision element deciliter state.
The typical secondary circuit of take below is as shown in Figure 3 as example is to using depth-first search mode, and the step that forms circuit units describes in detail.As shown in Figure 6, node 0, node 2 are first round search major loop with the loop of node 4 processes; The part of node 0, node 3, node 5, node 6 and node 4 processes, part with node 5, node 7, node 8 and node 4 processes, these two parts are second to take turns search parallel branch, now in circuit branch component information array, are limited to 2, on circuit branch sum (lv_loop), are limited to 3.Through two-wheeled search, remaining branch road, node do not participate in loop and calculate, and only need, after having calculated loop current, voltage, by topology search, judge that remaining node is with the connected state that has electrical nodes.During to typical secondary circuit depth-first search shown in Fig. 6, depth-first search program's flow process of two-wheeled search as shown in Figure 6, Figure 7.
First round search as shown in Figure 7, initialization loop bypass elements information array first, now circuit branch adds up to 0.From positive bus-bar node, judged whether that element array is connected, if do not have element array to be connected, search finishes; If had, deposit interim loop in, continue whether the decision element array other end is negative busbar, now circuit branch sum adds 1(lv_loop++); If the other end is negative busbar, interim loop is deposited in to circuit branch component information array (loop[lv_loop]), and all elements of this circuit branch component information array of mark searched for, continue from positive bus-bar; If the other end is not negative busbar, judge that the other end is whether in loop, circuit branch sum need be added to 1(lv_loop++), if the other end is in loop, deposit interim loop in circuit branch component information array (loop[lv_loop]), and all elements of mark circuit branch component information array searched for, continue from positive bus-bar; If not in loop, judge whether that element array is connected in addition, continue judgement below.
Second takes turns search as shown in Figure 8, and whether all loop and branch road that the traversal first round searches in element array maximum range, judge this node array institute Connection Element array searched mistake 0; If do not searched for, continue to judge that this node array connects the element array whether element array did not search in addition; If the element array of not searching for, returns; If there is the element array of not searching for, deposit interim loop in, from this parts number group searching, go down, until search node or the unsettled node that reads in loop; If last node is unsettled, and do not empty interim loop, return and judge whether that this node array connects the element array that element array was not searched in addition; If final node is not unsettled node, deposit interim loop in circuit branch component information array (loop[lv_loop]), the all elements of this circuit branch component information array (loop) of mark were searched for, returned and judged whether that this node array connects the element array whether element array did not search in addition.Component information array is deposited the component information that all loops and branch road comprise, and each circuit branch component information array is a random length array, by sequentially deposit the numbering of all elements this loop from positive bus-bar to negative busbar direction.
Again, introduce the step of calculating all node voltages.
Complete after topology search, sequence, carry out global calculation one time, calculate all node voltages.Consider the singularity of secondary circuit, its majority is to be parallel between two power source buss, does not affect mutually, can be decomposed into each independent loop completely and calculate.And secondary circuit element is mostly on-off element (only have a deciliter two states, resistance can be ignored), therefore, after merging parallel branch and series arm, loop finally can be reduced to a resistance mostly.And under loop opening state, can determine node voltage by topological connectivity search.On the basis of analyzing in above topology, deciliter state of binding member, judges the connected state in all loops.If branch road is off-state, do not merge processing.As shown in Figure 9, R
6branch road open circuit, does not participate in joint account.As shown in figure 10, if branch road is connected state, merged to major loop.R
4, R
5series connection, merges and is reduced to R as shown in figure 11
7.R
7with R
2parallel connection, obtains R after merging
8, be finally reduced to a loop that there is no branch as shown in figure 12, adopt Ohm law directly according to two ends busbar voltage, to calculate key node voltage V
1, V
2; According to the voltage of major loop key node, oppositely push back again, can calculate the node voltage of all branch roads that merge to major loop.The method that the circuit shown in Figure 10 of take is below example explanation calculating branch node voltage, according to node voltage V
1, V
2can calculate node voltage V
3, computing formula is
V
3=V
1-(V
1–V
2)×R
4/(R
4+R
5)。
Substation secondary circuit is simplified to simple single directed circuit and calculate all node voltages step method as shown in FIG. 13 to 15.
The 1st step, simplifies the short-circuit component of processing series connection.As shown in figure 13,0, in element array maximum range, whether decision element array current state is short circuit Qie Wu branch state successively, if so, merges element array two ends node, continues to simplify the short-circuit component of other series connection; If not, directly return to the short-circuit component that continues to simplify other series connection, until the short-circuit component of all series connection is all simplified and is disposed.
The 2nd step, simplifies and processes short-circuit component in parallel.As shown in figure 14,0, in element array maximum range, judge successively whether this node has branch; If there is no branch, return and simplify other short-circuit components in parallel; If there is branch, travel through all branch roads that this node starts, and whether judgement line state is that to be communicated with and current element resistance value is set be 0(r=0); If do not satisfied condition, return and simplify other short-circuit components in parallel; If satisfied condition, merge branch road and after node, return to other short-circuit components in parallel of simplification end to end.
The 3rd step, pushes back node voltage.As shown in figure 15, the branchiess loop of computational short cut node voltage; Calculate current element resistance value for 0(r ≠ 0) parallel branch node voltage; From calculating the node of voltage, search for the node of short circuit with it, give magnitude of voltage; Branch road and loop node are cut-off in search, give magnitude of voltage; Remaining node is put to isolated node sign.
Again, introduce and receive the input of Substation Training Simulator the step of processing.
After Substation Training Simulator operation, receive in real time transformer station's one secondary device operation and think and cause the defect arranging thus after secondary circuit element generation state variation, system is only calculated this element place branch road or loop current, voltage.Consider actuating of relay logic, this computation process may circulate repeatedly by secondary circuit sequence of movement, until do not have element generation state to change in loop again.Substation Training Simulator receives transformer station's one secondary device operation information, changes the state of secondary circuit element after processing; Secondary circuit simulation software real time scan database, detects secondary circuit element state.Defect emulation, secondary circuit element is divided into short circuit, open circuit, ground connection and change in resistance four classes extremely, by increase virtual component (short-circuit conductors, earth lead, resistance etc.) or modified elements state in circuit branch component information array (loop), realizes the simulation of malfunction.
As shown in figure 16, defect is set, terminal 1 is through transition resistance eutral grounding: between terminal 1 earth terminal and ground, add a virtual resistance element, only in the circuit branch component information array of calculating use, add, and be labeled as virtual component, do not affect the topological structure of original secondary circuit, can realize simulation terminal 1 through the fault of transition resistance eutral grounding.
Finally, according to loop state, change node voltage in situation counter circuit.
Press secondary circuit sequence of movement, the circulation branch road that repeatedly calculating comprises state variation element or the node voltage in loop.As shown in figure 17, element state upgrades, if element detected, (for example upgrades, action or element are abnormal), to revise and merge rear loop element information array (loop1), loop, index member place is recalculated, judge whether relay moves or involution, if do not changed, finish to calculate; If changed, return, so node voltage in cycle calculations loop.
In sum, the present invention is converted into secondary circuit topological analysis and equivalent-simplification by secondary circuit analytical calculation, after simplifying, directly utilize Ohm law to calculate key node voltage, then according to loop topology relation and element electrical specification, calculate the whole network node, there is not extensive matrix computations, can realize fast and accurately secondary circuit node voltage and calculate.The present invention can analyze, judge the result of the action of secondary circuit element more accurately according to node voltage computational data.
Above the secondary circuit simulation method for Substation Training Simulator provided by the present invention is had been described in detail.For one of ordinary skill in the art, any apparent change of under the prerequisite that does not deviate from connotation of the present invention, it being done, all will form infringement of patent right of the present invention, will bear corresponding legal liabilities.
Claims (10)
1. for a secondary circuit simulation method for Substation Training Simulator, it is characterized in that, comprise the steps:
According to secondary circuit component attributes, set up element mathematical model;
Adopt BFS (Breadth First Search) mode, node array is resequenced;
Adopt depth-first search mode, form circuit units;
Calculate all node voltages;
Receive input the processing of Substation Training Simulator;
According to loop state, change node voltage in situation counter circuit.
2. secondary circuit simulation method as claimed in claim 1, is characterized in that, the described step of setting up element mathematical model according to secondary circuit component attributes further comprises:
According to the physical characteristics of secondary circuit element to secondary circuit part classification;
According to the topological property of secondary circuit element, electrical specification, action logic, set up element mathematical model.
3. secondary circuit simulation method as claimed in claim 1, is characterized in that, the described step to the rearrangement of node array further comprises:
Element array is carried out to initialization;
Read in next component data, 0, within the scope of component population, judged whether that element is connected with current element;
If described element is connected with new element, described new element is deposited in next element array, after original next element array, move, component population is added to 1 simultaneously, then read in next element repetition above-mentioned steps;
If this element is connected with new element, this element is deposited in element array, component population is added to 1 simultaneously, then read in next component data repetition above-mentioned steps;
According to above-mentioned steps, circulate successively, until travel through all elements.
4. secondary circuit simulation method as claimed in claim 1, is characterized in that, the step of described employing depth-first search mode further comprises:
First search out all major loops, then search for all branches, form circuit units.
5. secondary circuit simulation method as claimed in claim 4, is characterized in that, described in search out all major loops step further comprise:
First initialization loop bypass elements information array, starts search from positive bus-bar;
Judged whether that element is connected, if do not have element array to be connected, search finishes;
If had, deposit interim loop in, continue whether the decision element array other end is negative busbar, now circuit branch sum adds 1;
If the other end is negative busbar, deposit interim loop in circuit branch component information array, and described in mark, all elements of circuit branch component information array were searched for, continue to start search from positive bus-bar;
If the other end is not negative busbar, judge that the other end whether in loop, adds 1 by circuit branch sum;
If the other end, in loop, deposits interim loop in circuit branch component information array, and all elements of mark circuit branch component information array searched for, continued to start search from positive bus-bar;
If the other end not in loop, judges whether that element array is connected in addition, continue search until search for complete.
6. secondary circuit simulation method as claimed in claim 4, is characterized in that, the step of described search all branches further comprises:
Step 1: the loop that traversal search arrives and branch road, 0, in element array maximum range, all whether decision node institute Connection Element searched mistake;
Step 2: if described node institute Connection Element was not searched for, continue to judge whether element that described node connects has the element of not searching for;
Step 3: if the element that element that described node connects was not searched for returns;
Step 4: if the element that element that described node connects was not searched for deposits element that described node connects in interim loop, start search from this element, until read in node or the unsettled node in loop;
Step 5: if last node is unsettled, and do not empty interim loop, return to step 2;
Step 6: if final node is not unsettled node, deposit interim loop in circuit branch component information array, in this circuit branch component information array of mark, all elements were searched for, returned to step 2.
7. secondary circuit simulation method as claimed in claim 1, is characterized in that, the step of all node voltages of described calculating further comprises:
Simplify and process the short-circuit component of series connection and short-circuit component in parallel;
Calculate branchiess loop node voltage, push back and calculate global node voltage.
8. secondary circuit simulation method as claimed in claim 7, is characterized in that the step of simplifying the short-circuit component of processing series connection further comprises:
0, in element array maximum range, whether decision element array current state is short circuit Qie Wu branch state successively;
If so, merge switch array two end nodes, continue to simplify the short-circuit component of other series connection;
If not, directly return to the short-circuit component that continues to simplify other series connection, until the short-circuit component of all series connection is all disposed.
9. secondary circuit simulation method as claimed in claim 7, is characterized in that simplifying the step of processing short-circuit component in parallel and further comprises:
0, in element array maximum range, judge successively whether this node has branch;
If there is no branch, return and simplify other short-circuit components in parallel;
If there is branch, travel through all branch roads that this node starts, and whether judgement line state is that to be communicated with and current element resistance value is set be 0;
If do not meet above-mentioned condition, return and simplify other short-circuit components in parallel;
If meet above-mentioned condition, merge branch road and after node, return to other short-circuit components in parallel of simplification end to end.
10. secondary circuit simulation method as claimed in claim 7, is characterized in that, described in push back the step of calculating global node voltage and further comprise:
Calculate branchiess loop node voltage;
Calculate current element resistance value and be not 0 parallel branch node voltage;
From calculating the node of voltage, search for the node of short circuit with it, give magnitude of voltage;
Branch road and loop node are cut-off in search, give magnitude of voltage;
Remaining node is put to isolated node sign.
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| CN104142451A (en) * | 2014-06-16 | 2014-11-12 | 贵州电网公司培训与评价中心 | Method and system for achieving checking simulation of secondary circuit simulated failure in electric system |
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| CN106599073A (en) * | 2016-11-23 | 2017-04-26 | 国网辽宁电力调度控制中心 | Recursive traversal rapid diagram forming method for primary wiring diagram pixels based on D5000 |
| CN108170871A (en) * | 2016-12-07 | 2018-06-15 | 中国电力科学研究院 | For the element browsing method of electro-magnetic transient topological data and pattern layout method |
| CN111044820A (en) * | 2019-12-19 | 2020-04-21 | 深圳供电局有限公司 | Transformer substation intelligent secondary interface fault removing device and method |
| CN113435123A (en) * | 2021-07-05 | 2021-09-24 | 江苏核电有限公司 | Three-dimensional simulation training method for secondary circuit of transformer substation cabinet based on 3D technology |
| CN117079509A (en) * | 2023-08-16 | 2023-11-17 | 西南石油大学 | Engineering equipment defect detection system and method for college practical training |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104142451A (en) * | 2014-06-16 | 2014-11-12 | 贵州电网公司培训与评价中心 | Method and system for achieving checking simulation of secondary circuit simulated failure in electric system |
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| CN104360183A (en) * | 2014-06-26 | 2015-02-18 | 许继电气股份有限公司 | Method for abnormality detection of simulated secondary loop of intelligent transformer substation |
| CN106599073A (en) * | 2016-11-23 | 2017-04-26 | 国网辽宁电力调度控制中心 | Recursive traversal rapid diagram forming method for primary wiring diagram pixels based on D5000 |
| CN108170871A (en) * | 2016-12-07 | 2018-06-15 | 中国电力科学研究院 | For the element browsing method of electro-magnetic transient topological data and pattern layout method |
| CN111044820A (en) * | 2019-12-19 | 2020-04-21 | 深圳供电局有限公司 | Transformer substation intelligent secondary interface fault removing device and method |
| CN113435123A (en) * | 2021-07-05 | 2021-09-24 | 江苏核电有限公司 | Three-dimensional simulation training method for secondary circuit of transformer substation cabinet based on 3D technology |
| CN117079509A (en) * | 2023-08-16 | 2023-11-17 | 西南石油大学 | Engineering equipment defect detection system and method for college practical training |
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