CN113190467A - Address compiling method and device - Google Patents
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- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
Abstract
The invention discloses an address compiling method and device, which are applied to main equipment, and the method comprises the following steps: the master equipment carries out address compilation; when the address of the main equipment is programmed, changing the state from the un-programmed state to the programmed state; sending the identification signal of the state change to the connected adjacent slave equipment, so that the adjacent slave equipment can make a statement according to the return address of the identification signal; and sending an address programming signal to the adjacent slave equipment according to the address programming request so that the adjacent slave equipment can carry out address programming according to the address programming signal. The problem of the relatively poor flexibility of the existing multi-device address allocation is solved.
Description
Technical Field
The invention relates to the technical field of computers, in particular to an address compiling method and device.
Background
Where multiple devices communicate with each other, different addresses are required to distinguish each device.
The existing address forms are generally divided into two types. One is a hardware address, and the number of bits of the address is determined by the number of ways of the hardware. The number of bits of a determined address is difficult to change; but also requires a person to individually set a unique address for each board, which is less flexible.
The other is an address in software: a fixed value is defined in software and is burnt into a single chip microcomputer. Because each board requires a separate version of the software, flexibility is poor.
Therefore, the existing multi-device address allocation has poor flexibility.
Disclosure of Invention
The invention mainly aims to provide an address compiling method and device, and aims to solve the problem that the existing multi-device address allocation is poor in flexibility.
In order to achieve the above object, the present invention provides an address mapping method applied to a master device, where the address mapping method includes the following steps:
the master equipment carries out address compilation;
when the address of the main equipment is programmed, changing the state from an un-programmed state to a programmed state;
sending an identification signal of the state change to a connected adjacent slave device, so that the adjacent slave device can return an address to be declared according to the identification signal;
and sending an address programming signal to the adjacent slave equipment according to the address programming request so that the adjacent slave equipment can carry out address programming according to the address programming signal.
In one embodiment, the method further comprises:
and when the address programming signal is not received within a first preset time interval after the power-on, executing the step of address programming of the main equipment.
In an embodiment, before the step of addressing by the master device, the method further includes:
and sending the master device information to each slave device.
In one embodiment, the method further comprises:
when an address programming signal is received within a first preset time interval after the power-on, switching the state of the master device into a slave device;
and sending the information of master equipment switching to each slave equipment.
In an embodiment, after the step of sending the identification signal of the state change to the connected neighboring slave device, the method further includes:
when receiving the address compiled statement sent by the slave device, sending a control signal to the slave device, so that the slave device sends an identification signal of state change to a connected adjacent slave device after receiving the control signal.
The invention also provides an address compiling method applied to the slave equipment, wherein the address compiling method comprises the following steps:
after receiving the identification signal of the state change, sending an address programming request to the main equipment;
after receiving an address programming signal sent by the master device, changing the state of the slave device from an un-programmed state to a programmed state;
the slave device transmits an identification signal of the state change to the connected neighboring slave device.
In an embodiment, after the step of changing the state of the slave device from the non-programmed state to the programmed state after receiving the address programming signal sent by the master device, the method further includes:
the slave device sends an address formulated declaration to the master device.
In one embodiment, the step of the slave device sending an address formulated declaration to the master device is followed by:
and after receiving the control signal sent by the master device according to the address formulated statement, executing the step of sending the identification signal of the state change to the connected adjacent slave device by the slave device.
In one embodiment, the address preparation method further includes:
when the slave device detects that the master device fails and the slave device is an adjacent slave device of the master device, the slave device is switched to a master device state;
and sending prompt information of switching the master equipment to each slave equipment.
To achieve the above object, the present invention further provides an address programming device, which comprises a memory, a processor and an address programming program stored in the memory and executable on the processor, wherein the address programming program, when executed by the processor, implements the steps of the address programming method as described above.
The invention provides an address compiling method and device.A piece of address compiling software in main equipment carries out address compiling on the main equipment, and when the address compiling of the main equipment is finished, the main equipment changes the address state from an un-compiled state to a compiled state, which indicates that the address compiling of the main equipment is finished; the master device sends the identification signal with the changed state to the adjacent slave device to inform the adjacent slave device of address compilation, so that the adjacent slave device returns an address compiled statement according to the address identification signal; after receiving the address programming request sent by the adjacent slave equipment, the master equipment sends an address programming signal to the adjacent slave equipment according to the address programming request, so that address programming software in the adjacent slave equipment can perform address programming according to the address programming signal. The method can be applied to address compilation of a plurality of devices (batch products), the plurality of devices use the same software to perform address compilation, the number of address bits is not restricted by hardware, and the flexibility of setting the number of address bits is increased. Therefore, the problem that the flexibility of the existing multi-device address allocation is poor is solved.
Drawings
Fig. 1 is a schematic diagram of a hardware architecture of an apparatus according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of an addressing system according to the present invention;
FIG. 3 is a flowchart illustrating a first embodiment of an address translation method according to the present invention;
FIG. 4 is a flowchart illustrating a second embodiment of an address translation method according to the present invention;
FIG. 5 is a flowchart illustrating a third embodiment of an address translation method according to the present invention;
FIG. 6 is a flowchart illustrating a fourth embodiment of an address translation method according to the present invention;
FIG. 7 is a flowchart illustrating a fifth embodiment of an address translation method according to the present invention;
FIG. 8 is a flowchart illustrating a sixth embodiment of an address translation method according to the present invention;
FIG. 9 is a flowchart illustrating an address translation method according to a seventh embodiment of the present invention;
FIG. 10 is a flowchart illustrating an address translation method according to an eighth embodiment of the present invention;
FIG. 11 is a flowchart illustrating a ninth embodiment of an address translation method according to the present invention.
Detailed Description
It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
The main solution of the embodiment of the invention is as follows: address programming software in the main equipment performs address programming on the main equipment, and when the address programming of the main equipment is finished, the main equipment changes the address state from an un-programmed state to a programmed state, which indicates that the address programming of the main equipment is finished; the master device sends the identification signal with the changed state to the adjacent slave device to inform the adjacent slave device of address compilation, so that the adjacent slave device returns an address compiled statement according to the address identification signal; after receiving the address programming request sent by the adjacent slave equipment, the master equipment sends an address programming signal to the adjacent slave equipment according to the address programming request, so that address programming software in the adjacent slave equipment can perform address programming according to the address programming signal. The method can be applied to address compilation of a plurality of devices (batch products), the plurality of devices use the same software to perform address compilation, the number of address bits is not restricted by hardware, and the flexibility of setting the number of address bits is increased. Therefore, the problem that the flexibility of the existing multi-device address allocation is poor is solved.
As an implementation manner, as shown in fig. 1, fig. 1 is a schematic diagram of a hardware architecture of a device according to an embodiment of the present invention.
The embodiment of the invention relates to a processing device of audio and video files, which comprises: a processor 101, e.g. a CPU, a memory 102, a communication bus 103. Wherein a communication bus 103 is used for enabling the connection communication between these components.
The memory 102 may be a high-speed RAM memory or a non-volatile memory (e.g., a disk memory). As shown in FIG. 1, memory 102, which is a type of computer storage medium, may include an addressing program therein; and the processor 101 may be configured to call an address programming program stored in the memory 102 and perform the following operations:
the master equipment carries out address compilation;
when the address of the main equipment is programmed, changing the state from an un-programmed state to a programmed state;
sending an identification signal of the state change to a connected adjacent slave device, so that the adjacent slave device can return an address to be declared according to the identification signal;
and sending an address programming signal to the adjacent slave equipment according to the address programming request so that the adjacent slave equipment can carry out address programming according to the address programming signal.
In one embodiment, the processor 101 may be configured to call an address programming program stored in the memory 102 and perform the following operations:
and when the address programming signal is not received within a first preset time interval after the power-on, executing the step of address programming of the main equipment.
In one embodiment, the processor 101 may be configured to call an address programming program stored in the memory 102 and perform the following operations:
and sending the master device information to each slave device.
In one embodiment, the processor 101 may be configured to call an address programming program stored in the memory 102 and perform the following operations:
when an address programming signal is received within a first preset time interval after the power-on, switching the state of the master device into a slave device;
and sending the information of master equipment switching to each slave equipment.
In one embodiment, the processor 101 may be configured to call an address programming program stored in the memory 102 and perform the following operations:
when receiving the address compiled statement sent by the slave device, sending a control signal to the slave device, so that the slave device sends an identification signal of state change to a connected adjacent slave device after receiving the control signal.
In one embodiment, the processor 101 may be configured to call an address programming program stored in the memory 102 and perform the following operations:
after receiving the identification signal of the state change, sending an address programming request to the main equipment;
after receiving an address programming signal sent by the master device, changing the state of the slave device from an un-programmed state to a programmed state;
the slave device transmits an identification signal of the state change to the connected neighboring slave device.
In one embodiment, the processor 101 may be configured to call an address programming program stored in the memory 102 and perform the following operations:
the slave device sends an address formulated declaration to the master device.
In one embodiment, the processor 101 may be configured to call an address programming program stored in the memory 102 and perform the following operations:
and after receiving the control signal sent by the master device according to the address formulated statement, executing the step of sending the identification signal of the state change to the connected adjacent slave device by the slave device.
In one embodiment, the processor 101 may be configured to call an address programming program stored in the memory 102 and perform the following operations:
when the slave device detects that the master device fails and the slave device is an adjacent slave device of the master device, the slave device is switched to a master device state;
and sending prompt information of switching the master equipment to each slave equipment.
According to the scheme, address programming software in the main equipment performs address programming on the main equipment, and when the address programming of the main equipment is finished, the main equipment changes the address state from the non-programmed state to the programmed state, which indicates that the address programming of the main equipment is finished; the master device sends the identification signal with the changed state to the adjacent slave device to inform the adjacent slave device of address compilation, so that the adjacent slave device returns an address compiled statement according to the address identification signal; after receiving the address programming request sent by the adjacent slave equipment, the master equipment sends an address programming signal to the adjacent slave equipment according to the address programming request, so that address programming software in the adjacent slave equipment can perform address programming according to the address programming signal. The method can be applied to address compilation of a plurality of devices (batch products), the plurality of devices use the same software to perform address compilation, the number of address bits is not restricted by hardware, and the flexibility of setting the number of address bits is increased. Therefore, the problem that the flexibility of the existing multi-device address allocation is poor is solved.
Based on the hardware architecture of the device, the embodiment of the address programming method is provided.
Referring to FIG. 2, FIG. 2 is a schematic diagram of an addressing system of the present invention; in an addressing system: a plurality of devices are connected through a communication bus, and the communication bus CAN be preferably the CAN bus; a bus dedicated for transmitting the identification signal exists between the adjacent devices, and each device is provided with a hardware identification bit for receiving the identification signal sent by the previous device. The device may be a BMS product, which refers to a battery circuit board of an electric vehicle.
Referring to fig. 3, fig. 3 is a diagram of a first embodiment of an address programming method applied to a master device, where the address programming method includes the following steps:
in step S10, the master device performs address generation.
In the embodiment, address compilation software edited according to a certain rule is applied to the main equipment, and the software reserves enough digits to meet the requirement of compiling the addresses of a plurality of pieces of equipment. For example, 8 bits are reserved, and address compilation can be performed according to the rules of 00000001, 00000010, and 00000011, or address compilation can be performed in other manners, and only one corresponding address is required for each device when address compilation is performed.
The addressing software in the master addresses the master, e.g., 00000001 for the master address.
Step S20, when the master address is programmed, changing the status from the un-programmed status to the programmed status.
In this embodiment, after the address of the master device is programmed, the master device changes the address state from the un-programmed state to the programmed state, which indicates that the address of the master device is programmed.
Step S30, sending the status-changed identification signal to the connected neighboring slave device, so that the neighboring slave device can make a declaration according to the identification signal return address.
In the present embodiment, the I/O interface (input/output interface) of the master device and the I/O interface of the adjacent slave device are connected via a bus dedicated to transmitting the identification signal. The master device sends the identification signal of the state change to the adjacent slave devices; the default state of the identification signal is preferably 0, and the identification signal of the state change is 1; the master device sends an identification signal of the state change to the adjacent slave device to indicate that the adjacent slave device needs to perform address compilation so that the adjacent slave device returns an address compilation declaration according to the address identification signal.
And step S40, sending an address programming signal to the adjacent slave device according to the address programming request, so that the adjacent slave device can perform address programming according to the address programming signal.
In this embodiment, after receiving an address programming request sent by an adjacent slave device, the master device sends an address programming signal to the adjacent slave device through the communication bus according to the address programming request, so that the address programming software in the adjacent slave device performs address programming according to the address programming signal. It should be noted that the addressing software in the slave device is the same as the addressing software in the master device.
The technical scheme provided by the embodiment is applied to the main device. Address programming software in the main equipment performs address programming on the main equipment, and when the address programming of the main equipment is finished, the main equipment changes the address state from an un-programmed state to a programmed state, which indicates that the address programming of the main equipment is finished; the master device sends the identification signal with the changed state to the adjacent slave device to inform the adjacent slave device of address compilation, so that the adjacent slave device returns an address compiled statement according to the address identification signal; after receiving the address programming request sent by the adjacent slave equipment, the master equipment sends an address programming signal to the adjacent slave equipment according to the address programming request, so that address programming software in the adjacent slave equipment can perform address programming according to the address programming signal. The method can be applied to address compilation of a plurality of devices (batch products), the plurality of devices use the same software to perform address compilation, the number of address bits is not restricted by hardware, and the flexibility of setting the number of address bits is increased. Therefore, the problem that the flexibility of the existing multi-device address allocation is poor is solved.
Referring to fig. 4, fig. 4 is a diagram of a second embodiment of the address programming method according to the present invention, which is proposed based on the first embodiment, in this embodiment, step S10 includes:
step S11, when the address programming signal is not received within a first preset time interval after power-on, executing the step of the master device performing address programming.
In this embodiment, a plurality of devices are powered on simultaneously, a hardware device and address programming software are initialized, and since an identification signal exists between adjacent devices and no device is connected to the first device of the plurality of devices before, an address programming signal is not received within a first preset time interval of the first device after power on, the first preset time interval is set by a person skilled in the art, which is not limited too much here and may be preferably 2 s. The identification signal of the first device is not controlled by other devices, address programming software in the first device determines that the first device is a main device, and the main device executes the step of address programming.
In the technical scheme provided by this embodiment, a plurality of devices are powered on simultaneously, an identification signal exists between adjacent devices, and no device is connected to a first device in the plurality of devices before, so that an address programming signal is not received within a first preset time interval of the first device after the plurality of devices are powered on, the identification signal of the first device is not controlled by other devices, and address programming software in the first device determines that the first device is a master device and executes a step of address programming by the master device.
Referring to fig. 5, fig. 5 is a diagram illustrating a third embodiment of the address programming method according to the present invention, which is proposed based on the second embodiment, and before step S11 in this embodiment, the method further includes:
step S01, sending master device information to each of the slave devices.
In this embodiment, the multiple devices are powered on simultaneously, and when the first device of the multiple devices does not receive the address programming signal within a first preset time interval after being powered on, the first device of the multiple devices is determined to be the master device, and the master device sends master device information to each slave device through the communication bus to notify each slave device that the master device has been determined.
In the technical solution provided in this embodiment, a plurality of devices are powered on simultaneously, a hardware device and address programming software are initialized, at this time, address states of the plurality of devices are in a default state, when a first device of the plurality of devices does not receive an address programming signal within a first preset time interval after being powered on, the first device of the plurality of devices is determined to be a master device, and the master device sends master device information to each slave device through a communication bus to notify that each slave device has been determined.
Referring to fig. 6, fig. 6 is a diagram illustrating a fourth embodiment of the address programming method according to the present invention, and the fourth embodiment of the present invention is proposed based on the second embodiment, and includes:
and step S12, when receiving the address programming signal within a first preset time interval after power-on, switching the state of the master device to the slave device.
In this embodiment, the master device receives the address programming signal within a first preset time interval after being powered on, and determines that the address programming signal is controlled by other devices through the identification signal of the master device, which indicates that the master device has previously accessed a new device; and switching the state of the master device to the slave device.
Step S13, sending information of master device switching to each slave device.
In this embodiment, the master device sends the master switching information to each slave device through the communication bus, and informs each slave device that the master device has been replaced and all devices need to perform address reorganization again.
In the technical scheme provided by this embodiment, the master device receives the address programming signal within a first preset time interval after being powered on, and is determined to be controlled by other devices through the identification signal of the master device, which indicates that the master device has previously accessed a new device; switching the state of the master device to the slave device; the master device sends master device switching information to each slave device through the communication bus to inform each slave device that the master device is replaced and all the devices need to perform address compiling again. The indication is that the main device in address compilation is not uniquely determined, but is determined according to the connection sequence between the devices, and the first device is the main device.
Referring to fig. 7, fig. 7 is a fifth embodiment of the address programming method according to the present invention, which is proposed based on the first embodiment, and after step S30 in this embodiment, the method further includes:
and step S31, when receiving the address sent by the slave device and making a statement, sending a control signal to the slave device, so that the slave device sends an identification signal of state change to a connected adjacent slave device after receiving the control signal.
In this embodiment, when receiving an address asserted by the slave device via the communication bus, the master device sends a control signal to the slave device via the communication bus, informing the slave device to send an identification signal of a state change to a next slave device, that is, a connected adjacent slave device; for the slave device to send the identification signal of the state change to the connected adjacent slave device after receiving the control signal.
In the above embodiment, when the master device does not receive the address formulation request sent by the slave device within the second preset time interval, it indicates that all device address formulations are completed. Wherein the second preset time interval may be specifically set by a person skilled in the art, and may preferably be 3s, for example.
Referring to fig. 8, fig. 8 is a sixth embodiment of the address programming method of the present invention, applied to a slave device, and the address programming method includes the following steps:
step S50, after receiving the status-changed identification signal, sends an address preparation request to the master device.
In this embodiment, after receiving the status-changed identification signal, the slave device indicates that it needs to perform address translation, and sends an address translation request to the master device through the communication bus.
In step S60, after receiving the address programming signal sent by the master device, the state of the slave device is changed from the un-programmed state to the programmed state.
In this embodiment, after the slave device receives the address programming signal sent by the master device, the address programming software in the slave device performs address programming on the slave device. For example, the slave device receives an address programming signal 00000001 sent by the master device, the address programming software in the slave device programs the slave device address into 00000001, and the slave device changes the self state from an un-programmed state to a programmed state.
In step S70, the slave device transmits the identification signal of the state change to the connected neighboring slave device.
In this embodiment, the slave device transmits the identification signal of the state change to the connected neighboring slave device, i.e., the next slave device connected to the slave device.
The technical scheme provided by the embodiment is applied to the slave device. After the slave device receives the address programming signal sent by the master device, address programming software in the slave device performs address programming on the slave device, and the slave device changes the self state from an un-programmed state to a programmed state. The slave device transmits the identification signal of the state change to the connected adjacent slave device; the slave device sends an identification signal of the state change to the connected neighboring slave device for addressing by the neighboring slave device.
Referring to fig. 9, fig. 9 is a seventh embodiment of the address programming method according to the present invention, which is proposed based on the sixth embodiment, and after step S60 in this embodiment, the method further includes:
in step S61, the slave device sends an address formulated declaration to the master device.
In this embodiment, after the slave device finishes address compilation, the address compiled statement is sent to the master device through the communication bus to inform the master device that address compilation is finished.
Referring to fig. 10, fig. 10 is a diagram of an eighth embodiment of the address programming method according to the present invention, which is proposed based on the seventh embodiment, and after step S61 in this embodiment, the method further includes:
step S80, after receiving the control signal sent by the master device according to the address programming statement, executing the step of sending the identification signal of the state change to the connected adjacent slave device by the slave device.
In this embodiment, after receiving the assertion that the address sent by the slave device has been compiled, the master device sends a control signal to the slave device via the communication bus, informing the slave device that it needs to send an identification signal of a state change to the next slave device. And when the slave device receives the control signal sent by the master device according to the address formulated declaration, executing the step that the slave device sends the identification signal of the state change to the connected adjacent slave device.
Referring to fig. 11, fig. 11 is a ninth embodiment of the address programming method according to the present invention, which is proposed based on the first embodiment and includes:
step S90, when the slave device detects the master device failure and the slave device is an adjacent slave device of the master device, the slave device switches to a master device state;
in this embodiment, the master failure is, for example, a power failure of the master, and when the slave detects the master failure and the slave is an adjacent slave of the master, the master cannot send an identification signal to the adjacent slave, and when the adjacent slave detects that the adjacent slave is not controlled by other devices, the master is switched to the master state.
And step S100, sending prompt information of master equipment switching to each slave equipment.
In this embodiment, the master device sends a message indicating the master device has switched to each slave device through the communication bus, so as to notify each slave device that the master device has switched and needs to perform address reorganization again.
In the technical solution provided in this embodiment, when the slave device detects that the master device fails and the slave device is an adjacent slave device of the master device, the master device cannot send an identification signal to the adjacent slave device, and when the adjacent slave device detects that the adjacent slave device is not controlled by other devices, the state is switched to the master device state. The master device sends a prompt message of master device switching to each slave device through the communication bus to inform each slave device that the master device is switched and address compiling needs to be carried out again. When the old master device fails, the adjacent slave devices are switched to the new master device, and the intellectualization of address compilation of a plurality of devices is realized.
The invention also provides an address programming device comprising a memory, a processor and an address programming program stored in the memory and executable on the processor, the address programming program, when executed by the processor, implementing the steps of the address programming method as described above.
The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments.
As will be appreciated by one skilled in the art, embodiments of the present invention may be provided as a method, system, or computer program product. Accordingly, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
It should be noted that in the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The word "comprising" does not exclude the presence of elements or steps not listed in a claim. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The invention may be implemented by means of hardware comprising several distinct elements, and by means of a suitably programmed computer. In the unit claims enumerating several means, several of these means may be embodied by one and the same item of hardware. The usage of the words first, second and third, etcetera do not indicate any ordering. These words may be interpreted as names.
While preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all such alterations and modifications as fall within the scope of the invention.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.
Claims (10)
1. An address organization method applied to a master device is characterized by comprising the following steps:
the master equipment carries out address compilation;
when the address of the main equipment is programmed, changing the state from an un-programmed state to a programmed state;
sending an identification signal of the state change to a connected adjacent slave device, so that the adjacent slave device can return an address to be declared according to the identification signal;
and sending an address programming signal to the adjacent slave equipment according to the address programming request so that the adjacent slave equipment can carry out address programming according to the address programming signal.
2. The address formulation method of claim 1, further comprising:
and when the address programming signal is not received within a first preset time interval after the power-on, executing the step of address programming of the main equipment.
3. The address formulation method of claim 2, wherein the step of the master device performing address formulation is preceded by the step of:
and sending the master device information to each slave device.
4. The address formulation method of claim 2, further comprising:
when an address programming signal is received within a first preset time interval after the power-on, switching the state of the master device into a slave device;
and sending the information of master equipment switching to each slave equipment.
5. The addressing method of claim 1, wherein said step of sending an identification signal of the state change to the connected neighboring slave device is followed by further comprising:
when receiving the address compiled statement sent by the slave device, sending a control signal to the slave device, so that the slave device sends an identification signal of state change to a connected adjacent slave device after receiving the control signal.
6. An address organization method applied to a slave device, the address organization method comprising the steps of:
after receiving the identification signal of the state change, sending an address programming request to the main equipment;
after receiving an address programming signal sent by the master device, changing the state of the slave device from an un-programmed state to a programmed state;
the slave device transmits an identification signal of the state change to the connected neighboring slave device.
7. The address programming method of claim 6, wherein after the step of changing the state of the slave device from an un-programmed state to a programmed state after receiving the address programming signal sent by the master device, further comprising:
the slave device sends an address formulated declaration to the master device.
8. The address formulation method of claim 7, wherein the step of the slave device sending an address-formulated declaration to the master device is followed by:
and after receiving the control signal sent by the master device according to the address formulated statement, executing the step of sending the identification signal of the state change to the connected adjacent slave device by the slave device.
9. The address formulation method of claim 1, further comprising:
when the slave device detects that the master device fails and the slave device is an adjacent slave device of the master device, the slave device is switched to a master device state;
and sending prompt information of switching the master equipment to each slave equipment.
10. An addressing arrangement comprising a memory, a processor and an addressing program stored in said memory and executable on said processor, said addressing program when executed by said processor implementing the steps of the addressing method according to any of claims 1-9.
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