CN113190072A - Negative voltage regulator - Google Patents
Negative voltage regulator Download PDFInfo
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- CN113190072A CN113190072A CN202110340446.9A CN202110340446A CN113190072A CN 113190072 A CN113190072 A CN 113190072A CN 202110340446 A CN202110340446 A CN 202110340446A CN 113190072 A CN113190072 A CN 113190072A
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- voltage
- negative voltage
- resistor
- transistor
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
Abstract
The invention relates to a negative voltage regulator, comprising: the adjusting module comprises an MOS tube with an N channel and a first resistor, wherein the source electrode of the MOS tube is connected with the negative voltage input end, the drain electrode of the MOS tube is connected with the negative voltage output end, and the grid electrode of the MOS tube is grounded through the first resistor; the voltage sampling module is used for sampling the voltage at the negative voltage output end to obtain a sampling voltage; and the control module is used for adjusting the grid voltage of the MOS tube according to the sampling voltage so as to stabilize the voltage of the negative voltage output end by changing the resistance value of the on-resistance of the MOS tube. By implementing the technical scheme of the invention, the input voltage of the negative voltage stabilizer can be stabilized at the stabilized voltage value only a few millivolts (almost negligible) higher than the set stabilized voltage value, so that the energy conversion efficiency and the utilization efficiency of the voltage source can be greatly improved, the overall efficiency of the product is improved, the service life of the power supply is prolonged, and the main melody of current green, energy conservation and emission reduction is met.
Description
Technical Field
The invention relates to the field of voltage regulators, in particular to a negative voltage regulator.
Background
In recent years, the application of negative voltage is becoming more and more widespread, such as biphasic tissue stimulation, high-performance voltage-controlled oscillators, and the like. In order to provide a voltage stable negative voltage, it is often necessary to connect a negative voltage regulator in series after the negative voltage source. However, the minimum voltage drop of the currently mainstream negative voltage regulators, such as the LM2990/LM2991 regulators of TI company, is 0.6V, that is, the input voltage is at least 0.6V higher than the regulated voltage value to stabilize the output voltage at the regulated voltage value. Obviously, this makes the energy conversion efficiency and the utilization efficiency of the voltage source low, thereby making the overall efficiency of the product low and affecting the life of the power source.
Disclosure of Invention
The invention aims to solve the technical problem of providing a negative voltage regulator aiming at the defect of low energy conversion efficiency in the prior art.
The technical scheme adopted by the invention for solving the technical problems is as follows: constructing a negative voltage regulator comprising a negative voltage input and a negative voltage output, the negative voltage regulator comprising:
the adjusting module comprises an MOS tube with an N-channel and a first resistor, wherein the source electrode of the MOS tube is connected with the negative voltage input end, the drain electrode of the MOS tube is connected with the negative voltage output end, and the grid electrode of the MOS tube is grounded through the first resistor;
the voltage sampling module is used for sampling the voltage of the negative voltage output end to obtain a sampling voltage;
and the control module is used for adjusting the grid voltage of the MOS tube according to the sampling voltage so as to stabilize the voltage of the negative voltage output end by changing the resistance value of the on-resistance of the MOS tube.
Preferably, the control module includes an NPN-type first transistor, a PNP-type second transistor, a second resistor, and a third resistor, where an emitter of the first transistor is connected to the negative voltage input terminal, a collector of the first transistor is connected to a gate of the MOS transistor, the third resistor is connected between a base and an emitter of the first transistor, a collector of the second transistor is connected to the base of the first transistor, and an emitter of the second transistor is grounded through the second resistor.
Preferably, the voltage sampling module includes:
the voltage division unit is used for carrying out voltage division sampling on the voltage at the negative voltage output end;
and the comparison unit is used for comparing the divided sampling voltage and outputting the divided sampling voltage to the control module.
Preferably, the comparison unit includes a three-terminal adjustable reference voltage source, a cathode of the three-terminal adjustable reference voltage source is connected to a base of the second triode, an anode of the three-terminal adjustable reference voltage source is connected to the negative voltage output terminal, and a reference electrode of the three-terminal adjustable reference voltage source is connected to an output terminal of the voltage dividing unit.
Preferably, the comparison unit comprises an operational amplifier and a reference voltage source, wherein the negative terminal of the reference voltage source is connected to the negative voltage output terminal, the positive terminal of the reference voltage source is connected to the equidirectional input terminal of the operational amplifier, the reverse input terminal of the operational amplifier is connected to the output terminal of the voltage division unit, and the output terminal of the operational amplifier is connected to the base electrode of the second triode.
Preferably, the voltage dividing unit includes a first voltage dividing resistor, a second voltage dividing resistor, a fourth resistor, and a capacitor, where the first voltage dividing resistor and the second voltage dividing resistor are connected in series between the negative voltage output terminal and ground, a first end of the capacitor is connected to a connection point of the first voltage dividing resistor and the second voltage dividing resistor, a second end of the capacitor is connected to a base of the second transistor, a first end of the fourth resistor is connected to a base of the second transistor, and a second end of the fourth resistor is grounded.
The negative voltage stabilizer provided by the invention has the advantages that the input voltage is higher than the set voltage stabilization value by a few millivolts (almost negligible), the output voltage can be stabilized at the voltage stabilization value, and compared with the current mainstream negative voltage stabilizer with the minimum voltage drop of 0.6V, the energy conversion efficiency and the utilization efficiency of a voltage source can be greatly improved, so that the overall efficiency of a product is improved, the service life of a power supply is prolonged, and the current main melody of green, energy conservation and emission reduction is met.
Drawings
In order to illustrate the embodiments of the invention more clearly, the drawings that are needed in the description of the embodiments will be briefly described below, it being apparent that the drawings in the following description are only some embodiments of the invention, and that other drawings may be derived from those drawings by a person skilled in the art without inventive effort. In the drawings:
FIG. 1 is a circuit diagram of a first embodiment of a negative voltage regulator according to the present invention;
fig. 2 is a circuit diagram of a second embodiment of the negative voltage regulator of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Fig. 1 is a circuit diagram of a first embodiment of a negative voltage regulator according to the present invention, which has a negative voltage input terminal VIN and a negative voltage output terminal VOUT, wherein the negative voltage input terminal VIN is used for connecting a negative voltage source, and the negative voltage output terminal VOUT is used for connecting a load. The negative voltage regulator outputs a stable negative voltage to a load by performing a voltage stabilization process on an input unstable negative voltage.
The negative voltage regulator of this embodiment includes: the device comprises an adjusting module 10, a voltage sampling module 20 and a control module 30. The adjusting module 10 includes an N-channel MOS transistor Q1 and a resistor R5, wherein a source of the MOS transistor Q1 is connected to the negative voltage input terminal VIN, a drain of the MOS transistor Q1 is connected to the negative voltage output terminal VOUT, and a gate of the MOS transistor Q1 is connected to the ground GND through the resistor R5. The voltage sampling module 20 is configured to sample a voltage at the negative voltage output terminal VOUT to obtain a sampled voltage. The control module 30 is configured to adjust the gate voltage of the MOS transistor Q1 according to the sampling voltage, so as to stabilize the voltage of the negative voltage output terminal VOUT by changing the resistance of the on-resistance (the resistance between the drain and the source) of the MOS transistor Q1.
In this embodiment, the control module 30 specifically includes an NPN-type transistor Q2, a PNP-type transistor Q3, a resistor R4, and a resistor R6, wherein an emitter of the transistor Q2 is connected to the negative voltage input terminal VIN, a collector of the transistor Q2 is connected to the gate of the MOS transistor Q1, the resistor R6 is connected between a base and an emitter of the transistor Q2, a collector of the transistor Q3 is connected to the base of the transistor Q2, and an emitter of the transistor Q3 is grounded to GND through the resistor R4.
In this embodiment, the voltage sampling module includes a voltage dividing unit and a comparing unit, wherein the voltage dividing unit is configured to perform voltage dividing sampling on a voltage at the negative voltage output terminal; the comparison unit is used for comparing the divided voltage sampling voltage and outputting the divided voltage sampling voltage to the control module.
Specifically, the voltage dividing unit includes a voltage dividing resistor R1, a voltage dividing resistor R2, a resistor R3 and a capacitor C1, wherein the voltage dividing resistor R1 and the voltage dividing resistor R2 are connected in series between the negative voltage output terminal VOUT and the ground GND, a first end of the capacitor C1 is connected to a connection point between the voltage dividing resistor R1 and the voltage dividing resistor R2, a second end of the capacitor C1 is connected to the base of the transistor Q3, a first end of the resistor R3 is connected to the base of the transistor Q3, and a second end of the resistor R3 is connected to the ground GND.
Specifically, the comparing unit includes a three-terminal adjustable reference voltage source U1, for example, a chip model TL431, a cathode of the three-terminal adjustable reference voltage source U1 is connected to a base of the transistor Q3, an anode of the three-terminal adjustable reference voltage source U1 is connected to the negative voltage output terminal VOUT, and a reference electrode of the three-terminal adjustable reference voltage source U1 is connected to a connection point of the voltage dividing resistor R1 and the voltage dividing resistor R2.
The operation principle of the negative voltage regulator of this embodiment is explained below:
first, VIN is an input negative voltage, VOUT is an output negative voltage, and a regulated voltage value (V) can be determined according to actual requirementsOUT_SET) According to the regulated voltage value (V)OUT_SET) Selecting the resistance values of the divider resistors R1 and R2; on the contrary, the voltage stabilizing value (V) can be determined according to the selected resistance values of the voltage dividing resistors R1 and R2OUT_SET) And has the following relationship:
VOUT_SET＝2.5*(R1+R2)/R1
when-VIN |>VOUT_SETWhen the circuit is in normal voltage-stabilizing state, i.e. the outputted | VOUT | is stabilized at VOUT_SET. When performing voltage regulation, if the voltage regulation is less than V due to the increase of load current IOUTOUT_SETWill stabilize the output voltage by: firstly, the voltage VR1 of the divider resistor R1 is 2.5V lower than the voltage of the reference pole of the three-terminal adjustable reference voltage source U1, the high resistance is presented between the cathode and the anode of the three-terminal adjustable reference voltage source U1, and the current I between the emitter and the base of the triode Q3B_Q3Will be reduced resulting in a base-emitter current I of transistor Q2B_Q2And then becomes smaller, transistor Q2 is due to its IB_Q2So that the collector-emitter voltage V thereof becomes smallCE_Q2It will then become larger. At this time, the voltage V between the gate and the source of the MOS transistor Q1GS_Q1Also becomes larger (V)CE_Q2＝VGS_Q1) And the on-resistance R of the MOS transistor Q1DS_ONWill be due to VGS_Q1Is increased and decreased, and the voltage V between the drain and the source of the MOS transistor Q1 is increased and decreasedDS_Q1And correspondingly decreases, finally the output voltage | VOUT| is raised to the set regulated voltage value VOUT_SET. And vice versa. Therefore, the negative voltage regulator can output stable voltage.
The minimum voltage drop of the negative voltage regulator is analyzed as follows: first, assume the most extreme case, i.e.,
∣-VIN∣<＝VOUT_SETat this time, the voltage of MOS transistor Q1 makes | -VOUT | definitely smaller than VOUT_SETTherefore, the voltage VR1 of the voltage-dividing resistor R1 is less than the reference voltage 2.5V of the three-terminal adjustable reference voltage source U1, and a high impedance is present between the cathode and the anode of the three-terminal adjustable reference voltage source U1, which is equivalent to an open circuit, and at this time, the transistors Q2 and Q3 are both in the off state. The input voltage GND → -VIN is directly applied between the gate and the source of the MOS transistor Q1, the MOS transistor Q1 is in a fully conducting state, and the voltage drop is the output current IOUT multiplied by the on-resistance R of the MOS transistor Q1DS_ONThe on-resistance of the MOS transistor Q1 is very small, such as a British Rabdosia MOSFET (60V, 100A, R)DS_ON3.4m Ω) and an output current IOUT of 1AThen the voltage V between drain and source of MOS transistor Q1DS_Q1And the power loss P of the MOS transistor Q1 is:
VDS_Q1＝IOUT*RDS_ON＝1*0.0034＝3.4mV
P＝VDS_Q1*IOUT＝3.4*1＝3.4mW
that is, in this circuit, the input voltage | V of the negative voltage regulatorIN| is only than the set regulated value VOUT_SETThe output voltage can be stabilized at a voltage stabilization value by 3.4mV, and compared with the minimum voltage drop of the current mainstream negative voltage stabilizer which is 0.6V, the energy conversion efficiency and the utilization efficiency of a voltage source can be greatly improved, so that the overall efficiency of a product is improved, the service life of the power source is prolonged, and the current green, energy-saving and emission-reducing main melody is met.
Fig. 2 is a circuit diagram of a second embodiment of the negative voltage regulator of the present invention, which is different from the embodiment shown in fig. 1 only in the circuit structure of the comparison unit, and other same parts are not repeated herein, and only different parts are described below: the comparison unit of the embodiment comprises an operational amplifier U2 and a reference voltage source VREF, wherein the negative terminal of the reference voltage source VREF is connected with a negative voltage output terminal VOUT, the positive terminal of the reference voltage source VREF is connected with the homodromous input terminal of the operational amplifier U2, the reverse input terminal of the operational amplifier U2 is connected with the connection point of a divider resistor R1 and a divider resistor R2, and the output terminal of the operational amplifier U3 is connected with the base of a triode Q3. It should be understood that the circuit principle of the negative voltage regulator of this embodiment is similar to that of the embodiment shown in fig. 1, and is not described herein again.
The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the scope of the claims of the present invention.
Claims (6)
1. A negative voltage regulator comprising a negative voltage input and a negative voltage output, the negative voltage regulator comprising:
the adjusting module comprises an N-channel MOS (Q1) and a first resistor (R5), wherein the source of the MOS (Q1) is connected to the negative voltage input end, the drain of the MOS (Q1) is connected to the negative voltage output end, and the gate of the MOS (Q1) is grounded through the first resistor (R5);
the voltage sampling module is used for sampling the voltage of the negative voltage output end to obtain a sampling voltage;
and the control module is used for adjusting the grid voltage of the MOS tube (Q1) according to the sampling voltage so as to stabilize the voltage of the negative voltage output end by changing the resistance value of the on-resistance of the MOS tube (Q1).
2. The negative voltage regulator of claim 1, wherein the control module comprises a first NPN-type transistor (Q2), a second PNP-type transistor (Q3), a second resistor (R4), and a third resistor (R6), wherein an emitter of the first transistor (Q2) is connected to the negative voltage input, a collector of the first transistor (Q2) is connected to the gate of the MOS transistor (Q1), the third resistor (R6) is connected between the base and the emitter of the first transistor (Q2), a collector of the second transistor (Q3) is connected to the base of the first transistor (Q2), and an emitter of the second transistor (Q3) is grounded via the second resistor (R4).
3. The negative voltage regulator of claim 2, wherein the voltage sampling module comprises:
the voltage division unit is used for carrying out voltage division sampling on the voltage at the negative voltage output end;
and the comparison unit is used for comparing the divided sampling voltage and outputting the divided sampling voltage to the control module.
4. The negative voltage regulator of claim 3, wherein the comparison unit comprises a three-terminal adjustable reference voltage source, a cathode of the three-terminal adjustable reference voltage source is connected to the base of the second transistor (Q3), an anode of the three-terminal adjustable reference voltage source is connected to the negative voltage output terminal, and a reference electrode of the three-terminal adjustable reference voltage source is connected to the output terminal of the voltage divider unit.
5. The negative voltage regulator of claim 3, wherein the comparison unit comprises an operational amplifier and a reference voltage source, wherein a negative terminal of the reference voltage source is connected to the negative voltage output terminal, a positive terminal of the reference voltage source is connected to a non-inverting input terminal of the operational amplifier, an inverting input terminal of the operational amplifier is connected to an output terminal of the voltage dividing unit, and an output terminal of the operational amplifier is connected to a base of the second transistor (Q3).
6. The negative voltage regulator of claim 3, wherein the voltage divider unit comprises a first voltage dividing resistor (R1), a second voltage dividing resistor (R2), a fourth resistor (R3), and a capacitor (C1), wherein the first voltage dividing resistor (R1) and the second voltage dividing resistor (R2) are connected in series between the negative voltage output terminal and ground, a first end of the capacitor (C1) is connected to a connection point of the first voltage dividing resistor (R1) and the second voltage dividing resistor (R2), a second end of the capacitor (C1) is connected to the base of the second transistor (Q3), a first end of the fourth resistor (R3) is connected to the base of the second transistor (Q3), and a second end of the fourth resistor (R3) is connected to ground.
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6222357B1 (en) * | 1998-09-07 | 2001-04-24 | Canon Kabushiki Kaisha | Current output circuit with controlled holdover capacitors |
| EP1646132A2 (en) * | 2004-10-08 | 2006-04-12 | St Microelectronics S.A. | Double power supply |
| US20090085542A1 (en) * | 2007-09-27 | 2009-04-02 | Kabushiki Kaisha Toshiba | Drive system for power semiconductor device |
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