CN113176934B - Embedded ultrahigh clock precision timing task execution method and embedded operating system - Google Patents
Embedded ultrahigh clock precision timing task execution method and embedded operating system Download PDFInfo
- Publication number
- CN113176934B CN113176934B CN202110453005.XA CN202110453005A CN113176934B CN 113176934 B CN113176934 B CN 113176934B CN 202110453005 A CN202110453005 A CN 202110453005A CN 113176934 B CN113176934 B CN 113176934B
- Authority
- CN
- China
- Prior art keywords
- task
- execution
- executing
- thread
- time
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
- G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
- G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
- G06F9/5038—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering the execution order of a plurality of tasks, e.g. taking priority or time dependency constraints into consideration
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/54—Interprogram communication
- G06F9/546—Message passing systems or structures, e.g. queues
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2209/00—Indexing scheme relating to G06F9/00
- G06F2209/48—Indexing scheme relating to G06F9/48
- G06F2209/484—Precedence
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2209/00—Indexing scheme relating to G06F9/00
- G06F2209/50—Indexing scheme relating to G06F9/50
- G06F2209/5021—Priority
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2209/00—Indexing scheme relating to G06F9/00
- G06F2209/54—Indexing scheme relating to G06F9/54
- G06F2209/548—Queue
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Abstract
The application relates to an embedded ultrahigh clock precision timing task execution method and an embedded system. The method comprises the following steps: the task calling thread sends a task executing request, the task executing request is arranged according to the sequence of the task expected executing time to obtain a task executing queue, the task monitoring executing thread obtains the latest task from the task executing queue, when the interval between the task expected executing time and the current time is longer than the preset time, the interrupt triggering time of the hardware timer is set according to the task expected executing time of the latest task, otherwise, the task monitoring executing thread polls and waits for the latest task. When the task monitoring execution thread receives the interrupt trigger signal or polling waiting is finished, executing the latest task and returning a corresponding task execution result to the task calling thread. The method and the device are based on the hardware timer, can support task delay timing with microsecond or even nanosecond ultra-high clock precision when executing tasks, and can effectively guarantee instantaneity of an operating system.
Description
Technical Field
The present disclosure relates to the field of embedded operating systems, and in particular, to an embedded ultrahigh clock precision timing task execution method and an embedded operating system.
Background
Interrupt is one of the main ways for implementing multitasking in embedded systems, and most of the embedded systems currently only adopt an embedded clock interrupt mode to implement the operation of timing tasks. In this mode, too short an interrupt cycle configuration may result in the system always handling interrupts and not being able to handle other business logic. Moreover, most of the interrupt periods of the operating system timers can only be configured to about 200ms, so that the conventional timing task execution method may generate errors of hundreds of milliseconds. Furthermore, when the user delay runs too short (e.g., within 200 ms), conventional embedded clock interrupt modes cannot support the user to fulfill such demands.
Disclosure of Invention
Based on this, it is necessary to provide an embedded ultra-high clock precision timing task execution method and an embedded system capable of supporting the ultra-high clock precision of microsecond or even nanosecond to complete a predetermined task in view of the above technical problems.
An embedded ultra-high clock precision timing task execution method comprises the following steps:
the task calling thread sends task executing requests, and the task executing requests are arranged according to the sequence of the task expected executing moments to obtain a task executing queue.
The task monitoring execution thread acquires the latest task from the task execution queue, when the interval between the task expected execution time of the latest task and the current time is larger than the preset time length, the interrupt trigger time of the hardware timer is set according to the task expected execution time of the latest task, otherwise, the task monitoring execution thread polls and waits for the latest task according to the task expected execution time of the latest task.
When the task monitoring executing thread receives an interrupt trigger signal of the hardware timer or when the polling waiting is finished, the task monitoring executing thread executes the latest task and returns a corresponding task executing result to the task calling thread.
In one embodiment, the preset time length is set in the following manner:
and taking the minimum turning period of the hardware timer as a preset time length.
In one embodiment, the method further comprises:
when the system is initialized, the clock error of the hardware timer is measured for a plurality of times to obtain a corresponding clock error average value, and the time error correction parameter of the task monitoring execution thread is configured according to the clock error average value.
An embedded operating system comprises a general interface, an execution framework kernel and a hardware timer driver, wherein the general interface comprises a system initialization interface and an execution framework kernel calling interface, and the execution framework kernel comprises a task execution queue and a task monitoring execution thread.
The hardware timer driver is used to initialize and set the hardware timer, to configure execution logic for timer interrupts, and to take readings of the hardware timer.
The task execution queue is obtained by the following steps: the task calling thread sends an execution task request by calling an execution framework kernel calling interface, and the execution task request is arranged according to the sequence of the task expected execution time to obtain a task execution queue.
The task monitoring execution thread is used for acquiring the latest task from the task execution queue, when the interval between the task expected execution time of the latest task and the current time is larger than the preset time length, setting the interrupt trigger time of the hardware timer through the hardware timer drive according to the task expected execution time of the latest task, otherwise, carrying out polling waiting on the latest task by the task monitoring execution thread according to the task expected execution time of the latest task. And the device is used for executing the latest task and returning a corresponding task execution result to the task calling thread when receiving an interrupt trigger signal of the hardware timer or when polling waiting is finished.
In one embodiment, the priority of the task monitoring execution thread is the highest level.
In one embodiment, the execution framework kernel call interface includes a synchronous interface and an asynchronous interface.
In one embodiment, the system further comprises a test interface, which is used for configuring the time error correction parameters of the task monitoring execution thread according to the time error average value of the hardware timer obtained by multiple measurements when the system is initialized.
In one embodiment, the system initialization interface is configured to set a minimum rollover period of the hardware timer to a preset time length when performing system initialization.
An electronic device employing the embedded operating system of any one of the embodiments described above.
Compared with the prior art, the embedded ultrahigh clock precision timing task execution method, the embedded system and the electronic equipment have the advantages that the task calling thread sends task execution requests and arranges the task execution requests according to the sequence of task expected execution moments to obtain a task execution queue; the task monitoring execution thread acquires the latest task from the task execution queue, when the interval between the task expected execution time of the latest task and the current time is larger than the preset time length, the interrupt trigger time of the hardware timer is set according to the task expected execution time of the latest task, otherwise, the task monitoring execution thread polls and waits for the latest task according to the task expected execution time of the latest task. When the task monitoring executing thread receives an interrupt trigger signal of the hardware timer or when the polling waiting is finished, the task monitoring executing thread executes the latest task and returns a corresponding task executing result to the task calling thread. The method and the device are based on the hardware timer, can support task delay timing with microsecond or even nanosecond ultra-high clock precision when executing tasks, and can effectively guarantee instantaneity of an operating system.
Drawings
FIG. 1 is a schematic diagram of an embedded operating system according to one embodiment;
FIG. 2 is a schematic diagram of task request execution logic based on two task delay modes in one embodiment;
FIG. 3 is a schematic diagram of task request execution logic in synchronous mode and asynchronous mode, in one embodiment.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application will be further described in detail with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the present application.
In one embodiment, as shown in FIG. 1, an embedded operating system is provided that includes a generic interface, an execution framework kernel, and a hardware timer driver. The universal interface comprises a system initialization interface and an execution framework kernel calling interface, and the user code writing and developing difficulty can be reduced by providing the universal interface.
The hardware timer driver is used to initialize and set the hardware timer, to configure execution logic for timer interrupts, and to take readings of the hardware timer. The specific functions include timer initialization, enabling, closing, frequency configuration, interrupt processing mounting and dismounting, high clock precision count value reading, count value inversion period acquisition and the like.
The execution framework kernel comprises a task execution queue and a task monitoring execution thread. The task execution queue is obtained by the following steps: the task calling thread sends an execution task request by calling an execution framework kernel calling interface, and the execution task request is arranged according to the sequence of the task expected execution time to obtain a task execution queue.
The task monitoring execution thread is used for acquiring the latest task from the task execution queue. In order to realize the interrupt process, when the task to be executed arrives at the expected execution time of the task, the priority of the task monitoring execution thread in the task execution framework kernel is set higher than that of the conventional task monitoring execution thread in preference to the conventional task implementation of the system, and the task to be executed can be set to be the highest level if required.
The method provided by the application is exemplified by an embedded system shown in fig. 1, and comprises the following steps:
step 102, the task calling thread sends task executing requests, and the task executing requests are arranged according to the sequence of task expected executing moments to obtain a task executing queue.
Specifically, the task execution queue is used for recording and queuing the current call application to be executed of each task call thread to the embedded operating system, namely, the current task execution request. The task calling thread sends the task executing requests by calling the kernel calling interface of the executing framework, arranges the task executing requests according to the sequence of the expected task executing time (namely the preset starting time of the task request), and stores the task executing requests in the pre-allocated application storage space to obtain an executing task queue. When a new task request is received each time, traversing and searching from the head of a task execution queue (the time when the task is expected to be executed is closest to the current time), inserting the new task request into a corresponding position according to the time when the task is expected to be executed, wherein the time point when the task is expected to be executed, which is closer to the head of the queue, is earlier, and the task at the head of the queue is always the task which is expected to be executed next. The mode of directly establishing the execution task queue according to the task execution sequence in the application storage space is adopted, so that the search comparison operation after the task execution time arrives can be reduced as much as possible, and the real-time characteristic is improved to the greatest extent.
Further, the logic for establishing the task calling thread to execute the task request as the execution task queue by calling the execution framework kernel calling interface is as follows:
1. storing the received task executing request in an application space;
2. the execution task queue is locked by using a mutual exclusion mechanism;
3. adding the received task executing request to the corresponding position of the task executing queue according to the task expected executing moment;
4. notifying a task monitoring execution thread to schedule through inter-thread communication;
5. the execution task queue mutex mechanism is unlocked.
The executing task queue ensures that only one task calling thread operates the executing task queue through a mutual exclusion mechanism, and the task monitoring executing thread and the task calling thread can access the mutual exclusion lock. This mutual exclusion mechanism is necessary because the embedded operating system allows multiple task call threads to call the execution framework kernel call interface. When the task monitoring execution thread is blocked by the task calling thread with low priority due to the mutual exclusion mechanism, the priority turning mechanism of the embedded operating system can be utilized to temporarily improve the operation priority of the blocked thread.
And 104, acquiring the latest task from the task execution queue by the task monitoring execution thread, setting the interrupt trigger time of the hardware timer according to the task expected execution time of the latest task when the interval between the task expected execution time and the current time of the latest task is greater than the preset time length, otherwise, carrying out polling waiting on the latest task by the task monitoring execution thread according to the task expected execution time of the latest task.
The latest task is an execution task request at the head of a queue in a task execution queue, and in the whole task execution queue, the time point of the latest task expected to be executed is closest to the current moment.
And step 106, when the task monitoring execution thread receives an interrupt trigger signal of the hardware timer or when the polling waiting is finished, the task monitoring execution thread executes the latest task and returns a corresponding task execution result to the task calling thread.
The preset time length can be set according to the application environment and the requirement of the embedded system, and the preset time length is set as the minimum flip period of the hardware timer in the embodiment.
Because many function interfaces do not allow calling in the interrupt processing function, and at the same time, very complex logic design is not suggested in the interrupt processing function, the embodiment does not directly execute tasks in the interrupt processing function, but adopts a high-priority task monitoring execution thread to schedule execution tasks, and wakes the task monitoring execution thread through the interrupt interface.
As shown in fig. 2, for a task request at the head of a task execution queue, two task delay modes are set according to the interval between the expected execution time and the current time of the task:
the hardware timer delay interrupt mode is used when the task desired execution time is greater than the minimum rollover period of the hardware timer from the current time. The method comprises the steps of setting the interrupt trigger time of a hardware timer through a hardware timer drive according to the task expected execution time of the latest task, waking up a task monitoring execution thread through an interrupt interface at the interrupt trigger time based on the timing reading of the hardware timer, and starting to execute the task request at the task expected execution time.
The poll waiting mode is used when the task desired execution time is not greater than the minimum rollover period of the hardware timer from the current time. Before the task expected execution time of the latest task, the task monitoring execution thread performs polling waiting without time intervals on the latest task, and starts to execute the task request of the queue head at the task expected execution time.
And after the task monitoring execution thread finishes executing the latest task, returning a corresponding task execution result to the task calling thread, and simultaneously removing the latest task from the task execution queue.
According to the embodiment, the high-precision hardware timer is used for interrupt triggering timing task operation, and the requirement of ultra-short delay period operation can be met by means of compatibility of the high-precision clock count value and the polling waiting mode, and instantaneity of an operating system is effectively guaranteed.
In one embodiment, the method further comprises:
step 100, when the system is initialized, the clock error of the hardware timer is measured for a plurality of times to obtain a corresponding clock error average value, and the time error correction parameter of the task monitoring execution thread is configured according to the clock error average value.
Specifically, when the embedded system is initialized, the current clock precision error (the clock precision error caused by interrupt triggering, function call and the like) is measured, and the clock precision is corrected pertinently, so that the certainty of the operating system can be improved to the maximum extent. In the embodiment, the current clock error precision is measured for a plurality of times through the test interface, and the time error correction value of the kernel execution frame is configured according to the average value measured for a plurality of times, so that the clock error is closer to 0, and the clock precision of task execution is further improved.
In one embodiment, the execution framework kernel calling interface comprises a synchronous interface and an asynchronous interface, provides a calling mode of synchronous mode and asynchronous mode, meets the calling requirements of different scenes of a user, and has the calling logic shown in fig. 3. When the synchronous mode is adopted for calling, the task monitoring execution thread notifies the task execution result to the corresponding task calling thread after the task execution is finished.
It should be understood that, although the steps in the flowchart of fig. 2 are shown in sequence as indicated by the arrows, the steps are not necessarily performed in sequence as indicated by the arrows. The steps are not strictly limited to the order of execution unless explicitly recited herein, and the steps may be executed in other orders. Moreover, at least some of the steps in fig. 2 may include multiple sub-steps or stages that are not necessarily performed at the same time, but may be performed at different times, nor do the order in which the sub-steps or stages are performed necessarily performed in sequence, but may be performed alternately or alternately with at least a portion of the sub-steps or stages of other steps or other steps.
For a specific limitation of an embedded operating system, reference may be made to the limitation of the method for executing the embedded ultra-high clock precision timing task hereinabove, and the description thereof will not be repeated here. The various modules in the embedded operating system described above may be implemented in whole or in part in software, hardware, and combinations thereof. The above modules may be embedded in hardware or may be independent of a processor in the computer device, or may be stored in software in a memory in the computer device, so that the processor may call and execute operations corresponding to the above modules.
In one embodiment, an electronic device is provided, where the task execution process is implemented using the embedded operating system described in any one of the embodiments above.
Those skilled in the art will appreciate that implementing all or part of the above described methods may be accomplished by way of a computer program stored on a non-transitory computer readable storage medium, which when executed, may comprise the steps of the embodiments of the methods described above. Any reference to memory, storage, database, or other medium used in the various embodiments provided herein may include non-volatile and/or volatile memory. The nonvolatile memory can include Read Only Memory (ROM), programmable ROM (PROM), electrically Programmable ROM (EPROM), electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms such as Static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double Data Rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous Link DRAM (SLDRAM), memory bus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), among others.
The technical features of the above embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above examples merely represent a few embodiments of the present application, which are described in more detail and are not to be construed as limiting the scope of the invention. It should be noted that it would be apparent to those skilled in the art that various modifications and improvements could be made without departing from the spirit of the present application, which would be within the scope of the present application. Accordingly, the scope of protection of the present application is to be determined by the claims appended hereto.
Claims (9)
1. An embedded ultra-high clock precision timing task execution method, which is characterized by comprising the following steps:
a task calling thread sends task executing requests, and the task executing requests are arranged according to the sequence of task expected executing moments to obtain a task executing queue;
acquiring a latest task from the task execution queue by a task monitoring execution thread, setting an interrupt trigger time of a hardware timer according to the task expected execution time of the latest task when the interval between the task expected execution time and the current time of the latest task is larger than a preset time length, otherwise, carrying out polling waiting on the latest task by the task monitoring execution thread according to the task expected execution time of the latest task;
and when the task monitoring executing thread receives an interrupt trigger signal of the hardware timer or the polling waiting is finished, executing the latest task by the task monitoring executing thread, and returning a corresponding task executing result to the task calling thread.
2. The method according to claim 1, wherein the preset time period is set in a manner that:
and taking the minimum turning period of the hardware timer as a preset time length.
3. The method as recited in claim 1, further comprising:
and when the system is initialized, the clock error of the hardware timer is measured for a plurality of times to obtain a corresponding clock error average value, and the time error correction parameter of the task monitoring execution thread is configured according to the clock error average value.
4. The embedded operating system is characterized by comprising a general interface, an execution framework kernel and a hardware timer driver, wherein the general interface comprises a system initialization interface and an execution framework kernel calling interface, and the execution framework kernel comprises a task execution queue and a task monitoring execution thread;
the hardware timer driver is used for initializing and setting the hardware timer, configuring execution logic of timer interrupt and obtaining the reading of the hardware timer;
the task execution queue is obtained in the following manner: the task calling thread sends an execution task request by calling the execution framework kernel calling interface, and the execution task request is arranged according to the sequence of the task expected execution time to obtain a task execution queue;
the task monitoring execution thread is used for acquiring a latest task from the task execution queue, when the interval between the task expected execution time and the current time of the latest task is larger than the preset time length, setting the interrupt trigger time of the hardware timer through the hardware timer drive according to the task expected execution time of the latest task, otherwise, carrying out polling waiting on the latest task by the task monitoring execution thread according to the task expected execution time of the latest task; and the interrupt trigger signal of the hardware timer is received, or when the polling waiting is finished, the latest task is executed and a corresponding task execution result is returned to the task calling thread.
5. An embedded operating system according to claim 4, wherein the task monitoring thread is highest priority.
6. The embedded operating system of claim 4, wherein the execution framework kernel call interface comprises a synchronous interface and an asynchronous interface.
7. The embedded operating system of claim 4, further comprising a test interface configured to configure a time error correction parameter of the task monitoring execution thread based on a time error average of the hardware timer obtained by a plurality of determinations when executing system initialization.
8. The embedded operating system of claim 4, wherein the system initialization interface is configured to set a minimum rollover period of a hardware timer to the preset length of time when performing system initialization.
9. An electronic device characterized in that an embedded operating system according to any of claims 4 to 8 is used.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110453005.XA CN113176934B (en) | 2021-04-26 | 2021-04-26 | Embedded ultrahigh clock precision timing task execution method and embedded operating system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110453005.XA CN113176934B (en) | 2021-04-26 | 2021-04-26 | Embedded ultrahigh clock precision timing task execution method and embedded operating system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN113176934A CN113176934A (en) | 2021-07-27 |
| CN113176934B true CN113176934B (en) | 2023-05-16 |
Family
ID=76926132
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110453005.XA Active CN113176934B (en) | 2021-04-26 | 2021-04-26 | Embedded ultrahigh clock precision timing task execution method and embedded operating system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN113176934B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114035912A (en) * | 2021-09-28 | 2022-02-11 | 西安空间无线电技术研究所 | Autonomous operation method for data transmission element task sequence of agile satellite |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102455940A (en) * | 2010-10-29 | 2012-05-16 | 迈普通信技术股份有限公司 | Processing method and system of timers and asynchronous events |
| CN103677976A (en) * | 2013-12-09 | 2014-03-26 | 大唐移动通信设备有限公司 | Event handling method and device based on time wheel timer |
| CN104156263A (en) * | 2013-05-14 | 2014-11-19 | 国际商业机器公司 | Interruption of chip component managing tasks, chip, and assembly comprising chip |
| CN106293919A (en) * | 2016-08-12 | 2017-01-04 | 中国航空工业集团公司西安飞行自动控制研究所 | The built-in tasks dispatching device of a kind of Time Triggered and method |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040088704A1 (en) * | 2002-10-30 | 2004-05-06 | Advanced Simulation Technology, Inc. | Method for running real-time tasks alongside a general purpose operating system |
-
2021
- 2021-04-26 CN CN202110453005.XA patent/CN113176934B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102455940A (en) * | 2010-10-29 | 2012-05-16 | 迈普通信技术股份有限公司 | Processing method and system of timers and asynchronous events |
| CN104156263A (en) * | 2013-05-14 | 2014-11-19 | 国际商业机器公司 | Interruption of chip component managing tasks, chip, and assembly comprising chip |
| CN103677976A (en) * | 2013-12-09 | 2014-03-26 | 大唐移动通信设备有限公司 | Event handling method and device based on time wheel timer |
| CN106293919A (en) * | 2016-08-12 | 2017-01-04 | 中国航空工业集团公司西安飞行自动控制研究所 | The built-in tasks dispatching device of a kind of Time Triggered and method |
Non-Patent Citations (2)
| Title |
|---|
| 基于PowerPC的高精度定时器设计与实现;王文竹;郭华;吴庆波;;计算机工程(第16期);全文 * |
| 改善嵌入式Linux实时性能的方法研究;谢其云;;科技信息(科学教研)(第20期);全文 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN113176934A (en) | 2021-07-27 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN110928653B (en) | Cross-cluster task execution method and device, computer equipment and storage medium | |
| US7506218B2 (en) | Timeout request scheduling using grouping and nonsynchronized processing to enhance performance | |
| CN110018914B (en) | Shared memory based message acquisition method and device | |
| US20220100561A1 (en) | Timer-based task processing method and apparatus and electronic device | |
| CN113176934B (en) | Embedded ultrahigh clock precision timing task execution method and embedded operating system | |
| CN111770030A (en) | Message persistence processing method, device and storage medium | |
| CN107341054B (en) | Task execution method and device and computer readable storage medium | |
| WO2016139446A1 (en) | An apparatus and method to generate trace data in response to transactional execution | |
| CN112422221B (en) | Time service calibration method, device, terminal and storage medium for time code | |
| CN111008072A (en) | Task scheduling method and device, storage medium and electronic equipment | |
| US9513969B2 (en) | Method for the management of task execution in a computer system | |
| CN108292236B (en) | Information processing method and device | |
| CN112214291A (en) | Task scheduling method and device | |
| CN107222555B (en) | Message processing method and device | |
| CN111290774A (en) | Method and device for upgrading solid state disk firmware in batch based on Windows system | |
| JP5982845B2 (en) | Trace control apparatus and trace control method | |
| CN114003498A (en) | Software anomaly detection method and device and electronic equipment | |
| US20180173622A1 (en) | Deterministic timing evaluation | |
| US20080059666A1 (en) | Microcontroller and debugging method | |
| CN107491358B (en) | Rapid fault-tolerant processing method based on large data volume of ground micrometer of carrier rocket | |
| CN112286704B (en) | Processing method and device of delay task, computer equipment and storage medium | |
| CN110929102B (en) | Data processing method and device and electronic equipment | |
| CN112148442B (en) | ETL flow scheduling method and device | |
| CN116887222A (en) | Method, device, equipment and medium for overtime reply of asynchronous interface of vehicle-mounted OTA module | |
| JP5907558B2 (en) | MULTI-INTERVAL TIMER AND ITS CONTROL DEVICE, CONTROL METHOD, AND CONTROL PROGRAM |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |