CN113171108A

CN113171108A - ECG monitor adopting dynamic differential algorithm

Info

Publication number: CN113171108A
Application number: CN202110454727.7A
Authority: CN
Inventors: 赵雪成
Original assignee: Xuzhou Yongkang Electronic Science & Technology Co ltd
Current assignee: Xuzhou Yongkang Electronic Science & Technology Co ltd
Priority date: 2021-04-26
Filing date: 2021-04-26
Publication date: 2021-07-27

Abstract

The invention discloses an ECG monitor adopting a dynamic differential algorithm, which comprises a paper electrode, an analog amplification module and a singlechip digital module, wherein the analog amplification module is connected with the paper electrode and comprises a preposed instrument amplification circuit, a driving shielding circuit, a middle main amplification filter circuit, a QRS wave detection circuit and a lead falling detection circuit, and the driving shielding circuit is used for inhibiting electrostatic coupling interference caused by distributed capacitance.

Description

ECG monitor adopting dynamic differential algorithm

Technical Field

The invention relates to the field of medical instruments, in particular to an electrocardiogram monitor adopting a dynamic differential algorithm.

Background

The ECG monitor is a monitoring device widely used in medical treatment, the portable ECG monitor is powered by a battery, the electric quantity storage is smaller than that of a desk-top ECG monitor, the power consumption of a detection system of the desk-top ECG monitor is large compared with that of the desk-top ECG monitor, the portable ECG monitor needs to be changed on the detection system, the electric quantity consumption is optimized, the single mode of the existing portable ECG monitor is universal, the establishment of a medical Internet of things system is not facilitated, the information exchange with a server and a mobile phone terminal can not be realized, and the possibility of generating missed detection exists in a QRS wave detection circuit.

Disclosure of Invention

Aiming at the technical problem, the invention provides an ECG monitor adopting a dynamic differential algorithm,

the method comprises the following steps:

the paper electrode, with analog amplification module and singlechip digital module that the paper electrode is connected, analog amplification module includes leading instrument amplifier circuit, drive shielding circuit, middle main amplification filter circuit, QRS ripples detection circuit and leads and drops detection circuit, drive shielding circuit is used for suppressing the electrostatic coupling interference that distributed capacitance arouses, singlechip digital module include sample hold circuit, AD converter, flash memory, display alarm unit, power control circuit and key control circuit, display alarm unit includes display circuit and sound alarm circuit, the paper electrode is from moist paper electrode, the AD converter adopts 10 bit 8 way AD converter, the sampling frequency of AD converter sets up to 2.5ms timing trigger, the AD converter does the type frequency division processing of a sampling clock at the software level, every 0.5s starts the detection circuitry that drops of leading carries out the judgement that drops of leading once, audible alarm circuit is connected with an outside bee calling organ, outside bee calling organ and button control circuit all are equipped with the soft timer, the soft timer is used for controlling the delay response time of button control circuit and the operating time of outside bee calling organ, flash memory includes data reading and data storage, a server is connected to flash memory, storage information includes the monitor state in the data storage, the monitor state includes last shutdown time, does not send the originated sequence number and the length of electrocardio data section.

Preferably, the display alarm unit adopts an LCD liquid crystal panel to realize human-computer interaction.

Preferably, the flash memory is connected with a GPRS unit.

Preferably, the operational amplifier U1A and the diode D1 in the QRS wave detection circuit form a full-wave rectifier, U1B and U1D form two peak detection circuits with different time peaks, the discharge loop time constants of the U1B peak detection circuit and the U1D peak detection circuit are 0.33s and 3.5s respectively, the circuit includes a resistor R11 and a resistor R12, and the resistor R11 and the resistor R12 are used for voltage division.

Has the advantages that:

1. the invention adopts a soft timing method, ensures the normal operation of sampling conversion and simultaneously meets the timing operation in front-end application.

2. Compared with the traditional automatic threshold value circuit, the QRS wave detection circuit adopting the dynamic difference algorithm avoids the difficulty of threshold value setting.

3. The power control circuit is added to cut off the power of the circuit which does not work at ordinary times, so that the idle nodes on the single chip microcomputer are fully utilized for storing data with large power consumption, and the average working current of the single chip microcomputer is further reduced.

Drawings

The invention will be further described with reference to the accompanying drawings.

FIG. 1 is a schematic view of the overall mechanism of an embodiment of the present invention;

fig. 2 is a diagram of a QRS wave detection circuit of the present invention.

The figures in the drawings represent:

1. the device comprises a paper electrode 2, a preposed instrument amplifying circuit 3, a lead falling detection circuit 4, a single chip microcomputer digital module 5, a QRS wave detection circuit 6, a key control circuit 7, a flash memory 8, a driving shielding circuit 9, a middle main amplifying and filtering circuit 10, a server 11, a GPRS unit 12, a display alarm unit 13 and a power supply control circuit.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all embodiments, and all other embodiments obtained by a person of ordinary skill in the art without creative efforts based on the embodiments of the present invention belong to the protection scope of the present invention.

In the description of the present invention, it is to be understood that the terms "front", "rear", "left", "right", "upper", "lower", and the like, indicate orientations or positional relationships based on those shown in the drawings, and are used merely for convenience in describing the present invention and simplifying the description, but do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention.

As shown in fig. 1 and 2, the present invention includes a paper electrode, an analog amplification module connected with the paper electrode, and a digital module of a single chip microcomputer, wherein the analog amplification module includes a preposed instrument amplification circuit, a driving shielding circuit, a middle main amplification filter circuit, a QRS wave detection circuit, and a lead fall-off detection circuit, the driving shielding circuit is used to suppress electrostatic coupling interference caused by distributed capacitance, the digital module of the single chip microcomputer includes a sample-and-hold circuit, an a/D converter, a flash memory, a display alarm unit, a power control circuit, and a key control circuit, the display alarm unit includes a display circuit and an audio alarm circuit, the paper electrode is a self-wetting paper electrode, the a/D converter adopts a 10-bit 8-way a/D converter, the sampling frequency of the a/D converter is set to 2.5ms timing trigger, the A/D converter is at the software level and is made the class frequency division processing of a sampling clock, starts every 0.5s the detection circuit that drops of leading carries out the judgement that drops of leading once, audible alarm circuit is connected with an outside bee calling organ, outside bee calling organ and button control circuit all are equipped with the soft timer, the soft timer is used for control button control circuit's delay response time and the operating time of outside bee calling organ, flash memory includes data reading and data storage, a server is connected to flash memory, storage information includes the monitor state in the data storage, the monitor state includes last shutdown time, does not send the initial sequence number and the length of electrocardio data section.

The display alarm unit adopts an LCD liquid crystal panel to realize man-machine interaction, the flash memory is connected with a GPRS unit, an operational amplifier U1A and a diode D1 in the QRS wave detection circuit form a full-wave rectifier, U1B and U1D form two peak detection circuits with unequal time peaks, the time constants of discharge loops of the U1B peak detection circuit and the U1D peak detection circuit are respectively 0.33s and 3.5s, a resistor R11 and a resistor R12 are arranged in the circuits, and the resistor R11 and the resistor R12 are used for voltage division.

The QRS wave detection circuit in the existing ECG monitor has defects, in order to effectively inhibit signals such as electromyographic interference and the like and eliminate baseline drift caused by respiration, a mode of reducing P waves and T waves is adopted, so that fundamental waves and second harmonics are highlighted, initial electrocardiosignals are often selected and filtered, the filtered electrocardiosignals are in a multi-peak wave group form, and thus the setting of an automatic threshold value is difficult, on one hand, when the threshold value setting is higher, the output of one QRS wave group generates one jump, liquid leakage is easy to generate when the variation amplitude of the electrocardiosignals is large, such as the ventricular premature beat condition, on the other hand, the threshold value setting is lower for avoiding the detection leakage, and false triggering is easy to generate, the QRS wave detection circuit adopts an operational amplifier U1A, R5, R6, R7, a diode D1 and the like to form a full-wave rectifier, on the other hand, U1B, R8, D2, C1, R9 and U1D, R10, D3 and C2 form two peak value detection circuits, by utilizing the partial pressure of R11 and R12, 70% of the peak value of the former group of QRS waves is taken as the detection threshold value of the latter group of QRS waves, the peak value detector U1C detects the envelope signal after filtering and rectification, the multi-peak waveform is converted into a single-peak waveform, and a group of electric waves only jump once, so that the detection omission and false triggering are avoided to a limited extent.

Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention.

Claims

1. An ECG monitor using dynamic differential algorithm, comprising: including the paper electrode, with analog amplification module and singlechip digital module that the paper electrode is connected, analog amplification module includes leading instrument amplifier circuit, drive shielding circuit, middle main amplification filter circuit, QRS ripples detection circuitry and leads and drops detection circuitry, drive shielding circuit is used for suppressing the electrostatic coupling interference that distributed capacitance arouses, singlechip digital module include sample hold circuit, AD converter, flash memory, display alarm unit, power control circuit and key control circuit, display alarm unit includes display circuit and sound alarm circuit, the paper electrode is from moist paper electrode, the AD converter adopts 10 bit 8 way AD converter, the sampling frequency of AD converter sets up to 2.5ms timing trigger, the AD converter does the type frequency division processing of a sampling clock at the software aspect, every 0.5s starts the detection circuitry that drops of leading carries out the judgement that drops of leading once, audible alarm circuit is connected with an outside bee calling organ, outside bee calling organ with button control circuit all is equipped with the soft timer, the soft timer is used for controlling the delay response time of button control circuit and the operating time of outside bee calling organ, flash memory includes data reading and data storage, a server is connected to flash memory, storage information includes the monitor state in the data storage, the monitor state includes last shutdown time, does not send the initial sequence number and the length of electrocardio data section.

2. The ecg monitor using dynamic differential algorithm as claimed in claim 1, wherein: the display alarm unit adopts an LCD liquid crystal panel to realize human-computer interaction.

3. The ecg monitor using dynamic differential algorithm as claimed in claim 2, wherein: the flash memory is connected with a GPRS unit.

4. The ecg monitor using dynamic differential algorithm as claimed in claim 3, wherein: the QRS wave detection circuit is characterized in that an operational amplifier U1A and a diode D1 form a full-wave rectifier, U1B and U1D form two peak value detection circuits with different time peak values, the time constants of discharge loops of the U1B peak value detection circuit and the U1D peak value detection circuit are 0.33s and 3.5s respectively, a resistor R11 and a resistor R12 are arranged in the circuits, and the resistor R11 and the resistor R12 are used for voltage division.