CN113169810A - Method and apparatus for eliminating blind detection ambiguity - Google Patents

Method and apparatus for eliminating blind detection ambiguity Download PDF

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Publication number
CN113169810A
CN113169810A CN201880099727.6A CN201880099727A CN113169810A CN 113169810 A CN113169810 A CN 113169810A CN 201880099727 A CN201880099727 A CN 201880099727A CN 113169810 A CN113169810 A CN 113169810A
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control information
information bits
bits
aggregation level
encoded control
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CN113169810B (en
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朱凯
陈宇
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Nokia Shanghai Bell Co Ltd
Nokia Oyj
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Nokia Shanghai Bell Co Ltd
Nokia Networks Oy
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/08—Arrangements for detecting or preventing errors in the information received by repeating transmission, e.g. Verdan system
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
    • H04L1/0036—Systems modifying transmission characteristics according to link quality, e.g. power backoff arrangements specific to the receiver
    • H04L1/0038—Blind format detection
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041—Arrangements at the transmitter end
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0071—Use of interleaving
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00—Arrangements affording multiple use of the transmission path
    • H04L5/003—Arrangements for allocating sub-channels of the transmission path
    • H04L5/0053—Allocation of signaling, i.e. of overhead other than pilot signals

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  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
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  • Mobile Radio Communication Systems (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
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Abstract

A method and apparatus for disambiguating blind detection ambiguities. The method is performed at a transmitter and comprises the steps of dividing a coded control information bit sequence into a plurality of sub-blocks, wherein the coded control information bit sequence comprises K original coded control information bits and at least M repetition bits of the original coded control information bits; and interleaving the sub-blocks to form interleaved encoded control information bits, wherein the interleaved encoded control information bits are to be placed on physical resources corresponding to control channel elements employing a first aggregation level, and wherein K interleaved encoded control information bits placed on physical resources corresponding to a start of each blind detection control channel element group according to a second aggregation level are different from K original encoded control information bits, where K is an integer not less than 1 and M is an integer not less than 1.

Description

Method and apparatus for eliminating blind detection ambiguity
Technical Field
The present disclosure relates generally to cellular radio communication systems and, more particularly, to methods and apparatus for blind detection ambiguity resolution (ambiguities).
Background
Ambiguity problems between Aggregation Level (AL)8 and 16 Physical Downlink Control Channel (PDCCH) candidates for a 5G New Radio (NR) system have been discovered. This problem has been previously discussed in the context of Downlink (DL) control and rate matching. A protocol to address this issue has not been reached for enhanced mobile broadband (eMBB) within 3 GPP.
Ambiguity issues under the current 3GPP Rel-15 specifications generally mean that, for example, when a nodeb (gnb) attempts to send multiple Downlink Control Information (DCI) bits on the PDCCH using AL8, with a payload size equal to or less than 108 bits, including Cyclic Redundancy Check (CRC) bits, the User Equipment (UE) is likely to succeed in blind detection using the assumed aggregation level 16, and vice versa, which is caused by the rate matching rules and the nesting properties of the Rel-15 polarization (Polar) codes.
Since ultra-reliable low-delay communication (URLLC) has put forth stricter service requirements unlike eMBB, it is most likely that a higher AL is used in order to ensure ultra-high reliability even under good channel conditions. Therefore, the probability of encountering ambiguity problems is high. Due to the current ambiguity problem, the gNB and the UE will have different understanding of the Physical Downlink Shared Channel (PDSCH) rate matching pattern, which will result in catastrophic decoding at the receiver side.
For example, in R1-1802898, an example of a PDCCH transmitting 40 DCI bits with AL16 is given. According to rate matching as defined in the 3GPP Rel-15 specification, 40 DCI bits are first Polar encoded and then repeated several times in order to fit the physical resource size of 16 Control Channel Elements (CCEs) (equivalent to 1728 bits). Thus, if the UE decodes these coded and rate-matched (repeated) DCI bits under the assumption of AL8, there is a chance that the attempted decoding may be successful (including passing CRC) when the signal-to-noise ratio (SNR) is high enough. This may further lead to adverse results such as wrong rate matching patterns and wrong understanding of the partitioning of PDSCH resources.
Furthermore, when higher aggregation levels (e.g., AL32, AL64) are introduced in the future, this problem is expected to lead to more problems unless effective solutions are proposed.
To address the ambiguity problem described above, existing solutions preferably assume that AL16 is used on the receiver (Rx) side for blind detection, whether AL8 or AL16 is used on the transmitter (Tx) side. This solution is simple but leads to undesirable results, especially for URLLC. If URLLC always uses AL8 and AL16 for transmission, there may be a significant loss in resource utilization, the reason for which will be explained below.
The latest Rel-15 specification allows the use of unoccupied PDCCH core set resources for PDSCH. Since URLLC is very delay sensitive, it would be beneficial to start PDSCH as soon as possible or even simultaneously after PDCCH. Due to the ambiguity problem, if the UE thinks AL8 is used, it might think that there are data symbols around the PDCCH resource, which might not be the case if AL16 is actually used at the transmitter side. Thus, the assumption of using AL16 at the receiver side can only temporarily avoid ambiguity problems, but at the expense of the opportunity for CORESET reuse for PDSCH. As a result, low latency critical to URLLC may be impacted.
Therefore, there is a strong need to provide a more efficient solution to this ambiguity problem.
Disclosure of Invention
The present disclosure will address the foregoing problems by proposing a method and apparatus for eliminating blind detection ambiguity to distinguish AL configurations and accordingly ensure correct detection and decoding of data channels. Other features and advantages of embodiments of the present disclosure will also be appreciated when the following description of specific embodiments is read in conjunction with the accompanying drawings, which illustrate, by way of example, the principles of embodiments of the disclosure.
In a first aspect of the disclosure, a method for disambiguating blind detection ambiguities is provided. The method is performed at a transmitter. The method includes dividing an encoded control information bit sequence into a plurality of sub-blocks, wherein the encoded control information bit sequence includes K original encoded control information bits and at least M repetition bits of the original encoded control information bits. The method also includes interleaving the sub-blocks to form interleaved encoded control information bits, wherein the interleaved encoded control information bits are to be placed on physical resources corresponding to control channel elements employing a first aggregation level, and wherein K interleaved encoded control information bits placed on physical resources corresponding to a start of each group of blind detection control channel elements according to a second aggregation level are different from K original encoded control information bits, wherein K is an integer no less than 1 and M is an integer no less than 1.
In one embodiment, the method may further include determining the number of sub-blocks based on a ratio between a total number of bits placed on physical resources corresponding to control channel elements employing the first aggregation level and a number of original encoded control information bits (i.e., K).
In one embodiment, where the ratio is an integer, the partitioning may include partitioning the sequence of encoded control information bits to form at least one sub-block spanning two adjacent groups of blind detection control channel elements according to the second aggregation level.
In one embodiment, the dividing may include dividing the sequence of encoded control information bits resulting in each of the plurality of sub-blocks including a portion of the bits of one of the original encoded control information bits and/or the repeated bits.
In one embodiment, the dividing may include equally dividing the coded control information bit sequence into a plurality of sub-blocks.
In one embodiment, the partitioning may include non-equally partitioning the coded control information bit sequence into a plurality of sub-blocks.
In one embodiment, a first aggregation stageCan include 2nThe second aggregation level may include 2n-iWherein n is an integer greater than 0 and i is an integer, wherein 0 < i ≦ n.
In one embodiment, the first aggregation level may include 16 and the second aggregation level may include 8.
In one embodiment, the first aggregation level may include 32 and the second aggregation level may include 8 and/or 16.
In one embodiment, the control information bits may include downlink control information bits transmitted on a physical downlink control channel.
In one embodiment, the control information bits may include uplink control information bits transmitted on a physical uplink control channel.
In a second aspect of the present disclosure, there is provided a computer-readable storage medium having stored thereon computer-executable instructions that, when executed by at least one processor, cause performance of a method according to the first aspect of the present disclosure.
In a third aspect of the disclosure, an apparatus for resolving blind detection ambiguity is provided. The apparatus includes at least one processor; and at least one memory including computer-executable instructions. The at least one memory and the computer-executable instructions are configured to, with the at least one processor, cause the apparatus at least to divide an encoded control information bit sequence into a plurality of sub-blocks, wherein the encoded control information bit sequence includes K original encoded control information bits and at least M repetition bits of the original encoded control information bits. The at least one memory and the computer-executable instructions are configured to, with the at least one processor, cause the apparatus at least to interleave the sub-blocks to form interleaved encoded control information bits, wherein the interleaved encoded control information bits are to be placed on physical resources corresponding to control channel elements employing a first aggregation level, and wherein K interleaved encoded control information bits placed on physical resources corresponding to a start of each group of blind detection control channel elements according to a second aggregation level are different from K original encoded control information bits, wherein K is an integer not less than 1 and M is an integer not less than 1.
In one embodiment, the at least one memory and the computer-executable instructions are configured to, with the at least one processor, cause the apparatus at least to determine a number of sub-blocks based on a ratio between a total number of bits placed on physical resources corresponding to control channel elements employing a first aggregation level and a number of original encoded control information bits (i.e., K).
In one embodiment, the at least one memory and the computer-executable instructions are configured to, with the at least one processor, cause the apparatus at least where the ratio is an integer, divide the sequence of encoded control information bits to form at least one sub-block spanning two adjacent groups of blind detection control channel elements according to the second aggregation level.
In one embodiment, the at least one memory and the computer-executable instructions are configured to, with the at least one processor, cause the apparatus at least to divide the sequence of encoded control information bits resulting in each of the plurality of sub-blocks comprising a portion of the bits of the original encoded control information bits and/or a portion of the bits of the repetition bits.
In one embodiment, the at least one memory and the computer-executable instructions are configured to, with the at least one processor, cause the apparatus at least to equally divide the sequence of encoded control information bits into a plurality of sub-blocks.
In one embodiment, the at least one memory and the computer-executable instructions are configured to, with the at least one processor, cause the apparatus at least to divide the sequence of encoded control information bits unequally into a plurality of sub-blocks.
In one embodiment, the first aggregation level may include 2nThe second aggregation level may include 2n-iWherein n is an integer greater than 0 and i is an integer, wherein 0 < i ≦ n.
In one embodiment, the first aggregation level may include 16 and the second aggregation level may include 8.
In one embodiment, the first aggregation level may include 32, and the second aggregation level AL2May include 8 and/or 16.
In one embodiment, the control information bits may include downlink control information bits transmitted on a physical downlink control channel.
In one embodiment, the control information bits may include uplink control information bits transmitted on a physical uplink control channel.
In a fourth aspect of the disclosure, an apparatus for disambiguating blind detection ambiguities is provided. The apparatus includes means for dividing an encoded control information bit sequence into a plurality of sub-blocks, wherein the encoded control information bit sequence includes K original encoded control information bits and at least M repetition bits of the original encoded control information bits. The apparatus also includes means for interleaving the sub-blocks to form interleaved encoded control information bits, wherein the interleaved encoded control information bits are to be placed on physical resources corresponding to control channel elements employing a first aggregation level, and wherein K interleaved encoded control information bits placed on physical resources corresponding to a start of each group of blind detection control channel elements according to a second aggregation level are different from K original encoded control information bits, wherein K is an integer no less than 1 and M is an integer no less than 1.
According to the various aspects and embodiments described above, the ambiguity problem of blind detection can be solved.
Drawings
The above and other aspects, features and advantages of various embodiments of the present disclosure will become more apparent upon reading the following detailed description by way of example with reference to the accompanying drawings in which like reference numerals or letters are used to designate similar or equivalent elements. The accompanying drawings are included to provide a better understanding of embodiments of the disclosure, and are not drawn to scale, wherein:
fig. 1 shows a flow diagram of a method 100 for disambiguating blind detection ambiguities, according to an embodiment of the disclosure;
fig. 2 schematically illustrates a coded control information bit sequence according to an embodiment of the present disclosure;
fig. 3 schematically illustrates a scheme for disambiguating blind detection ambiguities for the AL16 configuration shown in fig. 2;
fig. 4 schematically illustrates another coded control information bit sequence according to an embodiment of the present disclosure;
fig. 5 shows a simplified block diagram of an apparatus according to an embodiment of the present disclosure.
Detailed Description
Hereinafter, the principles of the present disclosure will be described with reference to illustrative embodiments. It is to be understood that all such embodiments are provided solely for the purpose of enabling those skilled in the art to better understand and further practice the present invention, and are not intended to limit the scope of the present disclosure. For instance, features illustrated or described as part of one embodiment, can be used with another embodiment to yield a still further embodiment. In the interest of clarity, not all features of an actual implementation are described in this specification.
In the description, words having similar meanings such as "interleaving", "dispersing", "scattering", "reordering", "changing the order", "mapping", and various combinations of these words may be used interchangeably.
In the description, references to "one embodiment," "an example embodiment," etc., indicate that the embodiment described may include a particular feature, structure, or characteristic, but every embodiment may not include the particular feature, structure, or characteristic. Moreover, such phrases are not intended to refer to the same embodiment. Further, when a particular feature, structure, or characteristic is described in connection with an embodiment, it is submitted that it is within the purview of one skilled in the art to affect such feature, structure, or characteristic in connection with other ones of the embodiments whether or not such other embodiments are explicitly described.
In the following description and claims, unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. For example, the term "transmitting device" or the like as used herein may indicate any device with wireless communication capabilities, including, but not limited to, a base station. The term "receiving device" or the like as used herein may refer to any device having wireless communication capabilities, including but not limited to a terminal equipment or UE. The terminal device or UE may be a mobile phone, a cellular phone, a smart phone or a Personal Digital Assistant (PDA), a portable computer, etc. Furthermore, non-mobile user equipment may also readily employ embodiments of the present invention. In the following description, the terms "user equipment", "UE" and "terminal equipment" may be used interchangeably. Similarly, the term "base station" may denote a Base Station (BS), a node B (NodeB or NB), an evolved NodeB (eNodeB or eNB), a gnodeb (gnb), a Relay Node (RN), and the like.
For purposes of illustration, several embodiments of the present disclosure will be described in the context of a 5G NR system. However, those skilled in the art will appreciate that the concepts and principles of several embodiments of the present disclosure may be more generally applicable to other wireless networks, such as second generation (2G) Radio Access Networks (RANs), third generation long term evolution (3G-LTE) networks, fourth generation (4G) networks, 4.5G LTE or future networks (e.g., 5G networks), cellular internet of things (IoT) RANs, cellular wireless HW.
As used in this application, the term "circuitry" may refer to one or more or all of the following:
(a) hardware-only circuit implementations, (such as implementations in only analog and/or digital circuitry);
(b) a combination of hardware circuitry and software, such as (if applicable): (i) a combination of analog and/or digital hardware circuitry and software/firmware; and (ii) any portion of a hardware processor with software (including a digital signal processor, software, and memory that work together to cause a device such as a mobile phone or server to perform various functions); and
(c) a hardware circuit and/or a processor, such as a microprocessor or a portion of a microprocessor, that requires software (e.g., firmware) to operate, but may not be present when software is not required for operation.
This definition of "circuitry" applies to all uses of that term in this application, including in any claims. As another example, as used in this application, the term "circuitry" also covers an implementation of merely a hardware circuit or processor (or multiple processors) or portion of a hardware circuit or processor and its accompanying software and/or firmware. The term "circuitry" also covers (e.g., and if applicable to the elements specifically claimed) a baseband integrated circuit or processor integrated circuit for a mobile device or a similar integrated circuit in a server, a cellular network device, or other computing or network device.
As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. The term "comprising" and its variants are to be understood as open-ended terms meaning "including but not limited to". The term "based on" is to be understood as "based at least in part on". The terms "one embodiment" and "an embodiment" should be understood as "at least one embodiment". The term "another embodiment" should be understood as "at least one other embodiment". Other definitions, whether explicit or implicit, may be included below.
The present disclosure relates to a scheme for eliminating blind detection ambiguity. As described above, ambiguity problems are associated with the rate matching and nesting properties of Rel-15 Polar codes. Since the basic Polar coding and rate matching procedures have been standardized and are now fixed, a simple and robust mechanism is conceived from the coding chain point of view to distinguish the AL configuration and accordingly ensure correct detection and decoding of PDSCH.
Generally, with respect to AL8/16 ambiguity, it is generally meant that the UE may erroneously detect an AL8 configuration as AL16, and vice versa. Thus, this problem has two practical aspects: AL8 was falsely detected as AL16 and AL16 was falsely detected as AL 8. The following is a summary of a study of 4 cases that may lead to such ambiguities:
1) tx is transmitted with AL-8 and blind detection is performed on Rx side according to the minimum AL. If an ambiguity occurs, the detection with AL8 will fail and the subsequent detection with AL16 will succeed. However, this is not possible.
2) Tx is transmitted with AL8 and blind detection is performed on Rx side according to the highest AL. If an ambiguity occurs, the detection with AL16 will be successful and therefore the blind detection will terminate. This may occur, for example, when the SNR on the Rx side is high for the first 8 CCEs of 16 CCEs and low for the second 8 CCEs of 16 CCEs. Therefore, these 16 CCEs are decoded with AL ═ 16. However, this is rarely the case.
3) Tx is transmitted with AL16 and blind detection is performed on Rx side according to minimum AL. If an ambiguity occurs, the detection with AL8 will be successful and therefore the blind detection will terminate. This is possible, for example, when the channel conditions are good.
4) Tx is transmitted with AL16 and blind detection is performed on Rx side according to the highest AL. If an ambiguity occurs, the detection with AL16 will fail and the subsequent detection with AL8 will succeed. This may occur, for example, when the second 8CCE of 16 CCEs encounters chaotic channel conditions. In this case, if the decoder performs decoding assuming AL is 16, the decoding will fail.
According to the analysis from the perspective of Polar encoding, it is rare that the case where the transmission configured using AL8 is erroneously detected as the transmission configured using AL 16. Thus, the dual problem can be reduced to a single problem, namely how to ensure that AL16 is not falsely detected as AL8, and how to ensure that similar ambiguity problems do not occur again when introducing an AL32 or higher. As previously indicated, when ambiguity occurs, the rate matching rule for Polar codes is repeated, and therefore, the present invention attempts to solve the ambiguity problem from the layer 1 physical code chain.
To ensure that control information sent on the control channel is correctly detected and decoded without confusion at the aggregation level, the present disclosure introduces a partitioning and interleaving mechanism for manipulating the coded control information bits to achieve blind detection ambiguity resolution. Fig. 1 shows a flow diagram of a method 100 for eliminating blind detection ambiguities, according to an embodiment of the present disclosure. As shown in step 110 of fig. 1, the coded control information bit sequence may be divided into a plurality of sub-blocks. The sequence of encoded control information bits may include K original encoded control information bits and at least M repeated bits of the original encoded control information bits, where K is an integer no less than 1 and M is an integer no less than 1. In an embodiment, the control information bits may be downlink control information bits transmitted on a physical downlink control channel. Alternatively, the control information bits may be uplink control information bits transmitted on a physical uplink control channel. As another alternative, the control information bits may include other currently or future available control information bits transmitted on currently or future available physical control channels.
As shown in step 120 of fig. 1, the sub-blocks may be interleaved to form interleaved encoded control information bits, wherein the interleaved encoded control information bits are to be placed on physical resources corresponding to control channel elements employing a first aggregation level, and wherein the K interleaved encoded control information bits placed on the physical resources corresponding to the start of each blind detection control channel element group according to a second aggregation level are different from the K original encoded control information bits. As described above, the words "interleave," "disperse," "scatter," "reorder," "change the order of," "map," and different combinations of these words can indifferently indicate that the order of the multiple sub-blocks is changed. In an embodiment, the order of the K interleaved coded control information bits may be different from the order of the K original coded control information bits.
In addition, the blind detection control channel element group is a group of control channel elements, and the size of each group is determined by the second aggregation level. During each blind detection attempt, the control channel elements in each group may be processed together according to a second aggregation level. For example, in an embodiment, the first aggregation level defined at the Tx side may include 2nAggregation of individual control channel elements, i.e. a first aggregation level equal to 2nAnd at RxThe second aggregation level for blind detection attempts may include 2n-iAggregation of individual control channel elements, i.e. the second aggregation level being equal to 2n-iWherein n is an integer greater than 0 and i is an integer, wherein 0 < i ≦ n.
For example, the first aggregation level may be AL16 and the second aggregation level may be AL 8. Thus, the size of each blind detection control channel element group according to AL8 is 8 control channel elements. In this case, according to AL8, blind detection attempts are performed to recover the control information carried by each set of 8 control channel elements.
As another example, the first aggregation level may be AL32 and the second aggregation level may include AL8 and AL 16. Therefore, blind detection attempts will be performed to recover the control information carried by each group of 8 control channel elements and the control information carried by each group of 16 control channel elements.
In an embodiment, the number of sub-blocks may be determined based on a ratio between a total number of bits placed on physical resources corresponding to control channel elements employing the first aggregation level and a number of original encoded control information bits (i.e., K). In this regard, the length of the original coded control information bits is K bits. For example, a ratio between the total number of bits placed on resources corresponding to, for example, 16 CCEs with aggregation level 16 and the number of coded DCI payload (including CRC) bits (before rate matching) may be derived. Further, the number of the stator pieces may be considered and decided based on the ratio. For example, if the ratio is an integer, one of the sub-blocks should span the first half and the second half of 16 CCEs. For another example, if the ratio is not an integer, the number of sub-blocks may be greater than 2. More details will be described below with respect to fig. 2 and 4.
In an embodiment, the sequence of encoded control information bits may be divided such that each of the plurality of sub-blocks comprises a portion of the bits of the original encoded control information bits and/or a portion of the bits of the repeated bits. Based on this partitioning pattern, it is easy to ensure that the K interleaved coded control information bits placed on the physical resources corresponding to the start of each group of blind detection control channel elements according to the second aggregation level are different from the K original coded control information bits during subsequent processing. Thus, this partitioning pattern may be used for blind detection in various AL configurations.
In an embodiment, the encoded control information bit sequence may be equally divided into a plurality of sub-blocks (i.e., a plurality of equally sized sub-blocks are obtained). The number of resulting sub-blocks may vary depending on the number of bits selected for each sub-block during equal division. In practice, a number of more than 2 is generally feasible. For example, if the sequence of encoded control information bits is quartered, the total number of resulting sub-blocks will be 4 sub-blocks. The partitioning may be according to a first aggregation level. For example, when the first aggregation level is AL16, the number of resulting sub-blocks may be 4. When the first aggregation level is AL32, the number of resulting subblocks may be 8. Alternatively, the coded control information bit sequence may be divided unequally into a plurality of sub-blocks (i.e., a plurality of sub-blocks of unequal size are obtained).
The embodiments discussed above may avoid blind detection ambiguity that misinterprets the second aggregation level as the first aggregation level. Blind detection may be performed at the granularity of one control channel element. In an embodiment, when the first aggregation level is 16, blind detection attempts at the second aggregation level may span 8 control channel elements. That is, on the receiver side, if a blind detection attempt is performed on every 8 control channel elements, the blind detection will not succeed. In another embodiment, when the first aggregation level is 32, blind detection attempts with the second aggregation level performed on every 8 control channel elements and/or every 16 control channel elements will not succeed.
It should be appreciated that the coded control information bit sequence may be partitioned based on other processes in a similar manner, in addition to or instead of the above implementation. In this regard, the number and size of the sub-blocks may be configured to any suitable value. Further, the multiple sub-blocks may be interleaved in any suitable manner. In other words, the proposed solution can be designed based on other similar available operations and steps.
Details of these steps will now be described with respect to some specific embodiments. The solutions in two typical cases are explained in detail below.
Case 1
Fig. 2 schematically shows a coded control information bit sequence according to an embodiment of the present disclosure. In this embodiment, it can be considered that the payload size of the control information bits (including the CRC bits) is smaller than 108 bits, and the payload size of the control information bits (including the CRC bits) is a number not divisible by 108. The transmitter uses the AL16 configuration to send control information bits, such as DCI bits or other control information bits that are currently or later available. Further, the ratio between the total number of bits placed on the physical resource corresponding to the 16CCE employing AL16 and the number of originally encoded DCI (prior to rate matching) bits is not an integer. In this case, it is assumed that the originally encoded DCI bits are repeated twice. In practice, the number of repetitions may vary in the communication system. In this embodiment, the repetition of the originally encoded DCI bits twice is for illustrative purposes only. As shown in fig. 2, the originally encoded DCI bits 201 are represented by a blank gray portion, which may be K bits in length, where K is an integer no less than 1. The repetition 202 of the first rate matching of the original coded control information bits is indicated by the left-hatched part. A part of the repetition 203 of the second rate matching of the original coded control information bits is indicated by the right-slanted line part. The original encoded control information bits 201, the first rate-matched repetitions 202, and the second rate-matched repetitions 203 may be identical to each other. Note that due to the limitation of the total number of bits, only an incomplete part of the second repetition bits in the 16 CCEs can be accommodated by the physical resources corresponding to the 16 CCEs.
As shown in fig. 3, to solve the ambiguity problem, in this example, the coded control information bit sequence comprising the portion of K original coded control information bits 201, the first rate-matched repetition 202, and the second rate-matched repetition 203 is equally divided into 4 sub-blocks, labeled [ 0123 ], for simplicity. The resulting sub-blocks are then interleaved to form interleaved encoded control information bits. The bits of the interleaved subblocks are to be placed on physical resources corresponding to 16 CCEs with aggregation level 16. For example, a total of 4 sub-blocks may be interleaved in an order such as [ 3021 ]. As can be seen from fig. 3, before interleaving, sub-block 1 comprises a part of the bits of the K original coded control information bits 201 and a part of the bits of the first rate-matched repetition 202. Sub-block 3 comprises partial bits of the first rate-matched repetition 202 and partial bits of the second rate-matched repetition 203. These interleaved coded control information bits can be used to achieve differentiation of AL8/AL16 configurations because after interleaving, neither the first 8CCE nor the second 8CCE of the formed 16 CCEs can be correctly decoded using the assumption of AL8 configuration. On the other hand, these interleaved coded control information bits may be correctly decoded using the assumption of the AL16 configuration, since the order of these interleaved coded control information bits may be reversed via corresponding deinterleaving when blind detection attempts are made in the AL16 configuration. Note that the order of this interleaving is not unique, but may be configured according to AL, as long as the K interleaved coded control information bits placed on the physical resources corresponding to the start of each blind detection control channel element group according to AL8 are different from the K original coded control information bits 201. That is, the first K bits placed on the physical resources corresponding to the first and second 8 CCEs of the total 16 CCEs are different from the K original encoded control information bits 201.
Note that the manner in which the division of the coded control information bit sequence is performed may be related to the AL configuration. Furthermore, the way in which the interleaving of the resulting sub-blocks is performed may also depend on AL.
Case 2
In this embodiment, the following case may be considered: the payload size of the DCI bits (including the CRC bits) is just 108 bits or is divisible by 108 and less than 108. The transmitter is configured using AL 16. In this case, it is assumed that the originally encoded DCI bits are repeated three times, again for illustrative purposes only. As shown in fig. 4, the first part is the original coded control information bits 401 (which may also be K bits in length, where K is an integer no less than 1), e.g., DCI bits or other control information bits that are currently or later available, followed by a first rate-matching repetition 402, a second rate-matching repetition 403, and a third rate-matching repetition 404 (i.e., M ═ 3K). Further, the ratio between the total number of bits placed on the physical resource corresponding to 16CCE with AL16 and the number of originally encoded DCI bits (i.e., K bits) is an integer. Based on the concepts of the present disclosure, a solution for avoiding the ambiguity problem shown in fig. 4 is immediately effective. This problem can be easily corrected, for example, by partitioning the coded control information bit sequence comprising the original coded control information bits 401, the first rate-matched repetition 402, the second rate-matched repetition 403, and the third rate-matched repetition 404 to ensure that one of the resulting subblocks in the middle spans the first and second 8 CCEs of a total of 16 CCEs. Thus, after partitioning and interleaving, the K interleaved coded control information bits placed on the physical resources corresponding to each blind detection control channel element group starting from the positions of "0" and "8" are also different from the K original coded control information bits 401. In this example, the control channel elements are indexed starting from "0".
Based on the above description, it should be readily understood that the proposed mechanism may also be applied to AL32 or higher AL cases. The corresponding process for the partitioning and interleaving modes is the same as the process of the above-described embodiment described with respect to AL 16. The general concept can be summarized as follows: from a partitioning perspective, the number of sub-blocks may be determined based on a ratio of a total number of bits placed on physical resources corresponding to control channel elements employing the first aggregation level to a number of original encoded control information bits. From an interleaving perspective, the K interleaved coded control information bits placed on the physical resource corresponding to the start of each blind detection control channel element group according to the second aggregation level are different from the K original coded control information bits. In an embodiment, where the second aggregation level is AL8, the start of each blind detection control channel element group may start with the jth control channel element, where mod (j,8) is 0, when the index of the control channel element starts with "0" and "mod" represents the modulo operation, i.e., the remainder after division.
In summary, the present disclosure introduces a partitioning and interleaving mechanism for manipulating the coded control information bits in order to achieve the elimination of blind detection ambiguities. The introduced mechanism may ensure that control information sent on the control channel is correctly detected and decoded without confusion at the aggregation level, and accordingly further ensure correct detection and decoding of the data channel.
Referring now to fig. 5, a simplified block diagram of an apparatus 500 is shown, according to some embodiments of the present disclosure. The apparatus may be implemented as or in a base station in a radio communication system that may communicate with multiple UEs simultaneously. For example, the base station may be a gbb operating in a 5G NR system. The apparatus 500 is operable to perform the methods described with reference to fig. 1, 2, 3 and/or 4, and possibly any other processes or methods. It should also be understood that any of the methods described above are not necessarily performed entirely by the apparatus 500. Some of the steps of the above-described method may be performed by one or more other entities.
The apparatus 500 may include at least one processor 501, such as a Data Processor (DP), and at least one memory (MEM)502 coupled to the processor 501. The apparatus 500 may also include a transmitter TX and a receiver RX (or transceiver) 503 coupled to the processor 501. The MEM502 stores a Program (PROG) 504. The PROG 504 may comprise instructions that, when executed on the associated processor 501, enable the apparatus 500 to operate in accordance with embodiments of the disclosure, e.g., to perform the above-described methods. The combination of at least one processor 501 and at least one MEM502 may form a processing component 505 suitable for implementing various embodiments of the present disclosure.
Various embodiments of the disclosure may be implemented by computer programs, circuits, software, firmware, hardware, or combinations thereof executable by processor 501. The processor 501 may be of any type suitable to the local technical environment, and may include one or more of general purpose computers, special purpose computers, microprocessors, digital signal processors, DSPs, and processors based on a multi-core processor architecture, as non-limiting examples.
The MEMs 502 may be of any type suitable to the local technical environment and may be implemented using any suitable data storage technology, such as semiconductor-based memory devices, magnetic memory devices and systems, optical memory devices and systems, fixed memory, and removable memory, as non-limiting examples.
The transmitter TX and receiver RX 503 may have multiple antennas with various transmit diversity schemes, e.g., for supporting 5G NR techniques. For example, the apparatus 500 may include two transmit antennas supporting beamforming, or four or more transmit antennas.
In addition, the present disclosure may also provide a carrier containing the computer program, wherein the carrier is one of an electronic signal, an optical signal, a radio signal, or a computer-readable storage medium. The computer-readable storage medium may be, for example, an optical or electronic memory device (e.g., RAM (random access memory), ROM (read only memory)), flash memory, magnetic tape, CD-ROM, DVD, blu-ray disc, etc.
The techniques described herein may be implemented by various means, so that a device implementing one or more functions of a corresponding device described by an embodiment includes not only prior art means but also means for implementing one or more functions of a corresponding device described by an embodiment, may include separate means for each separate function, or a means may be configured to perform two or more functions. For example, the techniques may be implemented in hardware (one or more devices), firmware (one or more devices), circuitry, software (one or more modules), or a combination thereof. For firmware, circuitry, or software, implementation can be through modules (e.g., procedures, functions, and so on) that perform the functions described herein.
Embodiments herein have been described above with reference to block diagrams and flowchart illustrations of methods and apparatus. It will be understood that each block of the block diagrams and flowchart illustrations, and combinations of blocks in the block diagrams and flowchart illustrations, can be implemented by various means including computer program instructions. These computer program instructions may be loaded onto a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions which execute on the computer or other programmable data processing apparatus create means for implementing the functions specified in the flowchart block or blocks.
Further, while operations are depicted in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order, or that all illustrated operations be performed, to achieve desirable results. In some cases, multitasking and parallel processing may be advantageous. Likewise, while several specific implementation details are included in the above discussion, these should not be construed as limitations on the scope of the subject matter described herein, but rather as descriptions of features specific to particular embodiments. Certain features that are described in the context of separate embodiments can also be implemented in combination in a single embodiment. Conversely, various features that are described in the context of a single embodiment can also be implemented in multiple embodiments separately or in any suitable subcombination.
It is obvious to a person skilled in the art that as technology advances, the inventive concept can be implemented in various ways. The above-described embodiments are given for the purpose of illustration and not limitation of the present disclosure, and it will be understood that various modifications and variations can be made without departing from the spirit and scope of the disclosure, as will be readily understood by those skilled in the art. Such modifications and variations are considered to be within the scope of the disclosure and the appended claims. The scope of the disclosure is defined by the appended claims.

Claims (24)

1. A method, comprising:
dividing an encoded control information bit sequence into a plurality of sub-blocks, wherein the encoded control information bit sequence comprises K original encoded control information bits and at least M repeated bits of the original encoded control information bits; and
interleaving the sub-blocks to form interleaved encoded control information bits, wherein the interleaved encoded control information bits are to be placed on physical resources corresponding to control channel elements employing a first aggregation level, and wherein K interleaved encoded control information bits placed on physical resources corresponding to a start of each blind detection control channel element group according to a second aggregation level are different from the K original encoded control information bits, wherein K is an integer not less than 1 and M is an integer not less than 1.
2. The method of claim 1, further comprising:
determining a number of sub-blocks based on a ratio between a total number of bits placed on physical resources corresponding to control channel elements employing the first aggregation level and K.
3. The method of claim 2, wherein, if the ratio is an integer, then the partitioning comprises:
partitioning the sequence of encoded control information bits to form at least one sub-block spanning two adjacent groups of blind detection control channel elements according to the second aggregation level.
4. The method of any of claims 1-3, wherein the partitioning comprises:
dividing the sequence of encoded control information bits resulting in each of the plurality of sub-blocks comprising a portion of the bits of the original encoded control information bits and/or a portion of the bits of the repetition bits.
5. The method of any of claims 1-4, wherein the partitioning comprises:
equally dividing the encoded control information bit sequence into the plurality of sub-blocks.
6. The method of any of claims 1-4, wherein the partitioning comprises:
the encoded control information bit sequence is divided unequally into the plurality of sub-blocks.
7. The method of any of claims 1-6, wherein the first aggregation level comprises 2nSaid second polymerization level comprising 2n-iWherein n is an integer greater than 0 and i is an integer, wherein 0 < i ≦ n.
8. The method of claim 7, wherein the first aggregation level comprises 16 and the second aggregation level comprises 8.
9. The method of claim 7, wherein the first aggregation level comprises 32 and the second aggregation level comprises 8 and/or 16.
10. The method of any one of claims 1 to 9, wherein the control information bits comprise downlink control information bits transmitted on a physical downlink control channel.
11. The method of any of claims 1-9, wherein the control information bits comprise uplink control information bits transmitted on a physical uplink control channel.
12. A computer-readable storage medium having stored thereon computer-executable instructions that, when executed by at least one processor, cause performance of the method recited in any of claims 1-11.
13. An apparatus, comprising:
at least one processor; and
at least one memory including computer-executable instructions;
the at least one memory and the computer-executable instructions are configured to, with the at least one processor, cause the apparatus at a transmitter to at least:
dividing an encoded control information bit sequence into a plurality of sub-blocks, wherein the encoded control information bit sequence comprises K original encoded control information bits and at least M repeated bits of the original encoded control information bits; and
interleaving the sub-blocks to form interleaved encoded control information bits, wherein the interleaved encoded control information bits are to be placed on physical resources corresponding to control channel elements employing a first aggregation level, and wherein K interleaved encoded control information bits placed on physical resources corresponding to a start of each blind detection control channel element group according to a second aggregation level are different from the K original encoded control information bits, wherein K is an integer not less than 1 and M is an integer not less than 1.
14. The apparatus of claim 13, wherein the at least one memory and the computer program code are configured to, with the at least one processor, cause the apparatus to further:
determining a number of sub-blocks based on a ratio between a total number of bits placed on physical resources corresponding to control channel elements employing the first aggregation level and K.
15. The apparatus of claim 14, wherein the at least one memory and the computer program code are configured to, with the at least one processor, cause the apparatus at least to:
in the case where the ratio is an integer, partitioning the sequence of encoded control information bits to form at least one sub-block spanning two adjacent groups of blind detection control channel elements according to the second aggregation level.
16. The apparatus of any of claims 13 to 15, wherein the at least one memory and the computer program code are configured to, with the at least one processor, cause the apparatus at least to:
dividing the sequence of encoded control information bits resulting in each of the plurality of sub-blocks comprising a portion of the bits of the original encoded control information bits and/or a portion of the bits of the repetition bits.
17. The apparatus of any of claims 13 to 16, wherein the at least one memory and the computer program code are configured to, with the at least one processor, cause the apparatus at least to:
equally dividing the encoded control information bit sequence into the plurality of sub-blocks.
18. The apparatus of any of claims 13 to 16, wherein the at least one memory and the computer program code are configured to, with the at least one processor, cause the apparatus at least to:
the encoded control information bit sequence is divided unequally into the plurality of sub-blocks.
19. The apparatus of any of claims 13-18, wherein the first aggregation level comprises 2nSaid second polymerization level comprising 2n-iWherein n is an integer greater than 0 and i is an integer, wherein 0 < i ≦ n.
20. The apparatus of claim 19, wherein the first aggregation level comprises 16 and the second aggregation level comprises 8.
21. The apparatus of claim 19, wherein the first aggregation level comprises 32 and the second aggregation level comprises 8 and/or 16.
22. The apparatus of any one of claims 13 to 21, wherein the control information bits comprise downlink control information bits transmitted on a physical downlink control channel.
23. The apparatus of any one of claims 13 to 21, wherein the control information bits comprise uplink control information bits transmitted on a physical uplink control channel.
24. An apparatus, comprising:
means for dividing an encoded control information bit sequence into a plurality of sub-blocks, wherein the encoded control information bit sequence comprises K original encoded control information bits and at least M repetition bits of the original encoded control information bits; and
means for interleaving the sub-blocks to form interleaved encoded control information bits, wherein the interleaved encoded control information bits are to be placed on physical resources corresponding to control channel elements employing a first aggregation level, and wherein K interleaved encoded control information bits placed on physical resources corresponding to a start of each group of blind detection control channel elements according to a second aggregation level are different from the K original encoded control information bits, wherein K is an integer no less than 1 and M is an integer no less than 1.
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