CN113162654B - Digital multiplexer - Google Patents
Digital multiplexer Download PDFInfo
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- CN113162654B CN113162654B CN202110356367.7A CN202110356367A CN113162654B CN 113162654 B CN113162654 B CN 113162654B CN 202110356367 A CN202110356367 A CN 202110356367A CN 113162654 B CN113162654 B CN 113162654B
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- H—ELECTRICITY
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- H04B3/00—Line transmission systems
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- H04B3/36—Repeater circuits
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
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Abstract
The invention discloses a digital multiplexer, which comprises a case and 6 board cards in the case, and comprises: the system comprises an analog user board, an asynchronous data board, 2 main control unit boards and 2 relay unit boards; the analog user board is used for coding analog two-line voice and four-line voice respectively and also used for finishing the decoding of the two-line voice and the four-line voice; the asynchronous data board is used for converting asynchronous data into TTL level and then sending the TTL level to the main control unit board, and is used for sending the received asynchronous data to the system data terminal; the main control unit board is used for multiplexing two-wire voice and four-wire voice into a voice bus, then multiplexing compressed voice data and asynchronous data into a relay signal, and sending the relay signal to the relay unit board; the device is used for tapping received relay signals of other equipment into asynchronous data and voice data, sending the asynchronous data to an asynchronous data board, restoring the decompressed voice data into PCM code stream, decomposing the PCM code stream into two-line voice data and four-line voice data after processing, and sending the two-line voice data and the four-line voice data to an analog user board.
Description
Technical Field
The invention relates to the technical field of digital communication, in particular to a digital multiplexer.
Background
A certain type of airplane communication system mainly comprises an airborne communication system and a ground communication system. The DDN equipment and the channel equipment undertake the task of machine-ground data transmission. The airborne DDN equipment selects MINILINK/2+ series products and comprises DDN node equipment and a monitoring terminal. The monitoring terminal is a desktop computer and is communicated with the DDN equipment through a super terminal of an operating system to remotely control the DDN node equipment; node equipment is inside to be inserted sheet formula structure, through internal bus connection to network control module, corresponding function is accomplished to each module, and machine carries DDN node equipment and mainly disposes: two network control modules NCL (master and backup are respectively one), four relay link modules ILC.2 (master and backup are respectively connected with a security machine), two four-channel asynchronous modules QAM.2 (master and backup are respectively connected with a security machine, data transmission and network management data), two enhanced voice modules EVM.3 (master and backup are respectively connected with a scheduling voice), a cross-area exchange station module FXS.3 (completing the functions of feeding and ringing current feeding of a telephone and transmitting service words), three power supply modules and the like.
The equipment has the following problems at present:
(1) severe aging of equipment, reduced performance and high failure rate
The airborne DDN equipment works in a high-temperature and low-temperature environment for a long time, the ageing speed of the equipment is increased, the structure and the electrical performance of an electronic device are changed and even become invalid due to high-temperature and low-temperature impact, the performance is reduced, and the stability of the equipment is poor.
(2) Shortage of spare parts, difficulty in purchase and maintenance
The equipment has become a significant equipment hazard for completing testing tasks. Therefore, a new multifunctional digital multiplexer needs to be developed to replace the original DDN equipment according to the new data transmission requirement.
Disclosure of Invention
The invention aims to overcome the technical defects, designs and realizes a novel multifunctional digital multiplexer, and meets the transmission requirements of task data, scheduling and telephone. The software interface is friendly, the configuration is simple, the whole system equipment works stably, and the data transmission of a plurality of test tasks is satisfactorily completed.
In order to achieve the above object, the present invention provides a digital multiplexer, wherein the digital multiplexer comprises a chassis and 6 boards arranged in the chassis, and the 6 boards comprise: the system comprises an analog user board, an asynchronous data board, 2 main control unit boards and 2 relay unit boards; 1 main control unit board is used mainly, and the other main control unit board is used for standby; 1 relay unit board is used mainly, and the other relay unit board is used for standby;
the analog user board is used for respectively coding the analog two-line voice and the analog four-line voice, sending the coded analog two-line voice and the coded analog four-line voice to the main control unit board, and receiving the voice data of the main control unit board to complete the decoding of the two-line voice and the decoding of the four-line voice;
the asynchronous data board is used for converting the received asynchronous data into TTL level and then transmitting the TTL level to the main control unit board, receiving the asynchronous data transmitted by the main control unit board and transmitting the asynchronous data to the system data terminal;
the main control unit board is used for multiplexing two-line voice and four-line voice into a voice bus, performing voice compression coding, multiplexing compressed voice data and asynchronous data into a relay signal, and sending the relay signal to the relay unit board; the system is also used for tapping the received relay signals of other equipment into asynchronous data and voice data, sending the asynchronous data to an asynchronous data board, carrying out voice decompression on the voice data, recovering the decompressed voice data into a PCM code stream, decomposing the voice data into two-line voice data and four-line voice data after processing, and sending the two-line voice data and the four-line voice data to an analog user board;
the relay unit board comprises four relay interfaces, each relay interface works independently, and the relay interfaces are used for sending relay signals sent by the main control unit board to the channel equipment and sending received relay signals of other equipment to the main control unit board.
As an improvement of the above apparatus, the analog user board includes: a two-wire SLIC interface circuit, a four-wire SLIC interface circuit and a PGA;
the two-line SLIC interface circuit comprises 4-path FXS interfaces; the 64kb/s PCM code used for finishing the analog two-line voice and sending to the PGA, and also used for receiving the two-line voice forwarded by the PGA, finishing the 64kb/s PCM decoding of the two-line voice and sending to the two-line telephone;
the four-wire SLIC interface circuit comprises a four-wire SLIC interface, is used for finishing 64kb/s PCM coding of analog four-wire voice and sending the coded data to the PGA, and is also used for receiving the four-wire voice forwarded by the PGA, finishing 64kb/s PCM decoding of the four-wire voice and sending the decoded data to the dispatching single machine;
the PGA is used for receiving and preprocessing the decoded two-line voice and four-line voice and sending the processed two-line voice and four-line voice to the main control unit board; the circuit comprises a main control unit board, a two-wire SLIC interface circuit, a four-wire SLIC interface circuit, a two-wire voice data processing circuit and a four-wire voice data processing circuit, wherein the main control unit board is used for receiving voice data from the main control unit board, tapping the two-wire voice data into the two-wire SLIC interface circuit and tapping the four-wire voice data into the four-wire SLIC interface circuit; the system is used for completing local self-checking; and the method is also used for realizing the state report of the two-wire SLIC interface circuit and the four-wire SLIC interface circuit.
As an improvement of the above apparatus, the asynchronous data board includes: the system comprises a plurality of asynchronous data interfaces, an Ethernet switching module and a debugging network port;
the asynchronous data interface adopts an RS422 interface conversion chip and is used for converting the RS422 into TTL level; the transmission rate of each path of asynchronous data is 4.8kbps, 9.6kbps or 19.2 kbps;
the Ethernet switching module is used for realizing the connection with the two main control unit boards;
and the debugging network port is used for realizing equipment debugging and software upgrading.
As an improvement of the above apparatus, the main control unit board includes: the system comprises an FPGA, a processor, a voice compression module and a clock circuit;
the FPGA is used for realizing anti-fading frame synchronization; generating an alarm signal when the group interface is out of step; the system is used for multiplexing the received compressed voice signal and 4 paths of multiplied by 3 asynchronous serial data to generate a relay signal and sending the relay signal to a relay interface, and supports data transmission with the transmission rate of 32kbps, 64kbps, 128kbps, 256kbps, 512kbps, 1024kbps or 2048kbps between the relay interface and the relay interface; the system comprises a voice compression module, a relay data board and a data processing module, wherein the voice compression module is used for receiving a relay signal of other equipment, and sending the relay signal to the voice compression module; the processor interface signal is also used for generating a processor interface signal, receiving a setting signal of the processor and reporting state information to the processor;
the processor is used for realizing parameter configuration, self-checking control and state query of the digital multiplexer; the main control unit board is used for realizing communication between the main control unit boards, and comprises synchronization of configuration information, intercommunication of heartbeat signals and control of main and standby switching of the main control unit boards; the relay unit board is also used for realizing the state query and the main-standby switching control of the relay unit board;
the voice compression module is used for compressing 64Kbps voice data sent by the analog user class, sending the compressed voice data to the FPGA, and compressing and decoding the voice data of other equipment; the decompressed voice data is restored to PCM code stream, and is decomposed into two-line voice data and four-line voice data after being processed, and the two-line voice data and the four-line voice data are sent to a user simulation board;
the clock circuit is used for realizing temperature compensation crystal oscillator and realizing local high-stability clock.
As an improvement of the above device, the relay interface adopts an RS422 interface conversion chip; and the relay interface is additionally provided with a frame out-of-step alarm signal line for realizing the adaptation with the security machine.
As an improvement of the above apparatus, the digital multiplexer further comprises: and the test interface is used for completing the intercommunication test with the local and opposite end services.
As an improvement of the above device, the 6 boards are arranged in the chassis in a pluggable manner.
As an improvement of the above device, two power modules are further arranged in the case, and any one power module can independently supply power to the equipment.
The invention has the advantages that:
the digital multiplexer can improve the reliability and stability of data transmission.
Drawings
FIG. 1 is a block diagram of the operation of the multiplexor of the present invention;
FIG. 2 is a schematic diagram of a local data interface loopback of the present invention;
FIG. 3 is a local four-wire interface loopback diagram of the present invention;
FIG. 4 is a schematic diagram of a relay loopback of the present invention;
FIG. 5 is a diagram of the asynchronous data test interface and local intercommunication test of the present invention;
FIG. 6 is a testing of the intercommunication of the asynchronous data test interface and the opposite terminal of the present invention;
FIG. 7 is a diagram of a four-wire dispatch test interface and local intercommunication test of the present invention;
FIG. 8 is a diagram of a four-wire dispatch test interface and peer intercommunication test of the present invention;
FIG. 9 is a two-wire voice test interface and local interworking test of the present invention;
FIG. 10 is a diagram of a two-wire voice test interface and local interworking test of the present invention;
FIG. 11 is a relay link quality test of the present invention;
FIG. 12 is a hardware schematic block diagram of the digital demultiplexer of the present invention;
FIG. 13 is a diagram of the hardware components of the airborne digital multiplexer/demultiplexer of the present invention;
FIG. 14 is a functional block diagram of the main control unit board of the present invention;
FIG. 15 is a block diagram of the operating principles of the analog user plane of the present invention;
FIG. 16 is a functional block diagram of an asynchronous data board according to the present invention;
fig. 17 is a functional block diagram of the repeater unit board of the present invention.
Detailed Description
The technical solution of the present invention will be described in detail below with reference to the accompanying drawings.
In a digital communication system, in order to improve the channel utilization, a method of transmitting multiple signals on the same channel without causing interference with each other is called multiplexing. In time division multiplexing, time is divided into a plurality of time slots, each path of signal occupies the respective time slot in time, namely, multiple paths of signals are transmitted in different time, and the signals do not overlap each other in time domain. The digital multiplexing terminal is used for converting a low-speed data code stream into a high-speed data code stream, and the process of combining two or more branch digital signals into a single combined digital signal in a time division multiplexing mode is called digital multiplexing; the digital multiplexer is called as a digital multiplexer for completing the digital multiplexing function; the process of separating one path of composite digital signal into each branch signal at a receiving end is called digital tapping, and the process of completing the digital tapping function is called a digital tapping device. The digital multiplexer, the digital demultiplexer and the transmission channel together form a digital multiplexing system.
The digital multiplexer adopts a series design, and can be suitable for an airborne environment (airborne digital multiplexer) and a vehicle-mounted environment (vehicle-mounted data multiplexer) through software configuration, so that different task requirements are met. The digital multiplexer adopts a multi-relay design, the relay module realizes 1:1 hot standby, each relay can be suitable for connecting a plurality of different types of channel equipment through software configuration, and only the relay channel connection needs to be reasonably planned, so that the simultaneous communication of one digital multiplexer and multiple parties can be realized.
The digital multiplexer has the following functions:
(1) service access capability: analog two-wire voice, analog four-wire voice, and RS-422-a asynchronous data.
(2) A relay interface: an RS-422-A interface, the rate supports 32kbps, 64kbps, 128kbps, 256kbps, 512kbps, 1024kbps, 2048 kbps;
(3) and (3) multiplexing mode: TDM, support 64kbps, 128kbps, 256kbps several speed up-down asymmetric working modes;
(4) the voice compression coding mode: 2.4kbps AMBE, 8kbps G.729 and 16kbps CVSD coding and decoding modes can be selected, wherein each device supports no less than 4 paths in the AMBE coding and decoding modes;
(5) and (3) management control: the monitoring computer is communicated with the digital multiplexer through a monitoring interface (network port) to realize the display and control of the working state of the equipment and the query and configuration of the parameters of the online equipment (without the need of restarting and taking effect);
(6) the configuration parameter storage has a power failure protection function, and configuration data can be exported and imported;
(7) the anti-fading frame synchronization function is provided;
(8) the adaptation function with the crypto: providing a frame out-of-step alarm signal;
(9) the loop-back function of the relay interface and the user interface is provided.
1. System design
1.1 multiplexing function
The main function of the equipment is to realize the access of 2-wire voice service, four-wire voice service and asynchronous data service, and to multiplex them into relay signals, and to transmit them through satellite communication channels or VHF signals. The multiplexing and demultiplexing operation principle of the device is shown in fig. 1.
1) Adopts anti-fading frame synchronization technology and is suitable for wireless channel transmission of satellite, scattering and the like
The anti-fading frame synchronization ensures that the information of each time slot continues to be correctly tapped during deep fading of the wireless channel. The main parameters of the frame synchronization circuit are α ═ 3 and β ═ 4, that is, after capturing frame positioning information for 3 consecutive times, the frame synchronization is considered; when frame positioning is not captured for 4 times continuously, the frame is considered to be out of step, the frame state before the out of step is still kept for tapping when the out of step is carried out, the synchronous mark is unchanged, the circuit time sequence is unchanged, frame positioning information is continuously captured, and when a new frame state is captured, the equipment enters a new synchronous state.
2) The relay rate is variable, and the method is suitable for being accessed to various channel devices
The relay rate of the device supports that 32kbps, 64kbps, 128kbps, 256kbps, 512kbps, 1024kbps and 2048kbps are selectable, supports that the uplink and the downlink are asymmetric, and is suitable for being connected to different channel devices such as VHF and guard channels.
3) By adopting low-speed speech coding technique, channel bandwidth can be saved
The voice service supports voice compression coding and decoding technologies such as 2.4kbps AMBE, 8kbps G.729 and 16kbps CVSD, channel bands are saved, and the channel utilization rate is improved.
4) Dynamic occupation of relay channel bandwidth and improvement of channel utilization rate
Due to the limited bandwidth of the wireless transmission channel, the bandwidth of the relay signal of the equipment is dynamically occupied according to the setting of each service. Allocating relay bandwidth to the service set as enabled, and allocating channel bandwidth to the service set as not enabled; the allocated bandwidth is determined according to the set service relay transmission rate.
5) Multiple clock synchronization modes, meeting the requirements of point-to-point transmission and networking
The device supports two clock synchronization working modes of an internal clock and a line clock.
6) Out-of-step alarm signal
When the group interface is out of step, it generates alarm signal for interconnection with the security machine. The length of the delay time between the determination of the loss of mains in the relay and the sending of the loss of mains alarm signal to the crypto unit may be set.
7) Occupation situation of channel bandwidth of each service
Table 1: bandwidth occupation by each service
1.2 self-test and test function
The equipment has complete self-checking and testing functions, and mainly comprises a self-checking function, a loopback function, a testing function and a relay link evaluation function.
1.2.1 self-test function
The self-checking function of the equipment is that the CPU of the equipment finishes the acquisition of the state information of the relevant level, the SLIC working state and the like of the equipment and judges whether the equipment works normally according to the acquisition result.
1.2.2 loopback functionality
The equipment can realize interface loopback and relay loopback tests, and the asynchronous data of the equipment and the working condition of the analog four-wire service can be detected through the interface and relay loopback tests to determine whether each unit part is normal.
a) Local data interface loopback
Local data interface loopback as shown in fig. 2, a local data interface loopback test can test whether the asynchronous data interface circuit is normal.
b) Local four-wire interface loopback
Local four-wire interface loopback as shown in fig. 3, a local four-wire interface loopback test can test whether the four-wire interface circuit is normal.
c) Relay loopback
The relay loopback is shown in fig. 4, and a local relay interface loopback and an opposite-end relay loopback are realized.
When the local relay loops back, whether the interface circuit and the multiple tap are normal or not can be tested for the asynchronous data service; for the four-wire voice service, whether the four-wire SLIC circuit, the voice compression coding and decoding and the multiple division connection are normal can be tested.
1.2.3 testing interface function
The front panel of the equipment is designed with a test interface which comprises an asynchronous data interface, a four-wire voice interface and a two-wire telephone interface, and the test interface can complete the intercommunication test with local and opposite end services.
a) Asynchronous data test interface and local intercommunication test
The asynchronous data test interface and local data traffic interworking test is shown in fig. 5. The asynchronous data test interface replaces the corresponding interface of the digital multiplexer 2 to communicate with the local asynchronous data interface, and tests whether the interface of the local asynchronous data service is normal.
b) Intercommunication test between asynchronous data test interface and opposite terminal
The asynchronous data test interface and peer data service interworking test is shown in fig. 6. The asynchronous data test interface replaces the asynchronous data interface of the digital multiplexer 1 to communicate with the corresponding interface of the opposite terminal, and tests whether the communication between the asynchronous data service of the opposite terminal and the local terminal is normal.
c) Four-wire dispatching test interface and local intercommunication test
The four-wire dispatching test interface and local dispatching single machine intercommunication test is shown in fig. 7, the dispatching single machine 2 can replace the dispatching single machine 1' to intercommunicate with the local dispatching single machine 1, and can test whether the interface and voice compression of the local four-wire voice service are normal.
d) Four-wire dispatching test interface and opposite terminal intercommunication test
As shown in fig. 8, the dispatch single machine 2 may replace the dispatch single machine 1 to intercommunicate with the opposite dispatch single machine 1', and test whether the interface, voice compression, and multiplexing of the four-wire voice service of the opposite terminal are normal.
e) Two-wire voice test interface and local intercommunication test
As shown in fig. 9, the phone 3 can replace the phone 1 'to communicate with the phone 1 at the home terminal, and can replace the phone 2' to communicate with the phone 2 of the SPC exchange connected to the home terminal interface, so as to test whether the interface and voice compression of the two-line voice service at the home terminal are normal.
f) Two-wire voice test interface and opposite terminal intercommunication test
As shown in fig. 10, the phone 3 can replace the phone 1 to intercommunicate with the phone 1 'of the opposite terminal, can replace the phone 2 to intercommunicate with the phone 2' of the program controlled switch of the opposite terminal, and tests whether the interface, voice compression and multiplexing of the two-line voice service of the opposite terminal are normal.
1.2.4 Relay Link quality testing
A test code stream generation module inside the digital multiplexer generates a test code stream, a test code stream detection module performs detection to realize the transmission quality test of the intermediate link, and the relay link quality test principle is shown in fig. 11. When the relay interface loops back, single-ended testing can be realized.
1.3 device interface
TABLE 2 airborne equipment external interface
2. Hardware design
2.1 working principle
The hardware operating principle is shown in fig. 12.
In the multiplexing direction, analog two-line data and analog four-line data are multiplexed into a voice bus after voice preprocessing, sent to a voice compression module for voice compression coding and decoding, and then sent to a multiplexing and demultiplexing module for multiplexing and demultiplexing; and sending the asynchronous data to a multiplexing unit for multiplexing. And the group route data after the complex tapping is sent to the channel equipment by the relay interface.
In the tapping direction, the group data from the channel equipment is tapped into data service and voice service through a multiple tapping unit, and the data service is sent to an asynchronous data interface and sent to a system data terminal; the voice service recovers the compressed data into PCM code stream through the voice compression module, then sends the PCM code stream to the voice preprocessing module, and then respectively sends the PCM code stream to the voice interface module.
The plugboard and the module of the two devices are designed uniformly, and the plugboard and the module mainly comprise a main control unit board, a relay unit board, an analog user board, an asynchronous data board, a backboard and a power module.
2.2 Equipment composition
a) Hardware composition of airborne digital multiplexer
The hardware composition of the onboard digital multiplexer is shown in fig. 13, and the device configuration is shown in table 3.
TABLE 3 configuration table of airborne digital multiplexer
2.3 working principle of each cell plate
2.3.1 Power Module
The power supply module is designed by fully considering the power supply characteristics and requirements of the aircraft, and the power supply scheme is safe, efficient and reliable. The design of the power supply is therefore as follows:
1) the power supply adopts a 1:1 redundancy design, any power supply can independently work to supply power to equipment, and two power supply modules work simultaneously to form a load sharing working mode;
2) the power supply adopts an isolated power supply;
3) a filter is additionally arranged at the front end of the power supply, so that the electromagnetic compatibility of the power supply of the equipment is improved; .
Through estimation, the power consumption of the airborne digital multiplexer and the power consumption of the vehicle-mounted digital multiplexer are not more than 100W, and the power supply modules are designed in a unified mode.
The power supply is designed to meet the following requirements:
1) power factor: when the power is more than 100VA, the power factor does not have a leading power factor.
2) Current distortion: excessive current distortion, with a current distortion factor of no more than 10%, should not be introduced enough to affect other devices.
3) Impact current: at a power of more than 200W, the peak value of the generated surge current should be no more than 5 times of the rated current when the rated voltage is suddenly applied, and return to the rated current within 0.1 s.
2.3.2 Main control Unit Board
The working principle of the main control unit board is shown in fig. 14.
1)FPGA
The FPGA is a core device of a main control unit board and mainly realizes the following functions:
a) realizing data complex tapping in a TDM mode;
b) realizing anti-fading frame synchronization;
c) generating an alarm signal when the group interface is out of step;
d) realizing CVSD voice compression coding and decoding;
e) support 4 way synchronous serial relay interfaces
The transmission rate support is optional for 32kbps, 64kbps, 128kbps, 256kbps, 512kbps, 1024kbps, 2048 kbps;
the transmission mode is synchronous data serial transmission;
clock mode: 113 and 115 clocks;
and adding a frame out-of-step alarm signal line to the relay interface for realizing the adaptation with the security machine.
f) The multiplexing and the division of 4 paths of multiplied by 3 asynchronous serial data are supported, and the transmission rate of each path of asynchronous data is 4.8kbps, 9.6kbps and 19.2 kbps;
g) the method supports 4-path multiplied by 3 analog two-line user data compression coding multiple tapping;
h) the multiplexing of 4-path multiplied by 3 analog four-line user data compression coding is supported;
i) generating a processor interface signal, supporting receiving a setting signal of a processor and reporting state information to the processor;
2) processor with a memory having a plurality of memory cells
a) The monitoring interface is designed to be an internet access, 100/1000Mbps Ethernet interface. The monitoring computer communicates with the digital multiplexer through the monitoring interface to realize the parameter configuration, self-checking control and state query of the equipment;
b) the communication between the main control unit boards is completed, which mainly comprises the synchronization of configuration information, the intercommunication of heartbeat signals and the control of the main-standby switching of the main control unit boards;
c) finishing the state query and the main-standby switching control of the relay interface module;
d) the working parameters of the equipment have the automatic synchronization function of the main and standby main control unit boards and the power failure protection function, the configuration parameters can be led in and led out through the monitoring interface, and the configuration parameters can take effect without restarting the configuration information of the equipment parameters;
e) and G.729 voice compression coding and decoding are realized.
3) The voice compression module realizes the compression coding and decoding functions of 64Kbps voice data and can compress, code and decode low-speed voice at 2.4 Kbps;
4) and the clock circuit is realized by a temperature compensation crystal oscillator, so that a local high-stability clock is realized.
2.3.3 analog user plane
The working principle of the simulated user board is shown in fig. 15:
1) two-wire SLIC interface circuit
The two-line SLIC interface circuit completes the functions of 64kb/s PCM coding and decoding of two-line voice, and the two-line SLIC interface circuit is designed into an automatic phone interface (FXS interface) and a switchboard user interface (FXO interface) which can be selected. The main technical indexes of the automatic telephone interface are as follows:
a) interface impedance: 600 omega;
b) interface level: sending 0dBr, receiving-3.5 dBr;
c) frequency bandwidth: 300-3400 Hz;
d) level deviation tolerance: 0.8 dB;
e) reflection loss: not less than 12 dB;
f) ringing frequency: 25 +/-5 Hz;
g) ringing voltage: the method conforms to the ringing current source technical index requirement of 75 +/-15V in the YD/T751-;
h) line voltage: 48V;
i) loop resistance: 1310 Ω;
j) and (3) loop signaling: dual tone multi-frequency and pulse dialing.
2) Four-wire SLIC interface circuit
The four-wire SLIC interface circuit completes the functions of 64kb/s PCM coding and decoding of four-wire voice and the like. The main technical indexes are as follows:
a) interface impedance: 600 antibody;
b) interface level: transmitting-14 dBr, receiving +4 dBr;
c) frequency bandwidth: 300-3400 Hz;
d) level deviation tolerance: 0.6 dB;
e) reflection loss: not less than 20 dB;
3)PGA
PGA mainly performs the following functions:
a) the voice data are preprocessed, sent to the main control unit board, received from the main control unit board, and tapped to each SLIC circuit;
b) the automatic telephone interface completes the functions of on-off detection, ringing control and the like;
c) the user interface of the switch completes the functions of ringing detection, on-off control and the like;
d) completing a unit self-checking function;
e) the interface with the main control unit board is completed, and the state report of the two-line SLIC interface circuit and the control of the main control unit board on the interface are realized.
2.3.4 asynchronous data board
The working principle of the asynchronous data board is shown in fig. 16, level conversion between an asynchronous data interface RS-422-A and a TTL level is realized, the asynchronous interface is realized by adopting an RS422 interface conversion chip, and the following technical indexes are met:
a) a driving mode: balanced driving;
b) transmission distance: not less than 50 meters.
The Ethernet switching module realizes the function of Ethernet two-layer switching, and for the vehicle-mounted digital multiplexer, the Ethernet switching module realizes the interconnection of the main and standby main control unit boards and the interconnection of the equipment and the network management monitoring system; for the airborne digital multiplexer and the Ethernet switching module, the interconnection of the main and standby main control unit boards, the interconnection between two airborne multiplexers and the interconnection of equipment and a network management monitoring system are realized.
The debugging network port is positioned on the front panel and used for equipment debugging and software upgrading.
2.3.5 Relay Unit Board
The principle of operation of the relay unit board is shown in fig. 17. Each relay unit board comprises four RS-422 interface circuits, each RS-422 interface circuit works independently to realize level conversion between the RS-422-A interface and the TTL level, the relay interface is realized by adopting an RS422 interface conversion chip, and the relay interface conversion chip meets the following technical indexes:
a) a driving mode: balanced driving;
b) transmission distance: the transmission distance is not less than 50 meters.
2.3.6 indicator lamp unit board
The indicator light unit is an important man-machine interface of the digital multiplexer, is used for the running state indication of each part of the digital multiplexer, mainly include:
a) indicating the normal operation of the power supply;
b) indicating the master control working state;
c) and (4) relay working state indication.
The definition of the onboard digital multiplexer indicator light is shown in table 4.
Table 4: airborne digital multiplexer indicator light definition
Finally, it should be noted that the above embodiments are only used for illustrating the technical solutions of the present invention and are not limited. Although the present invention has been described in detail with reference to the embodiments, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted without departing from the spirit and scope of the invention as defined in the appended claims.
Claims (5)
1. A digital multiplexer, characterized in that, digital multiplexer includes a quick-witted case and sets up 6 integrated circuit boards in the quick-witted case, and 6 integrated circuit boards include: the system comprises an analog user board, an asynchronous data board, 2 main control unit boards and 2 relay unit boards; 1 main control unit board is used mainly, and the other main control unit board is used for standby; 1 relay unit board is used mainly, and the other relay unit board is used for standby;
the analog user board is used for respectively coding the analog two-line voice and the analog four-line voice, sending the coded analog two-line voice and the coded analog four-line voice to the main control unit board, and receiving the voice data of the main control unit board to complete the decoding of the two-line voice and the decoding of the four-line voice;
the asynchronous data board is used for converting the received asynchronous data into TTL level and then transmitting the TTL level to the main control unit board, receiving the asynchronous data transmitted by the main control unit board and transmitting the asynchronous data to the system data terminal;
the main control unit board is used for multiplexing two-line voice and four-line voice into a voice bus, performing voice compression coding, multiplexing compressed voice data and asynchronous data into a relay signal, and sending the relay signal to the relay unit board; the system is also used for tapping the received relay signals of other equipment into asynchronous data and voice data, sending the asynchronous data to an asynchronous data board, carrying out voice decompression on the voice data, recovering the decompressed voice data into a PCM code stream, decomposing the PCM code stream into two-line voice data and four-line voice data after processing, and sending the two-line voice data and the four-line voice data to the analog user board;
the relay unit board comprises four relay interfaces, each relay interface works independently, and the relay interfaces are used for sending relay signals sent by the main control unit board to the channel equipment and sending received relay signals of other equipment to the main control unit board;
the simulated user board comprises: a two-wire SLIC interface circuit, a four-wire SLIC interface circuit and a PGA;
the two-line SLIC interface circuit comprises 4-path FXS interfaces; the 64kb/sPCM code used for finishing the analog two-line voice and sending to the PGA, and also used for receiving the two-line voice forwarded by the PGA, finishing the 64kb/sPCM decoding of the two-line voice and sending to the two-line telephone;
the four-wire SLIC interface circuit comprises a four-wire SLIC interface, is used for completing 64kb/sPCM coding of analog four-wire voice and sending the coded data to the PGA, and is also used for receiving the four-wire voice forwarded by the PGA, completing 64kb/sPCM decoding of the four-wire voice and sending the decoded data to the dispatching single machine;
the PGA is used for completing the preprocessing of the decoded two-line voice and four-line voice and sending the two-line voice and the four-line voice to the main control unit board; the interface circuit is used for receiving voice data from the main control unit board, tapping two-wire voice data in the main control unit board to the two-wire SLIC interface circuit and tapping four-wire voice data in the main control unit board to the four-wire SLIC interface circuit; the system is used for completing local self-checking; the state reporting module is also used for reporting the states of the two-wire SLIC interface circuit and the four-wire SLIC interface circuit;
the asynchronous data board comprises: the system comprises a plurality of asynchronous data interfaces, an Ethernet switching module and a debugging network port;
the asynchronous data interface adopts an RS422 interface conversion chip and is used for converting the RS422 into TTL level; the transmission rate of each path of asynchronous data is 4.8kbps, 9.6kbps or 19.2 kbps;
the Ethernet switching module is used for realizing the connection with the two main control unit boards;
the debugging network port is used for realizing equipment debugging and software upgrading;
the main control unit board includes: the system comprises an FPGA, a processor, a voice compression module and a clock circuit;
the FPGA is used for realizing anti-fading frame synchronization; generating an alarm signal when the group interface is out of step; the system is used for multiplexing the received compressed voice signal and 4 paths of multiplied by 3 asynchronous serial data to generate a relay signal and sending the relay signal to a relay interface, and supports data transmission with the transmission rate of 32kbps, 64kbps, 128kbps, 256kbps, 512kbps, 1024kbps or 2048kbps between the relay interface and the relay interface; the system comprises a voice compression module, an asynchronous data board and a relay module, wherein the voice compression module is used for receiving a relay signal of other equipment and sending the relay signal to the voice compression module; the processor interface signal is also used for generating a processor interface signal, receiving a setting signal of the processor and reporting state information to the processor;
the processor is used for realizing parameter configuration, self-checking control and state query of the digital multiplexer; the main control unit board is used for realizing communication between the main control unit boards, and comprises synchronization of configuration information, intercommunication of heartbeat signals and control of main and standby switching of the main control unit boards; the relay unit board is also used for realizing the state query and the main-standby switching control of the relay unit board;
the voice compression module is used for compressing 64Kbps voice data sent by the analog user board, sending the compressed voice data to the FPGA, and compressing and decoding the voice data of other equipment; the decompressed voice data is restored into PCM code stream, and is decomposed into two-line voice data and four-line voice data after being processed, and the two-line voice data and the four-line voice data are sent to a user simulation board;
the clock circuit is used for realizing temperature compensation crystal oscillator and realizing local high-stability clock.
2. The digital multiplexer of claim 1, wherein the relay interface employs an RS422 interface conversion chip; and the relay interface is additionally provided with a frame out-of-step alarm signal line for realizing the adaptation with the security machine.
3. The digital multiplexer of claim 1, wherein the digital multiplexer further comprises: and the test interface is used for completing the intercommunication test with the local and opposite end services.
4. The digital multiplexer of claim 1, wherein said 6 boards are pluggably mounted in a chassis.
5. The digital multiplexer of claim 1, wherein two power modules are further disposed within the housing, and any one of the power modules is capable of independently providing power to the device.
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