CN113138354B - Self-checking method and system of I-type three-level inverter - Google Patents
Self-checking method and system of I-type three-level inverter Download PDFInfo
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- CN113138354B CN113138354B CN202110407292.0A CN202110407292A CN113138354B CN 113138354 B CN113138354 B CN 113138354B CN 202110407292 A CN202110407292 A CN 202110407292A CN 113138354 B CN113138354 B CN 113138354B
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
- G01R31/52—Testing for short-circuits, leakage current or ground faults
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/327—Testing of circuit interrupters, switches or circuit-breakers
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
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Abstract
The invention provides a self-checking method and a system of an I-type three-level inverter, wherein the self-checking method comprises the following steps: step S1, starting up the bus voltage slowly, and detecting whether the direct current bus is short-circuited or not according to the ratio of the actual bus voltage test value to the input voltage peak value; s2, detecting whether the inversion voltage of the I-type three-level inverter is normal or not before applying the PWM driving signal; s3, sequentially applying PWM driving signals to a switching tube of the I-type three-level inverter, and detecting whether the switching tube is normal or not; and S4, controlling the inversion voltage to rise from 0 to a preset voltage set value, monitoring the inversion voltage in real time in the process of rising of the inversion voltage, judging the absolute value of the voltage difference between the actual inversion voltage and the voltage set value, and further detecting whether the inversion voltage is normal. The invention can effectively and comprehensively detect the abnormal condition of the switch of the I-type three-level inverter in time and can effectively avoid overcurrent or overvoltage damage.
Description
Technical Field
The invention relates to a self-checking method of an inverter, in particular to a self-checking method of an I-type three-level inverter and a self-checking system adopting the self-checking method of the I-type three-level inverter.
Background
The I type 3 level inverter is a relatively complex topology, has high requirements on a power-on and power-off time sequence, and needs to make some power-on self-test logics before the inverter is powered on in order to prevent the inverter from further damage when the inverter is powered on under the abnormal condition, but the prior art has no design on the aspect. The damage of the switching tube generally has two conditions of short circuit and open circuit, the short circuit easily causes overcurrent damage of the switching tube, and the open circuit easily causes overvoltage damage of the switching tube, so how to timely and effectively detect the abnormal condition of the switching tube of the inverter is a basis to be considered for avoiding further overcurrent or overvoltage damage of the inverter.
Disclosure of Invention
The technical problem to be solved by the invention is to provide a self-checking method of an I-type three-level inverter, which can timely and effectively detect the abnormal condition of a switch, and further can effectively avoid the inverter from overcurrent or overvoltage damage.
In view of the above, the present invention provides a self-checking method of an I-type three-level inverter, comprising the steps of:
step S1, starting up the bus voltage slowly, and detecting whether the direct current bus is short-circuited or not according to the ratio of the actual bus voltage test value to the input voltage peak value;
s2, detecting whether the inversion voltage of the I-type three-level inverter is normal or not before applying the PWM driving signal;
s3, sequentially applying PWM driving signals to a switching tube of the I-type three-level inverter, and detecting whether the switching tube is normal or not;
and S4, controlling the inversion voltage to rise from 0 to a preset voltage set value, monitoring the inversion voltage in real time in the process of rising of the inversion voltage, judging the absolute value of the voltage difference between the actual inversion voltage and the voltage set value, and further detecting whether the inversion voltage is normal.
The invention is further improved in that the I-type three-level inverter comprises a capacitor C1, a capacitor C2, a diode D1, a diode D2, a switch tube Q1, a switch tube Q2, a switch tube Q3, a switch tube Q4, an inductor L1 and a capacitor C3, a positive bus is connected to one end of the capacitor C1 and one end of the switch tube Q1 respectively, the other end of the switch tube Q1 is connected to a cathode of the diode D1 and one end of the switch tube Q2 respectively, the other end of the capacitor C1, an anode of the diode D1, a cathode of the diode D2 and one end of the capacitor C2 are connected to a neutral line, the other end of the switch tube Q2 is connected to one end of the switch tube Q3 and one end of the inductor L1 respectively, an anode of the diode D2 and the other end of the switch tube Q3 are connected to one end of the switch tube Q4, the other end of the capacitor C2 and the other end of the switch tube Q4 are connected to a negative bus, the other end of the inductor L1 and one end of the capacitor C3 are connected to an L end of an inversion voltage, and the other end of the capacitor C3 is connected to an N end of an inversion voltage bus.
In the step S1, when the ratio of the actual bus voltage test value to the input voltage peak value is greater than the first threshold value, the slow start is considered to be successful, the main power circuit is started to supply power to the dc bus, and the step S2 is skipped; if not, judging that the inverter is abnormal, and stopping the self-checking work; the first threshold value is a preset direct current bus short circuit threshold value.
A further development of the invention is that said step S2 comprises the following substeps:
step S201, judging whether the inversion voltage is smaller than a second voltage threshold value, if so, skipping to step S3; if not, jumping to step S202; the second voltage threshold is a preset inversion voltage threshold;
step S202, after waiting for a first preset time, returning to judge whether the inversion voltage is smaller than a second voltage threshold value, and if so, skipping to the step S3; if not, judging that the inversion voltage is abnormal, and stopping self-checking work; the first preset time is preset return judgment waiting time.
A further development of the invention is that said step S3 comprises the following substeps:
step S301, applying a PWM driving signal which is gradually increased to a switching tube Q2, detecting whether the inversion voltage is smaller than a third voltage threshold value, and if so, skipping to step S302; if not, judging that the inverter is abnormal, and stopping self-checking work; the third voltage threshold is an inversion voltage threshold which is preset and used for judging the working state of the switching tube;
step S302, applying the PWM driving signals which are gradually increased to the switching tube Q1, detecting whether the inversion voltage is smaller than a third voltage threshold value, and if so, skipping to step S303; if not, judging that the inverter is abnormal, and stopping self-checking work;
step S303, applying a PWM driving signal which is gradually increased to a switching tube Q3, detecting whether the inversion voltage is smaller than a third voltage threshold value, and if so, skipping to step S304; if not, judging that the inverter is abnormal, and stopping self-checking work;
step S304, applying the PWM driving signals which are gradually increased to a switching tube Q4, detecting whether the inversion voltage is smaller than a third voltage threshold value, and if so, skipping to the step S4; if not, the inverter is judged to be abnormal, and the self-checking work is stopped.
The further improvement of the present invention is that, in step S4, it is determined whether the absolute value of the voltage difference between the actual inverter voltage and the voltage set value is greater than a fourth voltage threshold, if yes, it is further determined whether the duration that the absolute value of the voltage difference is greater than the fourth voltage threshold reaches a second preset time, and if yes, it is determined that the inverter is abnormal, and the self-checking operation is stopped; if not, judging that the inverter is normal, and finishing self-checking; the fourth voltage threshold is a preset voltage threshold in the process of slowly starting the inverter voltage, and the second preset time is a preset abnormal duration threshold in the process of slowly starting the inverter voltage.
In a further improvement of the present invention, in step S3, when the PWM driving signal is applied to the switching tube in a stepwise increasing manner, if a dc voltage is generated on the capacitor C3, it is determined that the switching tube in the same bus circuit as the switching tube to which the PWM driving signal is currently applied is short-circuited.
In a further improvement of the present invention, in the step S4, when the inverter voltage is controlled to increase from 0 to a preset voltage setting value, if there is an abnormal slow dc voltage on the capacitor C3, it is determined that there is an open circuit of the switching tube.
In a further improvement of the present invention, in the step S4, when the inverter voltage is controlled to increase from 0 to a preset voltage setting value, if there is no voltage on the capacitor C3, it is determined that at least two switching tubes are open-circuited.
The invention also provides a self-checking system of the I-type three-level inverter, which adopts the self-checking method of the I-type three-level inverter and comprises the following steps: the direct current bus voltage detection circuit, the inversion voltage detection circuit, the switch tube detection circuit, the threshold comparison circuit and the PWM signal generation circuit are respectively connected with the threshold comparison circuit, and the switch tube detection circuit is connected with the PWM signal generation circuit.
Compared with the prior art, the invention has the beneficial effects that: through processes such as direct current bus voltage short circuit detection, wave-front inversion voltage detection, switch tube detection in proper order and inversion voltage slow-start process detection, can in time, effectively and detect out the switching abnormal condition of the I type three-level inverter comprehensively, and then can effectively avoid the I type three-level inverter to take place further overcurrent or overvoltage damage for the product is reliable and stable, long service life.
Drawings
FIG. 1 is a schematic workflow diagram of one embodiment of the present invention;
fig. 2 is a circuit schematic of a type I three-level inverter of an embodiment of the present invention.
Detailed Description
Preferred embodiments of the present invention will be described in further detail below with reference to the accompanying drawings.
As shown in fig. 1, the present example provides a self-test method for an I-type three-level inverter, which includes the following steps:
step S1, starting up the bus voltage slowly, and detecting whether the direct-current bus is short-circuited or not according to the ratio of an actual bus voltage test value to an input voltage peak value;
s2, detecting whether the inversion voltage of the I-type three-level inverter is normal or not before applying the PWM driving signal;
s3, sequentially applying PWM driving signals to a switching tube of the I-type three-level inverter, and detecting whether the switching tube is normal or not;
and S4, controlling the inversion voltage to rise from 0 to a preset voltage set value, monitoring the inversion voltage in real time in the process of rising of the inversion voltage, judging the absolute value of the voltage difference between the actual inversion voltage and the voltage set value, and further detecting whether the inversion voltage is normal.
As shown in fig. 2, the I-type three-level inverter in this embodiment includes a capacitor C1, a capacitor C2, a diode D1, a diode D2, a switch Q1, a switch Q2, a switch Q3, a switch Q4, an inductor L1, and a capacitor C3, a positive bus is connected to one end of the capacitor C1 and one end of the switch Q1, the other end of the switch Q1 is connected to a cathode of the diode D1 and one end of the switch Q2, the other end of the capacitor C1, an anode of the diode D1, a cathode of the diode D2, and one end of the capacitor C2 are connected to a neutral line, the other end of the switch Q2 is connected to one end of the switch Q3 and one end of the inductor L1, an anode of the diode D2 and the other end of the switch Q3 are connected to one end of the switch Q4, the other end of the capacitor C2 and the other end of the switch Q4 are connected to a negative bus, the other end of the inductor L1 and one end of the capacitor C3 are connected to an L terminal of an inverting voltage, and the other end of the capacitor C3 is connected to an N terminal of the inverting voltage. The switch tube is a switch device, and preferably adopts an IGBT switch tube.
In step S1, when the ratio of the actual bus voltage test value to the input voltage peak value is greater than the first threshold value, the slow start is considered to be successful, the main power circuit is turned on to supply power to the dc bus, and the process skips to step S2; if not, judging that the inverter is abnormal, and stopping the self-checking work; the first threshold value is a preset direct current bus short circuit threshold value.
The I-type three-level inverter is simply referred to as an inverter, and the process of slowing down the bus voltage is preferably realized by outputting gradually-increased direct-current voltage by the programmable direct-current power supply, and the slow-up bus voltage can be directly set on a panel of the programmable direct-current power supply or can be sent by an upper computer to send an operation instruction. The first threshold is preferably 80%, and belongs to a preset critical value of the short circuit of the direct current bus, and the detection and judgment effect accuracy of the critical value is high; in the embodiment, the ratio of the actual bus voltage test value to the input voltage peak value is compared with the first threshold value, and whether the self-checking step is continued or stopped is judged according to the comparison result. Of course, in practical application, the value of the first threshold value can be set and adjusted in a user-defined manner according to actual conditions and requirements.
Step S2 in this example comprises the following substeps:
step S201, judging whether the inversion voltage is smaller than a second voltage threshold value, if so, skipping to step S3; if not, jumping to step S202; the second voltage threshold is a preset inversion voltage threshold;
step S202, after waiting for a first preset time, returning to judge whether the inversion voltage is smaller than a second voltage threshold value, and if so, skipping to step S3; if not, judging that the inversion voltage is abnormal, and stopping self-checking work; the first preset time is preset return judgment waiting time.
Similarly, the second voltage threshold in this example is also a critical value used for determining whether to continue the self-checking step or stop the self-checking according to a comparison result between the actual value and the threshold, and can be set and adjusted in a user-defined manner according to actual conditions and requirements; the second voltage threshold is preferably 50V, and it should be noted that when the inverted voltage is not less than the second voltage threshold, the inverted voltage is not immediately determined to be abnormal, but after waiting for the first preset time, the inverted voltage is determined to be abnormal again, and if the inverted voltage is not less than the second voltage threshold, the self-checking operation is stopped. The first preset time is preferably 20s, and certainly, in actual work, the first preset time can be set and adjusted in a user-defined manner according to actual conditions and requirements.
Step S3 in this example comprises the following substeps:
step S301, applying a PWM driving signal which is gradually increased to a switching tube Q2, detecting whether the inversion voltage is smaller than a third voltage threshold value, and if so, skipping to step S302; if not, judging that the inverter is abnormal, and stopping self-checking work; the third voltage threshold is an inversion voltage threshold which is preset and used for judging the working state of the switching tube;
step S302, applying the PWM driving signals which are gradually increased to the switching tube Q1, detecting whether the inversion voltage is smaller than a third voltage threshold value, and if so, skipping to step S303; if not, judging that the inverter is abnormal, and stopping self-checking work;
step S303, applying a PWM driving signal which is gradually increased to a switching tube Q3, detecting whether the inversion voltage is smaller than a third voltage threshold value, and if so, skipping to step S304; if not, judging that the inverter is abnormal, and stopping self-checking work;
step S304, applying the PWM driving signals which are gradually increased to a switching tube Q4, detecting whether the inversion voltage is smaller than a third voltage threshold value, and if so, skipping to the step S4; if not, the inverter is judged to be abnormal, and the self-checking work is stopped.
Similarly, the third voltage threshold value in this example is also a critical value for determining whether to continue the self-checking step or stop the self-checking according to the comparison result between the actual value and the threshold value, and can be set and adjusted in a user-defined manner according to actual conditions and requirements; the third voltage threshold is preferably consistent with the second voltage threshold, preferably 50V, and it should be noted that the present embodiment sequentially detects the switching tubes through a preset sequence, and optimizes the self-detection process by matching with the detection principle of the following table in the present embodiment.
In step S4 of the present example, it is determined whether an absolute value of a voltage difference between the actual inverter voltage and the voltage setting value is greater than a fourth voltage threshold, if yes, it is further determined whether a duration that the absolute value of the voltage difference is greater than the fourth voltage threshold reaches a second preset time, and if yes, it is determined that the inverter is abnormal, and the self-checking operation is stopped; if not, judging that the inverter is normal, and finishing self-checking; the fourth voltage threshold is a preset voltage threshold in the process of slowly starting the inverter voltage, and the second preset time is a preset abnormal duration threshold in the process of slowly starting the inverter voltage.
Similarly, the fourth voltage threshold value in this example is a critical value for determining whether to continue the self-checking step or stop the self-checking according to the comparison result between the actual value and the set value, and can be set and adjusted in a user-defined manner according to actual conditions and requirements; the voltage set value is a preset voltage slow-start value and is used for representing a voltage value required by the slow-start of the inverter voltage, and the voltage set value can be self-defined and adjusted according to actual conditions and requirements; in the embodiment, the fourth voltage threshold is greater than the second voltage threshold, preferably 80V, because the inverter voltage is controlled to rise from 0 to a preset voltage set value, during the process of the inverter voltage rising, the voltage value of the inverter voltage is monitored in real time to be greater than the voltage value before wave sending, it is worth mentioning that when the absolute value of the voltage difference is greater than the fourth voltage threshold, the inverter voltage is not determined to be abnormal immediately, but whether the duration time that the absolute value of the voltage difference is greater than the fourth voltage threshold reaches the second preset time is further determined, and if the duration time reaches the second preset time, the inverter voltage is determined to be abnormal, and the self-checking operation is stopped. The second preset time is preferably 5ms, and certainly, in actual work, the second preset time can be set and adjusted in a user-defined manner according to actual conditions and requirements.
It should be noted that the self-checking method and the steps thereof described in this embodiment are sequential and linked, and can detect most abnormal situations in a targeted manner without further damage, which is not a solution that can be easily derived by those skilled in the art, and the specific self-checking principle and effect are shown in the following table:
as can be seen from this table, in this example, the short circuit of one switching tube can be effectively detected in step S3, the short circuit of two switching tubes can be detected in most cases in steps S2 and S3, and the short circuit of three switching tubes can be detected in steps S1 and S2; the short circuit condition of four switching tubes can be detected through the step S1; various open circuit conditions of the switching tube can be detected in step S4.
Preferably, in step S3 of this embodiment, when the PWM driving signal is applied to the switching tube in a stepwise increasing manner, if the dc voltage is generated on the capacitor C3, it is determined that the switching tube in the same bus circuit as the switching tube to which the PWM driving signal is currently applied is short-circuited. A PWM driving signal is applied to the switching tube Q2, and if the capacitor C3 generates direct-current voltage, the short circuit of the switching tube Q1 is judged; applying a PWM (pulse-width modulation) driving signal to the switching tube Q1, and if a direct-current voltage is generated in the capacitor C3, judging that the switching tube Q2 is short-circuited; the switch tube Q1 and the switch tube Q2 are two switch tubes of a positive bus circuit. Applying a PWM (pulse-width modulation) driving signal to the switching tube Q3, and if the capacitor C3 generates direct-current voltage, judging that the switching tube Q4 is short-circuited; and applying a PWM (pulse-width modulation) driving signal to the switching tube Q4, if a direct-current voltage is generated in the capacitor C3, judging that the switching tube Q3 is in a short circuit, wherein the switching tube Q3 and the switching tube Q4 are two switching tubes of a negative bus loop.
In step S4, if the dc voltage on the capacitor C3 is abnormally low when the inverter voltage is controlled to increase from 0 to the preset voltage setting value, it is determined that there is an open circuit of the switching tube; if there is no voltage on the capacitor C3, at least two switch tubes are judged to be open-circuited.
The present embodiment further provides a self-test system for an I-type three-level inverter, which adopts the self-test method for an I-type three-level inverter, and includes: the direct current bus voltage detection circuit, the inversion voltage detection circuit, the switch tube detection circuit, the threshold comparison circuit and the PWM signal generation circuit are respectively connected with the threshold comparison circuit, and the switch tube detection circuit is connected with the PWM signal generation circuit.
The direct-current bus voltage detection circuit is used for detecting the direct-current bus voltage, delaying the bus voltage, and detecting whether the direct-current bus is short-circuited or not according to the ratio of the actual bus voltage test value to the input voltage peak value; the inverter voltage detection circuit is used for realizing inverter voltage detection and comprises the steps of detecting whether the inverter voltage of the I-type three-level inverter is normal or not before applying a PWM driving signal; the switching tube detection circuit is used for realizing switching tube detection, and sequentially applying PWM driving signals to the switching tubes of the I-type three-level inverter through being connected with the PWM signal generation circuit so as to detect whether the switching tubes are normal or not; the threshold comparison circuit is used for setting and modifying various thresholds so as to realize comparison and judgment with the thresholds; the PWM signal generating circuit is used for generating and controlling a PWM driving signal.
In summary, in this embodiment, through the processes of dc bus voltage short circuit detection, pre-wave-generation inversion voltage detection, sequential detection of the switching tubes, and inversion voltage slow start process detection, etc., the abnormal switching condition of the I-type three-level inverter can be detected timely, effectively, and comprehensively, so as to effectively avoid further overcurrent or overvoltage damage of the I-type three-level inverter, thereby making the product stable and reliable, and having a long service life.
The foregoing is a further detailed description of the invention in connection with specific preferred embodiments and it is not intended to limit the invention to the specific embodiments described. For those skilled in the art to which the invention pertains, several simple deductions or substitutions can be made without departing from the spirit of the invention, and all shall be considered as belonging to the protection scope of the invention.
Claims (9)
1. A self-checking method of an I-type three-level inverter is characterized by comprising the following steps:
step S1, slowly starting the bus voltage, detecting whether the direct-current bus is short-circuited or not through the ratio of the actual bus voltage test value to the input voltage peak value, and jumping to the step S2 until the slow start is successful;
s2, detecting whether the inversion voltage of the I-type three-level inverter is normal or not before applying the PWM driving signal;
s3, sequentially applying PWM driving signals to the switching tubes of the I-type three-level inverter, sequentially detecting the switching tubes through a preset sequence, detecting whether the switching tubes are normal or not, if so, skipping to the step S4, and otherwise, stopping self-checking;
s4, controlling the inversion voltage to rise from 0 to a preset voltage set value, monitoring the inversion voltage in real time in the process of rising of the inversion voltage, judging the absolute value of the voltage difference between the actual inversion voltage and the voltage set value, and further detecting whether the inversion voltage is normal or not;
the step S2 includes the following substeps:
step S201, judging whether the inversion voltage is smaller than a second voltage threshold value, if so, skipping to step S3; if not, jumping to step S202; the second voltage threshold is a preset inversion voltage threshold;
step S202, after waiting for a first preset time, returning to judge whether the inversion voltage is smaller than a second voltage threshold value, and if so, skipping to step S3; if not, judging that the inversion voltage is abnormal, and stopping self-checking work; the first preset time is preset return judgment waiting time.
2. The self-test method of the I-type three-level inverter according to claim 1, wherein the I-type three-level inverter comprises a capacitor C1, a capacitor C2, a diode D1, a diode D2, a switch tube Q1, a switch tube Q2, a switch tube Q3, a switch tube Q4, an inductor L1 and a capacitor C3, a positive bus is connected to one end of the capacitor C1 and one end of the switch tube Q1 respectively, the other end of the switch tube Q1 is connected to a cathode of the diode D1 and one end of the switch tube Q2 respectively, the other end of the capacitor C1, an anode of the diode D1, a cathode of the diode D2 and one end of the capacitor C2 are connected to a neutral line, the other end of the switch tube Q2 is connected to one end of the switch tube Q3 and one end of the inductor L1 respectively, an anode of the diode D2 and the other end of the switch tube Q3 are connected to one end of the switch tube Q4, the other end of the capacitor C2 and the other end of the switch tube Q4 are connected to a negative bus, the other end of the inductor L1 and one end of the capacitor C3 are connected to an inverting voltage, and an inverting end of the inverting terminal of the capacitor C3 are connected to an inverting terminal of the capacitor N3.
3. The self-checking method of the I-type three-level inverter according to claim 1 or 2, characterized in that in the step S1, when the ratio of the actual bus voltage test value to the input voltage peak value is greater than a first threshold value, the slow start is considered to be successful, the main power circuit is started to supply power to the direct-current bus, and the step S2 is skipped; if not, judging that the inverter is abnormal, and stopping the self-checking work; the first threshold value is a preset direct current bus short circuit threshold value.
4. The self-test method of a type I three-level inverter according to claim 2, characterized in that said step S3 comprises the following sub-steps:
step S301, applying a PWM driving signal which is gradually increased to a switching tube Q2, detecting whether the inversion voltage is smaller than a third voltage threshold value, and if so, skipping to step S302; if not, judging that the inverter is abnormal, and stopping self-checking work; the third voltage threshold is an inversion voltage threshold which is preset and used for judging the working state of the switching tube;
step S302, gradually increasing PWM driving signals are applied to a switching tube Q1, whether the inversion voltage is smaller than a third voltage threshold value or not is detected, and if yes, the step S303 is skipped; if not, judging that the inverter is abnormal, and stopping self-checking work;
step S303, applying the PWM driving signals which are gradually increased to the switching tube Q3, detecting whether the inversion voltage is smaller than a third voltage threshold value, and if so, skipping to step S304; if not, judging that the inverter is abnormal, and stopping self-checking work;
step S304, applying the PWM driving signals which are gradually increased to a switching tube Q4, detecting whether the inversion voltage is smaller than a third voltage threshold value, and if so, skipping to the step S4; if not, the inverter is judged to be abnormal, and the self-checking work is stopped.
5. The self-checking method of the I-type three-level inverter according to claim 1 or 2, wherein in the step S4, it is determined whether an absolute value of a voltage difference between the actual inverter voltage and the voltage setting value is greater than a fourth voltage threshold, if so, it is further determined whether a duration of the voltage difference absolute value being greater than the fourth voltage threshold reaches a second preset time, if so, it is determined that the inverter is abnormal, and the self-checking operation is stopped; if not, judging that the inverter is normal, and finishing self-checking; the fourth voltage threshold is a preset voltage threshold in the process of slowly starting the inverter voltage, and the second preset time is a preset abnormal duration threshold in the process of slowly starting the inverter voltage.
6. The self-test method of an I-type three-level inverter according to claim 4, wherein in the step S3, when the PWM driving signal is applied in a stepwise increasing manner to the switch tube, if a DC voltage is generated on the capacitor C3, it is determined that the switch tube in the same bus circuit as the switch tube to which the PWM driving signal is currently applied is short-circuited.
7. The self-test method of an I-type three-level inverter according to claim 4, wherein in the step S4, when the inverter voltage is controlled to rise from 0 to a preset voltage set value, if there is an abnormal slow-starting DC voltage on the capacitor C3, it is determined that there is an open-circuited switching tube.
8. The self-test method of an I-type three-level inverter according to claim 4, wherein in the step S4, when the inversion voltage is controlled to rise from 0 to a preset voltage set value, if no voltage exists on the capacitor C3, it is determined that at least two switching tubes are open.
9. A self-test system of a type I three-level inverter, characterized in that the self-test method of a type I three-level inverter according to any one of claims 1 to 8 is adopted, and comprises: the direct current bus voltage detection circuit, the inversion voltage detection circuit, the switch tube detection circuit, the threshold comparison circuit and the PWM signal generation circuit are respectively connected with the threshold comparison circuit, and the switch tube detection circuit is connected with the PWM signal generation circuit.
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| CN113765336B (en) * | 2021-11-10 | 2022-02-22 | 青岛鼎信通讯股份有限公司 | Self-checking method for I-type three-level inverter switching tube applied to SVG |
| CN113765337B (en) * | 2021-11-10 | 2022-02-22 | 青岛鼎信通讯股份有限公司 | Self-checking method for T-type three-level inverter switching tube applied to SVG |
| CN116577590B (en) * | 2023-06-13 | 2024-06-25 | 深圳正泰电源系统有限公司 | Inverter self-checking method |
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