CN113129994B - Storage system performance adjusting method and storage system - Google Patents
Storage system performance adjusting method and storage system Download PDFInfo
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- CN113129994B CN113129994B CN202110335356.0A CN202110335356A CN113129994B CN 113129994 B CN113129994 B CN 113129994B CN 202110335356 A CN202110335356 A CN 202110335356A CN 113129994 B CN113129994 B CN 113129994B
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- 238000003860 storage Methods 0.000 title claims abstract description 29
- 238000000034 method Methods 0.000 title claims abstract description 24
- 238000002474 experimental method Methods 0.000 claims description 6
- 238000013524 data verification Methods 0.000 claims description 5
- 238000012544 monitoring process Methods 0.000 claims description 5
- GUTLYIVDDKVIGB-OUBTZVSYSA-N Cobalt-60 Chemical compound [60Co] GUTLYIVDDKVIGB-OUBTZVSYSA-N 0.000 claims description 4
- 238000004364 calculation method Methods 0.000 claims description 3
- 238000005457 optimization Methods 0.000 claims description 3
- 230000000694 effects Effects 0.000 abstract description 7
- 230000001678 irradiating effect Effects 0.000 abstract description 2
- 238000013500 data storage Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000012937 correction Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
Classifications
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/38—Response verification devices
- G11C29/42—Response verification devices using error correcting codes [ECC] or parity check
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0614—Improving the reliability of storage systems
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Human Computer Interaction (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Read Only Memory (AREA)
Abstract
The invention provides a storage system performance adjusting method and a storage system; the NAND FLASH memory can be used as a sensor for irradiating total dose by utilizing the characteristic that the NAND FLASH memory is easily influenced by the total dose effect in an irradiation environment, and the reliability of the whole system in the irradiation environment can be improved by adjusting the working mode of the NAND FLASH memory and the system ECC mode.
Description
Technical Field
The invention belongs to the technical field of storage, relates to a storage system performance adjusting method and a storage system, and particularly relates to a storage system performance adjusting method and a storage system based on a NAND FLASH storage.
Background
The NAND type Flash memory is a nonvolatile memory, and has the advantages of high memory density, low production cost, high programming and erasing speeds and the like, so that the NAND type Flash memory is widely applied to the aerospace field.
NAND FLASH memory is an important component of satellite electronic systems as a data storage carrier, and with the recent downsizing of process, other chips in the data storage system, such as a memory controller, a dynamic memory and the like, are less and less affected by total dose effect in an irradiation environment, while NAND FLASH devices are easily affected by total dose effect, so that device data errors and even functional failures are caused.
Therefore, aiming at the characteristic that the NAND FLASH memory is sensitive to the total dose effect, the reliability of the whole system in the irradiation environment is improved by adjusting the NAND FLASH working mode and performance.
Disclosure of Invention
The technical problems to be solved by the invention are as follows: the invention provides a storage system performance adjusting method and a storage system, which utilize the feedback relation between the threshold voltage of a NAND FLASH storage and the total irradiation dose to adjust NAND FLASH the working mode of the storage and the ECC mode of the storage system, thereby improving the overall reliability of the storage system.
In order to solve the technical problems, the invention adopts the following technical scheme:
the invention provides a storage system performance adjusting method, which is characterized by comprising the following steps of:
acquiring a corresponding relation lookup table of NAND FLASH memory threshold voltage and total dose;
timing monitoring a current threshold voltage of the NAND FLASH memory;
the memory controller adjusts the NAND FLASH memory operating mode and system operating mode according to the current threshold voltage.
Preferably, the acquiring NAND FLASH the correspondence lookup table of the threshold voltage of the memory and the total dose includes:
writing data in the NAND FLASH memory, and performing a total dose irradiation experiment;
gradually increasing the irradiation dose to obtain the threshold voltage of the NAND FLASH memory of the current total dose;
and sorting the corresponding relation between the NAND FLASH memory threshold voltage and the total dose to obtain the corresponding relation lookup table.
Preferably, the total dose irradiation experiments include cobalt 60 gamma irradiation of the NAND FLASH memory.
Preferably, the timing monitoring the current threshold voltage of the NAND FLASH memory comprises:
the memory data of NAND FLASH is read in a read retry mode at fixed time to obtain the current threshold voltage.
Preferably, the memory controller adjusting the operation mode and the system operation mode of the NAND FLASH memory according to the current threshold voltage includes:
calculating a threshold voltage offset DeltaV according to the current threshold voltage th ；
Setting a data value N, and comparing the data value N with the threshold voltage offset DeltaV th Is a size relationship of (2);
and adjusting the working mode of the NAND FLASH memory and the working mode of the system according to the obtained size relation.
Preferably, the threshold voltage offset DeltaV is calculated according to the current threshold voltage th The calculation mode of (a) is as follows:
offset DeltaV th =initial threshold voltage value-current threshold voltage value
Preferably, the initial threshold voltage is a preset voltage range set in a device specification.
Preferably, the data value N is a threshold value for which an offset threshold voltage cannot be set by changing the read reference voltage optimization.
Preferably, the adjusting the working mode of the NAND FLASH memory and the system working mode according to the obtained size relationship includes:
at the DeltaV th When the voltage is less than N, changing the read reference voltage of the NAND FLASH memory to enable the read reference voltage to be equal to the current threshold voltage;
at the DeltaV th And when the data is more than N, changing the read reference voltage of the NAND FLASH memory to enable the read reference voltage to be equal to the current threshold voltage, changing the working mode of the NAND FLASH memory into an SLC mode, and simultaneously enabling the data verification mode of the memory system to adopt a BCH or LDPC algorithm.
The invention provides a memory system comprising a data interface, a controller, a memory controller, a data verification module, a power module, a clock circuit, a DRAM memory and a NAND FLASH memory, wherein the memory system is used for realizing the memory system performance adjusting method according to any one of claims 1-9.
The invention has the beneficial effects that: the invention utilizes the characteristic that the NAND FLASH memory is easily affected by the effect of the total irradiation dose in the irradiation environment, and the NAND FLASH memory can be used as a sensor of the total irradiation dose, and the reliability of the whole system in the irradiation environment can be improved by adjusting the working mode of the NAND FLASH memory and the ECC mode of the system. .
Drawings
The following details the specific construction of the present invention with reference to the accompanying drawings
FIG. 1 is a flow chart of a method for adjusting performance of a storage system according to the present invention;
FIG. 2 is a flow chart of the present invention for adjusting NAND FLASH the operating mode of the memory and the system operating mode;
FIG. 3 is a block diagram of a memory system according to the present invention.
Detailed Description
Embodiments of the present invention are described in detail below, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to like or similar elements or elements having like or similar functions throughout. The embodiments described below by referring to the drawings are illustrative and intended to explain the present invention and should not be construed as limiting the invention.
Referring to fig. 1, the present invention provides a method for adjusting performance of a storage system, where the method includes:
step S10, obtaining a lookup table of the corresponding relation between the threshold voltage of the NAND FLASH memory and the total dose through experiments and tests.
The specific scheme for establishing the lookup table is as follows: total dose irradiation experiments were performed on NAND FLASH memory, with data being written to NAND FLASH memory prior to irradiation, and then cobalt 60 gamma irradiation was performed on NAND FLASH memory. With the increase of the irradiation dose of cobalt 60 gamma rays, the read threshold voltage V is changed th Obtaining the threshold voltage V of the NAND FLASH memory of the current dose th Distribution, and finally sorting data to form total dose and threshold voltage V th Look-up table of correspondence.
Step S20, monitoring the current threshold voltage of the NAND FLASH memory at regular time.
And (5) reading NAND FLASH stored data in a read retry mode at fixed time, checking whether the read data is correct, and obtaining a voltage range when the read data is correct, namely the current threshold voltage range.
In step S30, the memory controller adjusts the working mode and the system working mode of the NAND FLASH memory according to the current threshold voltage.
First, it is necessary to calculate the threshold voltage shift amount Δv from the current threshold voltage obtained in step S20 th The method comprises the steps of carrying out a first treatment on the surface of the Finally according to the offset DeltaV of the threshold voltage th Adjust NAND FLASH the operating mode and system operating mode, wherein the threshold voltage offset DeltaV th The calculation mode of (a) is as follows:
offset DeltaV th =initial threshold voltage value-current threshold voltage value, initial threshold voltage is a preset voltage range set in the device specification.
Next, a data value N is set, which is a threshold value at which the offset threshold voltage cannot be set by changing the read reference voltage optimization. Comparing the data value N with the threshold voltage offset DeltaV th Is a size relationship of (a).
Finally, according to the obtained data value N and the threshold voltage offset DeltaV th Adjusting the working mode of the NAND FLASH memory and the working mode of the system; specifically:
at the DeltaV th And when the voltage is less than N, changing the reference voltage of the NAND FLASH memory to enable the reference voltage to be equal to the current threshold voltage.
At the DeltaV th When the threshold voltage is more than N, the reference voltage of the NAND FLASH memory is changed to enable the reference voltage to be equal to the current threshold voltage, meanwhile, the working mode of the NAND FLASH memory is changed to be an SLC mode, and the acceptable threshold voltage deviation is larger after the working mode of the NAND FLASH memory is changed from the TLC mode to the SLC mode by utilizing the characteristic that the threshold voltage distribution of the SLC mode is larger than that of TLC, so that the reliability of the NAND FLASH memory is improved. While the memory system data check (ECC) mode employs an ECC algorithm with greater error correction capability,such as BCH or LDPC algorithms, can improve the reliability of the overall system.
The invention also provides a storage system, as shown in fig. 3, which is a structural block diagram of the storage system, and comprises a data interface, a controller, a memory controller, a data verification module, a power module, a clock circuit, a DRAM memory and a NAND FLASH memory, wherein the storage system is used for realizing the performance adjustment method of the storage system.
Devices other than NAND FLASH memory are not susceptible to the effects of total dose under irradiation. Under the action of the total dose, the floating gate of the memory cell in a programmed state can generate charge loss, thereby causing negative drift of the threshold voltage of the memory cell, and obtaining wrong data during reading. By establishing a threshold voltage V th Lookup table corresponding to total dose according to current threshold voltage V of NAND FLASH memory th The total dose accumulated in the current irradiation environment can be obtained. The NAND FLASH memory can thus be used as a total dose sensor for the entire memory system.
In summary, the invention utilizes the characteristic that the NAND FLASH memory is easily affected by the total dose effect in the irradiation environment, and the NAND FLASH memory can be used as a sensor for irradiating the total dose, and the reliability of the whole system in the irradiation environment can be improved by adjusting the working mode of the NAND FLASH memory and the ECC mode of the system.
The foregoing description is only illustrative of the present invention and is not intended to limit the scope of the invention, and all equivalent structures or equivalent processes or direct or indirect application in other related technical fields are included in the scope of the present invention.
Claims (7)
1. A storage system performance adjustment method, the storage system performance adjustment method comprising:
acquiring a corresponding relation lookup table of NAND FLASH memory threshold voltage and total dose;
timing monitoring a current threshold voltage of the NAND FLASH memory;
the memory controller adjusts the working mode of the NAND FLASH memory and the system working mode according to the current threshold voltage;
the memory controller adjusting the NAND FLASH memory operating mode and the system operating mode according to the current threshold voltage comprises: calculating a threshold voltage offset DeltaV according to the current threshold voltage th The method comprises the steps of carrying out a first treatment on the surface of the Setting a data value N, and comparing the data value N with the threshold voltage offset DeltaV th Is a size relationship of (2); at the DeltaV th When the voltage is less than N, changing the read reference voltage of the NAND FLASH memory to enable the read reference voltage to be equal to the current threshold voltage; at the DeltaV th When the data is more than N, changing the read reference voltage of the NAND FLASH memory to enable the read reference voltage to be equal to the current threshold voltage, changing the working mode of the NAND FLASH memory into an SLC mode, and simultaneously enabling the data verification mode of the memory system to adopt a BCH or LDPC algorithm; the data value N is a threshold value for which the offset threshold voltage cannot be set by changing the read reference voltage optimization.
2. The method of claim 1, wherein the retrieving NAND FLASH memory threshold voltage versus total dose look-up table comprises:
writing data in the NAND FLASH memory, and performing a total dose irradiation experiment;
gradually increasing the dose, and acquiring the threshold voltage of the NAND FLASH memory of the current total dose;
and sorting the corresponding relation between the NAND FLASH memory threshold voltage and the total dose to obtain the corresponding relation lookup table.
3. The storage system performance tuning method of claim 2, wherein the total dose irradiation experiments comprise cobalt 60 gamma irradiation of the NAND FLASH memory.
4. The storage system performance tuning method of claim 1, wherein the timing monitoring the current threshold voltage of the NAND FLASH memory comprises:
the memory data of NAND FLASH is read in a read retry mode at fixed time to obtain the current threshold voltage.
5. The memory system performance tuning method of claim 1, wherein the calculating a threshold voltage offset Δv from the current threshold voltage th The calculation mode of (a) is as follows:
offset DeltaV th =initial threshold voltage value-current threshold voltage value.
6. The memory system performance tuning method of claim 1, wherein the initial threshold voltage is a preset voltage range set in a device specification.
7. A memory system comprising a data interface, a controller, a memory controller, a data verification module, a power module, a clock circuit, a DRAM memory and a NAND FLASH memory, the memory system being configured to implement the memory system performance tuning method of any of claims 1-6.
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| EP3043350A2 (en) * | 2015-01-08 | 2016-07-13 | Delphi Technologies, Inc. | Memory device with data validity check |
| CN108388721A (en) * | 2018-02-08 | 2018-08-10 | 中国科学院上海微系统与信息技术研究所 | The more bias point current model modeling methods of SOI NMOS integral dose radiations |
| CN112214952A (en) * | 2020-10-20 | 2021-01-12 | 中国科学院新疆理化技术研究所 | Circuit simulation method for coupling total dose effect and process fluctuation |
| CN112289362A (en) * | 2020-10-27 | 2021-01-29 | 深圳电器公司 | CCI noise pre-judgment equalization method of Nand memory and related equipment |
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| US7817469B2 (en) * | 2004-07-26 | 2010-10-19 | Sandisk Il Ltd. | Drift compensation in a flash memory |
| US9870834B2 (en) * | 2015-10-19 | 2018-01-16 | California Institute Of Technology | Error characterization and mitigation for 16nm MLC NAND flash memory under total ionizing dose effect |
| US10691372B1 (en) * | 2018-12-07 | 2020-06-23 | Western Digital Technologies, Inc. | Transistor threshold voltage maintenance in 3D memory |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP3043350A2 (en) * | 2015-01-08 | 2016-07-13 | Delphi Technologies, Inc. | Memory device with data validity check |
| CN108388721A (en) * | 2018-02-08 | 2018-08-10 | 中国科学院上海微系统与信息技术研究所 | The more bias point current model modeling methods of SOI NMOS integral dose radiations |
| CN112214952A (en) * | 2020-10-20 | 2021-01-12 | 中国科学院新疆理化技术研究所 | Circuit simulation method for coupling total dose effect and process fluctuation |
| CN112289362A (en) * | 2020-10-27 | 2021-01-29 | 深圳电器公司 | CCI noise pre-judgment equalization method of Nand memory and related equipment |
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