CN113129966A

CN113129966A - Hamming distance calculation method, chip and equipment

Info

Publication number: CN113129966A
Application number: CN201911415029.5A
Authority: CN
Inventors: 李祎; 缪向水; 程龙; 李健聪; 谭海波; 石晓钟; 黄克骥
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Technologies Co Ltd
Priority date: 2019-12-31
Filing date: 2019-12-31
Publication date: 2021-07-16
Also published as: WO2021135839A9; WO2021135839A1

Abstract

The embodiment of the application provides a method for calculating a Hamming distance of a character string, a Hamming distance calculation chip and a device, wherein the chip comprises n operation units, each operation unit comprises two memristors with negative electrodes connected, the resistors of the two memristors are all at a first resistance value, and the method comprises the following steps: acquiring a first character string and a second character string; for any character pair, inputting preset potentials corresponding to two characters in the character pair into anodes of two memristors of an operation unit corresponding to the character pair respectively, wherein the difference of the preset potentials for different characters is more than 2 times of threshold voltage for enabling the memristors to change from a first resistance value; applying a read voltage to each memristor in the n arithmetic units, the read voltage causing a current to be generated in each memristor without changing a resistance value of each memristor; determining a Hamming distance of a first string from a second string based on a current in each memristor in the n arithmetic units. The method saves power consumption and time delay.

Description

Hamming distance calculation method, chip and equipment

Technical Field

The application relates to the technical field of Hamming distance calculation, in particular to a Hamming distance calculation method, a chip and equipment.

Background

In the information theory, the hamming distance between two character strings with equal length is the number of different characters at the corresponding positions of the two character strings. Conventional hamming distance calculation methods include methods by software or hardware calculation. When the Hamming distance of the two character strings is calculated through a program, the Hamming distance of the two character strings is obtained by sequentially carrying out XOR calculation on each character of the two character strings and adding results of the XOR calculation. In the case where the number of bits of a character string is very large, in performing the above calculation, it is necessary to perform a plurality of loop calculations, and to perform transmission of a large amount of data between the memory and the processor. The hardware circuits currently used to calculate hamming distance include, for example, exclusive OR (XOR) gates based on Complementary Metal Oxide Semiconductor (CMOS). The circuit comprises a plurality of CMOS, wherein each CMOS comprises an N-type Metal Oxide Semiconductor (NMOS) transistor and a P-type Metal Oxide Semiconductor (PMOS) transistor, and the circuit is complex in structure, large in power consumption and long in calculation time.

Therefore, a more efficient hamming distance calculation scheme is needed.

Disclosure of Invention

Embodiments of the present application are directed to providing a more efficient hamming distance circuit and a hamming distance calculating method based on the same, so as to solve the deficiencies in the prior art.

In order to achieve the above object, in one aspect, the present application provides a method for calculating a hamming distance of a character string, which is applied to a hamming distance calculation chip, where the hamming distance calculation chip includes n operation units, each operation unit includes two memristors with connected cathodes, the resistances of the two memristors are both at a first resistance value, where n is greater than or equal to 1, and the method includes: acquiring a first character string and a second character string, wherein two characters on the same position of the first character string and the second character string form a character pair, the number of the character pairs is equal to n, and one character pair corresponds to one arithmetic unit; for any character pair, respectively inputting preset potentials corresponding to two characters in the character pair into anodes of two memristors of an operation unit corresponding to the character pair, wherein when the two characters are different, the difference value of the preset potentials corresponding to the two characters is more than 2 times of threshold voltage for converting the memristor from the first resistance value to the second resistance value; applying a read voltage to each memristor in the n arithmetic units, the read voltage causing a current to be generated in each memristor without changing a resistance value of each memristor; determining a Hamming distance of the first string from the second string based on the current in each memristor in the n operational cells.

In the method, two memristors are used for forming a one-bit Hamming distance operation core, the number of required devices is small, the circuit structure is simple, voltage signals are used as input, the operation is realized by using the resistance state change of the memristors, and the operation result is stored through the resistance states of the memristors. And moreover, the multi-bit data are simultaneously operated in parallel by utilizing a plurality of operation cores, so that the information processing speed can be greatly increased, extra data transmission and storage are not needed, and the calculation power consumption and the calculation time are saved.

In one embodiment, the applying a read voltage to each memristor in the n operational cells includes controlling each memristor in the n operational cells in parallel to apply a read voltage to each memristor.

In one embodiment, the cathodes of two memristors in each arithmetic unit are connected through an output line in the arithmetic unit, and each arithmetic unit further comprises a switching element; the controlling of the parallel connection of the memristors in the n arithmetic units comprises: controlling the switching elements of the n arithmetic units to be closed, and connecting the output lines of the plurality of arithmetic units;

the determining a Hamming distance of a first string from a second string based on currents in respective memristors in the n arithmetic units comprises: the current on the output line is read, and a hamming distance between the first string and the second string is determined from the read current.

In this embodiment, a one-bit hamming distance operation core is formed by two memristors and one switching element, and the output lines in the operation unit are disconnected and connected at different stages through the switching element, so that a decimal hamming distance operation result can be directly obtained according to the current on the output lines without an additional accumulation process.

In one embodiment, the first resistance value is a high resistance value, the second resistance value is a low resistance value, and the determining the hamming distance between the first character string and the second character string according to the read current includes:

the hamming distance between the first character string and the second character string is rounded by dividing the read current by a known current, wherein the known current is a current generated in a low-resistance memristor by applying a read voltage to the low-resistance memristor.

In one embodiment, the first resistance value is a low resistance value, the second resistance value is a high resistance value, and the determining the hamming distance between the first character string and the second character string according to the read current includes:

and dividing the read current by a known current to obtain a first value, and subtracting the first value from the total number of the memristors included in the n operation units to obtain a Hamming distance between the first character string and the second character string, wherein the known current is a current generated in a low-resistance memristor by applying a read voltage to the low-resistance memristor.

In one embodiment, the method further comprises: before the first character string and the second character string are acquired, the switching elements of the operation units are controlled to be turned off, so that the output lines of the operation units are turned off.

The application provides a method for calculating a Hamming distance of a character string, which is applied to a Hamming distance calculation chip, wherein the Hamming distance calculation chip comprises two memristors with connected cathodes, the resistors of the two memristors are both at a first resistance value, and the method comprises the following steps: acquiring a first character string and a second character string, wherein two characters on the same position of the first character string and the second character string form a character pair, and the number of the character pairs is equal to n; for any character pair, inputting preset potentials corresponding to two characters in the character pair into anodes of two memristors respectively, wherein when the two characters are different, the difference value of the preset potentials corresponding to the two characters is more than 2 times of threshold voltage for converting the memristor from the first resistance value to the second resistance value; applying a read voltage to each memristor, the read voltage causing no change in the resistance of each memristor and a current to be generated in each memristor; the identity of the character pair is determined based on the current in each memristor, and the hamming distance between the first character string and the second character string is determined based on the identity of each character pair.

The application also provides a Hamming distance calculation chip, which comprises a control unit and n operation units, wherein each operation unit comprises two memristors connected with each other through negative electrodes, n is larger than or equal to 1, and the control unit is used for executing the following operations: after the resistance of each memristor in the n arithmetic units is at a first resistance value, acquiring a first character string and a second character string, wherein two characters on the same position of the first character string and the second character string form a character pair, the number of the character pairs is equal to n, and one character pair corresponds to one arithmetic unit; for any character pair, respectively inputting preset potentials corresponding to two characters in the character pair into anodes of two memristors of an operation unit corresponding to the character pair, wherein when the two characters are not the same, the difference value of the preset potentials corresponding to the two characters is more than 2 times of threshold voltage for converting the memristor from the first resistance value to the second resistance value; applying a read voltage to each memristor in the n arithmetic units, the read voltage causing a current to be generated in each memristor without changing a resistance value of each memristor; determining a Hamming distance of a first string from a second string based on a current in each memristor in the n arithmetic units.

In one embodiment, the control unit for applying a read voltage to each memristor in the n arithmetic units comprises the control unit for controlling each memristor in the n arithmetic units to be connected in parallel to apply a read voltage to each memristor.

In one embodiment, the negative electrodes of the two memristors in each arithmetic unit are connected through an output line in the arithmetic unit, each arithmetic unit further comprises a switching element, the control unit is used for controlling the memristors in the n arithmetic units to be connected in parallel, the control unit is used for controlling the switching elements of the n arithmetic units to be closed, and the output lines of the arithmetic units are connected; the control unit is configured to determine a hamming distance between a first string and a second string based on currents in respective memristors of the n arithmetic units, including: the control unit is used for reading the current on the output line and determining the Hamming distance between the first character string and the second character string according to the read current.

In one embodiment, the control unit is further configured to: before the first character string and the second character string are acquired, the switching elements of the operation units are controlled to be turned off, so that the output lines of the operation units are turned off.

The Hamming distance calculation device comprises a control unit, a storage unit and a Hamming distance calculation chip, wherein the Hamming distance calculation chip comprises n operation units, each operation unit comprises two memristors with connected cathodes, n is larger than or equal to 1, and a program instruction is stored in the storage unit; the control unit is used for executing the following operations according to the program instructions stored in the storage unit: after the resistance of each memristor in the n operation units is at a first resistance value, acquiring a first character string and a second character string, wherein two characters on the same position of the first character string and the second character string form a character pair, the number of the character pairs is equal to n, and one character pair corresponds to one operation unit; for any character pair, respectively inputting preset potentials corresponding to two characters in the character pair into anodes of two memristors of an operation unit corresponding to the character pair, wherein when the two characters are different, the difference value of the preset potentials corresponding to the two characters is more than 2 times of threshold voltage for converting the memristor from the first resistance value to the second resistance value; applying a read voltage to each memristor in the n arithmetic units, the read voltage causing a resistance of each memristor not to be changed and generating a current in each memristor; determining a Hamming distance of a first string from a second string based on a current in each memristor in the n arithmetic units.

In one embodiment, the control unit is configured to apply a read voltage to each memristor in the n arithmetic units according to a program instruction stored in the storage unit, and the control unit is configured to control each memristor in the n arithmetic units to be connected in parallel according to the program instruction stored in the storage unit so as to apply the read voltage to each memristor.

In one embodiment, the cathodes of the two memristors in each arithmetic unit are connected through an output line in the arithmetic unit, each arithmetic unit further comprises a switching element, the control unit is used for controlling the memristors in the n arithmetic units to be connected in parallel according to a program instruction stored in the storage unit, and the control unit is used for controlling the switching elements of the n arithmetic units to be closed according to the program instruction stored in the storage unit so as to connect the output lines of the arithmetic units; the control unit is used for determining the Hamming distance between the first character string and the second character string based on the current in each memristor in the n arithmetic units according to the program instructions stored in the storage unit, and comprises the following steps: the control unit is used for reading the current on the output line according to the program instruction stored in the storage unit and determining the Hamming distance between the first character string and the second character string according to the read current.

In one embodiment, the control unit is further configured to control the switching elements of the respective arithmetic units to be turned off before the first character string and the second character string are acquired according to the program instructions stored in the storage unit, so that the output lines of the respective arithmetic units are turned off from each other.

In one embodiment, the switching element is an NMOS transistor or a PMOS transistor.

In one embodiment, the initial resistance state of each memristor is a high resistance state, wherein the difference between the preset potentials corresponding to different characters is larger than two times of the first threshold value.

In one embodiment, the initial resistance state of each memristor is a low resistance state, wherein the difference between the preset potentials corresponding to different characters is larger than two times of the second threshold value.

Drawings

The embodiments of the present application can be made more clear by describing the embodiments with reference to the attached drawings:

FIG. 1 shows a schematic diagram of a Hamming distance computation system 100 by an embodiment in accordance with the invention;

FIG. 2 illustrates a Hamming distance circuit 15 according to one embodiment of the present invention;

FIG. 3 shows a flow diagram of a method for determining the identity of two characters by the circuit of FIG. 2;

FIG. 4 illustrates a voltage-current relationship diagram of a memristor in accordance with an embodiment of the present disclosure;

FIGS. 5 a-5 d schematically illustrate memristor-based M₁And M₂The calculation process schematic diagram of the difference of the character 1 and the character 2;

FIG. 6 schematically shows the memristor M in this step₁And M₂A connection circuit diagram of (1);

FIG. 7 is a flow chart of another method of determining the identity of two characters by the circuit shown in FIG. 2;

FIGS. 8 a-8 d schematically illustrate memristor-based M₁And M₂The calculation process schematic diagram of the difference of the character 1 and the character 2;

FIG. 9 shows a Hamming distance circuit 15 according to another embodiment of the invention;

FIG. 10 shows source drain current I in NOMS tube_DSAnd gate to source voltage V_GSA schematic diagram of the relationship of (1);

FIG. 11 shows a flow chart of a method for calculating the Hamming distance of two strings by the circuit of FIG. 9;

fig. 12 schematically shows an initialization process for the respective memristors in this step S1102;

fig. 13 schematically shows a parallel computing process by the respective arithmetic units in step S1106;

FIG. 14 shows a process implemented in step S1108 for reading a Hamming distance;

fig. 15 schematically shows a connection circuit diagram of the respective memristors in step S1110;

FIG. 16 is a flow chart of another method for calculating the Hamming distance of two strings by the circuit of FIG. 9;

fig. 17 schematically shows a parallel calculation process by the respective arithmetic units in this step;

FIG. 18 shows a Hamming distance calculation chip 1800 according to the present application;

FIG. 19 illustrates a Hamming distance calculation device 1900 in accordance with the present application.

Detailed Description

The technical solutions in the embodiments of the present application will be described below with reference to the accompanying drawings.

In today's information age, there are many scenarios where the hamming distance between a pair of character strings needs to be calculated. For example, by converting chromosomes into character strings, the similarity between two chromosomes can be determined by calculating the hamming distance between the character strings corresponding to the two chromosomes respectively; in coding, the fault tolerance and error correction capability of a group of codes are often considered, and the fault tolerance and error correction capability of the group of codes can be determined by calculating the Hamming distance of the group of codes; for another example, when the similarity between two pictures is determined, the two pictures may be converted into character strings based on the color, gray scale, and other information of each pixel of the pictures, so that the similarity between the two pictures may be determined by calculating the hamming distance between the character strings corresponding to the two pictures, and so on. The hamming distance calculation scheme based on the memristor according to the embodiment of the invention is applicable to any of the above scenarios.

A memristor, called a memory resistor (memristor), is a resistor with a function of memorizing a resistance value. The memristor is a bipolar device and comprises a positive pole and a negative pole, and the resistance value of the memristor changes along with the change of the voltage applied to the positive pole and the negative pole of the memristor. In a bistable memristor, the memristor has a high resistance value R_HHigh resistance state and low resistance value R_LLow resistance state of (1). If the initial resistance state of the memristor is a high resistance state, when a forward voltage which is smaller than or equal to a first threshold value is applied to the positive electrode and the negative electrode of the memristor, the resistance value of the memristor does not change, when a forward voltage which is larger than the first threshold value is applied to the positive electrode and the negative electrode of the memristor, the resistance value of the memristor can jump to a low resistance state, and after the resistance value jumps to the low resistance state, when a larger forward voltage is continuously applied to the memristor, the resistance value of the memristor does not change. If the initial resistance state of the memristor is a low resistance state, when a negative voltage smaller than a second threshold value is applied to the positive electrode and the negative electrode of the memristor, the resistance value of the memristor does not change, when a negative voltage larger than the second threshold value is applied to the positive electrode and the negative electrode of the memristor, the resistance value of the memristor can jump to a high resistance state, and after the resistance value jumps to the high resistance state, when a larger negative voltage is continuously applied to the memristor, the resistance value of the memristor does not change. When the voltage applied to the anode and the cathode of the memristor is removed, the memristor can keep the resistance value when the voltage of the anode and the cathode is removed, and therefore the function of memorizing the resistance value is achieved.

FIG. 1 shows a schematic diagram of a Hamming distance computation system 100 by an embodiment in accordance with the invention. As shown in FIG. 1, the system 100 includes an input device 11, a control unit 12, a storage unit 13, a voltage conversion unit 14, a HammingA distance circuit 15, a current detection unit 16 and an output device 17. The hamming distance circuit 15 may be, for example, a circuit board or a chip, and includes a plurality of operation units 151, and each operation unit 151 includes two bit lines BL_i1And BL_i2The two bit lines of the ith operation unit are respectively corresponding to the ith bit characters of the two character strings as input ends. The hamming distance circuit 15 also includes output lines and control lines. Inside each arithmetic unit 151, two memristors M are included_i1And M_i2And a switching element T for connecting the next memristor_iWherein the positive pole of each memristor is connected with the corresponding bit line, the negative pole is connected with the output line, the switching element is connected to one side of the operation unit for disconnecting the side from the subsequent circuit, and the control line is connected with the switching element for controlling the switching element. Each of the memristors has two stable resistance states, a low resistance state and a high resistance state, wherein, for example, the resistance value R of the memristor in the high resistance state_HFor example, the resistance value R of the memristor in a low resistance state is in the order of M omega_LFor example in the order of omega. The control unit 12 performs the following calculation process based on the control logic stored in the storage unit 13.

First, for the circuit initialization process, before data input to the system through the input device 11, each memristor needs to be in the same initial resistance state, which may be a low resistance state or a high resistance state. After each memristor is preset to a high resistance state as an initial resistance state, the control unit 12 controls the respective switches by the control lines so that the respective operation units 151 are turned off from each other. Then, a hamming distance calculation process is performed in which the input device 11 receives and transmits two character strings having the same number of bits inputted thereto to the control unit 12. The control unit 12 applies potentials corresponding to corresponding bit characters in the character strings to the bit lines based on the two input character strings, so that when the characters of the ith bit of the two character strings are different, one memristor in the ith operation unit is changed into a low-resistance state, that is, the number of the current low-resistance state memristors in the circuit is the hamming distance. This is followed by a hamming distance reading process in which the control unit 12 controls the respective switches by control lines so that the output lines of the respective arithmetic units 151 are connected to each other, and by applying the same reading voltage across the respective memristors, by which it is equivalent to connecting the respective memristors in parallel, so that the current in the output lines, which is the sum of the currents of the respective memristors, can be detected by the current detection circuit 16 and transmitted to the control unit 12. Since, as described above, the memristor has a high resistance state that differs from a low resistance state by at least 10^-3Therefore, compared with the current of the low-resistance-state memristor in the circuit, the current of the high-resistance-state memristor in the circuit can be approximately zero, and the current of the output line can be approximately the sum of the currents of the low-resistance-state memristors in the circuit. Thus, the control unit 12 can obtain the hamming distance of the two character strings based on the number of low resistance state memristors in the circuit obtained by dividing the current in the output line by the current of the low resistance state memristor, and transmit the hamming distance to the output device 17 to output the hamming distance, such as a display or the like.

It is to be understood that the above description with reference to fig. 1 is intended to be illustrative only and not restrictive. For example, only one arithmetic unit may be included in the hamming distance circuit 15, and in this case, the control line and the switch may not be provided. In addition, the system 100 may be a stand-alone device, or may be integrated into other computing devices (e.g., a computer, a server, etc.), which is not limited thereto. Wherein, when integrated into a computer for example, the input device 11 may be an input device of the computer, such as a keyboard, etc., and the control unit 12 may be a processor of the computer.

The hamming distance calculation scheme based on memristors described above will be described in detail below.

Fig. 2 shows a hamming distance circuit 15 according to one embodiment of the invention. As shown in FIG. 2, two memristors M are included in the electrical circuit 15₁And M₂That is, only one arithmetic unit in fig. 1 is included in this circuit 15. Similar to the description with reference to FIG. 1, memristor M₁Positive electrode of (in the figure)Middle memory resistor M₁Shown as "+" at the upper end) of the bit line BL₁Connecting, memory resistor M₂Positive electrode of (2) and bit line BL₂Is connected, and a memristor M₁And M₂Negative pole (with memristor M in the figure)₁The lower end of (b) "-" is shown) are all connected to the output lines of the circuit 15, and in this embodiment, no control line may be provided in the circuit 15. Wherein the memristor M₁And M₂Are both bistable devices that have two stable resistance states: a low resistance state and a high resistance state. In particular, when greater than a threshold V is applied to the memristor_t1The memristor can be changed to a low resistance state when a forward voltage is applied, and a voltage larger than a threshold value V is applied to the memristor_t2When the negative voltage is applied, the memristor can change resistance to a high resistance state, wherein V_t1And V_t2Are all positive numbers. In the case of positive voltage, the potential of the positive electrode of the memristor is higher than that of the negative electrode, namely, the voltage of the positive electrode relative to the negative electrode is a positive value, and in the case of negative voltage, the potential of the negative electrode of the memristor is higher than that of the positive electrode, namely, the voltage of the positive electrode relative to the negative electrode is a negative value.

FIG. 3 shows a flow diagram of one method of determining the identity of two characters by the circuit of FIG. 2. The method is performed by the control unit 12 in the system 100 shown in fig. 1, and as shown in fig. 3, the method comprises the following steps.

Step S302, applying 0V potential to output line, and applying BL₁And BL₂Are all applied with-V₂Potential of volts, wherein V₂＞V_t2。

This step is a preparatory step prior to hamming distance calculation, by which the memristor M is addressed₁And M₂Are initialized to a high impedance state for subsequent calculations. It will be appreciated that in this step 0V is applied to the output lines, applying BL₁And BL₂All apply-V₂The potential of the volts is only an exemplary embodiment, and the present application is not limited thereto, and in practice, only the output line and the BL₁ (BL₂) Satisfies a voltage of more than-V_t2Can recall the resistor M₁(M₂) The initialization is to be a high resistance state.

Referring to fig. 1, the output line may be grounded, i.e., a 0V potential may be applied, by the control unit 12, and the voltage converting unit 14 may be instructed by the control unit 12 to apply-V to each bit line₂A potential of volts, thereby applying greater than V to each memristor_t2So that the memristor M₁And M₂Are all in a high resistance state. FIG. 4 shows a voltage-current relationship diagram for a memristor in accordance with an embodiment of the present invention. The left quadrant in fig. 4 shows one possible current variation process of the memristor in this step. Suppose memristor M₁In the application of-V₂Before the potential of the volt is in a low resistance state R_Lthen-V is just applied₂At a voltage potential, memristor M₁Has a current value of I₁＝V₂/R_LI.e. as marked in the upper left line₁As shown. Since the memristor M is at this moment₁Is applied with more than V_t2Negative voltage of (1), memristor M₁Very fast resistance change to high resistance state R_HThus, memristor M₁Current value of (d) is I'₁＝V₂/R_HI.e. l 'as marked in the left lower straight line'₁As shown. Since R is as described above_LAnd R_HThe phase difference is large, for example 6 orders of magnitude, so that the memristor M₁From a larger value of I₁Change to in comparison with I₁Very little l'₁。

Make memristor M₁And M₂After all the signals are converted into the high-resistance state, the initialization of the circuit 15 is completed, and the application of the 0V potential to the output line and the BL can be stopped₁And BL₂Are all applied with-V₂Potential of volts, i.e. stopping the memristor M₁And M₂A negative voltage is applied, and it is understood that the resistance of each memristor remains in a high-resistance state after the application of the negative voltage is stopped.

Step S304, two different and identical characters to be determined, namely character 1 and character 2, are obtained. The two characters may be any form of character. For example, the character may be a character in a binary number (i.e., 0 or 1), or the two characters may be characters in a decimal number, may be english alphabets, and the like, and for convenience of description, the following description will mainly use binary characters as an example.

As described above, the control unit 12 can acquire two characters to be determined to be different from each other from the input device 11. The input device 11 may have various forms in different scenarios, for example, in a general scenario it may be a keyboard, a mouse, etc., in a scenario where picture similarity is determined it may comprise a camera, an analog-to-digital conversion circuit, etc., in a scenario where audio similarity is determined it may comprise a microphone, an analog-to-digital conversion circuit, etc. The input device, after acquiring the two sets of equal length strings that are digitized, may transmit the two strings to the control unit 12. The control unit 12 may sequentially obtain a plurality of sets of two different and identical characters to be determined from corresponding bits of the two character strings. Thus, the control unit 12 can determine similarities and differences in sequence for the groups of two characters through the circuit 15 shown in fig. 2, so as to finally obtain the hamming distance between the two character strings.

Step S306, a preset potential corresponding to character 1 is applied to the bit line BL₁A preset potential corresponding to the character 2 is applied to the bit line BL₂. Wherein the difference between the preset potentials relative to different characters is greater than 2V_t1。

By doing so, when character 1 and character 2 are different characters, BL₁And BL₂Voltage between is greater than 2V_t1And, in BL₁And BL₂There is current conduction between them. At this time, since both memristors are in a high resistance state, the memristor M₁And M₂In which necessarily one memristor is applied greater than V_t1Thereby causing the memristor to change to a low resistance state.

The following description will be given taking as an example that both the character 1 and the character 2 are binary characters. Assume that the preset potential is 0V for the character "0" and 2V for the character "1₁＞2V_t1. FIG. 5 schematically shows a memristor-based M₁And M₂The calculation process for the difference between the

characters

1 and 2 is illustrated. Wherein, in FIG. 5(a), the characters 1 andcharacter 2 is all "0" and thus in BL₁And BL₂Are all applied with a potential of 0 volt, i.e. at BL₁And BL₂Has no current conduction between them, and the memristor M₁And M₂Are maintained in the high resistance state. In FIG. 5(b), character 1 is "1" and character 2 is "0", so that in BL₁The applied potential is 2V₁At BL₂The applied potential is 0V, so that the memristor M₁And M₂Is conducted by current due to the memristor M₁And M₂All the initial resistance of the resistor M is in a high resistance state, so that the memristor M is conducted at the same time₁And M₂Respectively at a voltage of V₁＞V_t1In contrast, the memristor M₁Upper voltage greater than V_t1Forward voltage of (1), memristor M₂Upper voltage greater than V_t1Thus, the memristor M₁Resistance change to low resistance state and memristor M₂It remains in the high resistance state. In FIG. 5(c), character 1 is "0" and character 2 is "1", so that in BL₁Applied potential of 0V at BL₂The applied potential is 2V₁Similarly, at memristor M₁And M₂With current conduction therebetween, and after conduction, the memristor M, like in fig. 5(b)₁Remains in a high resistance state, and memristor M₂Resistance is changed to a low resistance state. In FIG. 5(d), character 1 is "1", character 2 is "1", and in BL₁The applied potential is 2V₁At BL₂The applied potential is 2V₁Due to BL₁And BL₂Is at the same potential as in BL₁And BL₂There is no current flow between them, so the memristor M₁And M₂Are maintained in a high impedance state. It is understood that although a binary character is exemplified here, in practice, the character string 1 and the character string 2 may comprise any type of character, as long as it is satisfied that the difference between the potentials preset respectively with respect to the different characters is greater than 2V in this step_t1And (4) finishing. For example, for the character strings 1234 and 2134, a potential of 0V may be preset with respect to "1", and a potential of 2V may be preset with respect to "2₁Preset 4V relative to "3₁Relative to "4"Presetting 8V₁So that the difference between the preset potentials of every two characters is larger than 2V_t1Thereby the method can be implemented.

Still referring to fig. 4, the right quadrant of fig. 4 shows the current variation of the memristor from the high resistance state to the low resistance state. For example, for the case in FIG. 5(c), starting at bit line BL₁A bit line BL to which a potential of 0V is applied₂Upper application of 2V₁At volt potential, as described above, the memristor M₂Has a resistance of high resistance R_HAt a voltage of V₁V, therefore, at this time M₂Has a current of I₂＝V₁/R_HI.e. as marked in the lower right straight line₂As shown. Since the memristor M is at this moment₂Is applied with more than V_t1Forward voltage of (1), memristor M₂Quickly change resistance to low resistance state R_LThus, memristor M₂The current value of (d) is I'₂＝V₁/R_LI.e. l 'as marked in the upper right straight line'₂As shown. Since R is as described above_LAnd R_HThe phase difference is large, for example 6 orders of magnitude, so that the memristor M₂Upper current value from smaller I₂Change to in comparison with I₂Very Large l'₂。

Step S308, applying 0V potential to output line, and applying BL potential₁And BL₂Are all applied with a reading potential V_r. Wherein, V_rThe value range of (A) includes 0 < V_r＜V_t1and-V_t2＜V_r< 0 by setting the read potential V in this way_rSo that when V is applied_rThen the memristor M is not changed₁And M₂So that the identity of character 1 and character 2 can be stored by the resistance of each memristor.

In step S310, the current I in the output line is read to determine whether the character 1 is identical to the character 2.

After the potential is applied in step S308, it corresponds to the memristor M₁And M₂In parallel, so that the current on the output line flows through the memristor M₁And M₂Of the currentAnd (c). FIG. 6 schematically shows the memristor M in this step₁And M₂The connection circuit diagram of (1). As shown in fig. 6, M₁And M₂Parallel connection, M₁Current I of₁And M₂Current I of₂The sum being equal to the current I on the output line, i.e. I ═ I₁+I₂Wherein

The difference between the

characters

1 and 2 can be obtained by detecting the current I in the output line by the current detection circuit 16 in fig. 1.

Specifically, for the cases in fig. 5(a) and 5(d), the memristor M₁And M₂Are all currently in a high impedance state, therefore, I₁And I₂All at relatively low current values, e.g. when R is_HIn the order of M Ω, e.g. V_r＝5V，I₁And I₂Are all 10^-6Magnitude, therefore I ═ I₁+I₂Is also 10^-6Magnitude.

For the cases in fig. 5(b) and 5(c), the memristor M₁And M₂One of them is in the low resistance state, therefore, I₁And I₂There is a large current value, e.g. when R_LIn the order of Ω, e.g. V_rWhen 5V, then I₁And I₂One of them is of the order of a few amperes, so I ═ I₁+I₂Also of the order of a few amperes.

Thus, in the case where a pair of characters are different characters, that is, the case in fig. 5(b) and 5(c), the magnitude of the current I is much larger than the magnitude in the case where a pair of characters are the same character (the case in fig. 5(a) and 5 (d)), and therefore, the dissimilarity of a pair of characters can be determined directly based on the magnitude of the current I.

In the case where the similarities and differences are sequentially determined for the corresponding bits in the two character strings by the method, when a pair of characters is determined to be different characters, the control unit 12 may add 1 to the predetermined parameter, so that after the similarity and differences determination for each pair of corresponding characters in the two character strings is finished, the value of the predetermined parameter is the hamming distance of the two character strings.

FIG. 7 shows a flow diagram of another method of determining the identity of two characters by the circuit shown in FIG. 2. The method is performed by the control unit 12 in the system 100 shown in fig. 1, and as shown in fig. 7, the method comprises the following steps.

Step S702, applying 0V potential to output line to BL₁And BL₂Are all applied with V₁Potential of volts, wherein V₁＞V_t1。

Similarly to step S302, this step is a preparatory step before hamming distance calculation, by which the memristor M is made₁And M₂Are initialized to a low resistance state for subsequent calculations. One possible current variation in this process is referred to the right-hand process in fig. 4 and will not be described in detail here. Make memristor M₁And M₂After all the signals are converted into the low impedance state, the initialization of the circuit 15 is completed, and the application of the 0V potential to the output line and the BL can be stopped₁And BL₂Are all applied with V₁Potential of volts, i.e. stopping application of V to each memristor₁The forward voltage of volts, it is understood that the resistance of the individual memristors remains in the low-resistance state after the application of the forward voltage is stopped.

Step S704, two different and identical characters to be determined, character 1 and character 2, are obtained. The step can refer to the above description of step S304, and is not described herein again.

Step S706, applying a preset potential corresponding to character 1 to the bit line BL₁A preset potential corresponding to the character 2 is applied to the bit line BL₂. Wherein the difference between the preset potentials relative to different characters is greater than 2V_t2。

By doing so, when character 1 and character 2 are different characters, BL₁And BL₂Voltage between is greater than 2V_t2And, in BL₁And BL₂There is current conduction between them. At this time, since both memristors are in a low resistance state, the memristor M₁And M₂In which necessarily one memristor is applied greater than V_t2Thereby enabling the memristor to be changed into high resistanceState.

The following description will be given taking as an example that both the character 1 and the character 2 are binary characters. Assume that the preset potential is 0V for the character "0" and 2V for the character "1₂＞2V_t2. FIG. 8 schematically illustrates a memristor-based M₁And M₂The calculation process for the similarities and differences between character 1 and character 2. In FIG. 8(a), the

characters

1 and 2 are both "0", and thus are in BL₁And BL₂All apply 0V potential, thereby applying a voltage on BL₁And BL₂Has no current conduction between them, and the memristor M₁And M₂Are maintained in a low resistance state. In FIG. 8(b), character 1 is "1" and character 2 is "0", so that in BL₁The applied potential is 2V₂At BL₂The applied potential is 0V, so that the memristor M₁And M₂Is conducted by current due to the memristor M₁And M₂All the initial resistances of the first and second resistors are in low resistance states, thereby recalling the resistor M₁And M₂Respectively at a voltage of V₁＞V_t2In contrast, the memristor M₁Upper voltage greater than V_t2Forward voltage of (1), memristor M₂Upper voltage greater than V_t2Thus, the memristor M₁Remains in the low-resistance state, and the memristor M₂Lease changes to the high impedance state. In FIG. 8(c), character 1 is "0" and character 2 is "1", so that in BL₁Applied potential of 0V at BL₂The applied potential is 2V₂Thus, similarly, at memristor M₁And M₂There is current conduction therebetween, and similarly as in fig. 8(b), the memristor M₁The resistance change process can be referred to as shown on the left side of FIG. 4, and the memristor M₂It remains in the low resistance state. In FIG. 8(d), character 1 is "1" and character 2 is "1", so that in BL₁The applied potential is 2V₂At BL₂The applied potential is 2V₂Due to BL₁And BL₂Is at the same potential as in BL₁And BL₂There is no current flow between them, so the memristor M₁And M₂Are maintained in a low resistance state.

Step S708, applying 0V potential to output line, and applying BL potential₁And BL₂Are all applied with a reading potential V_r. Wherein, V_rThe value range of (A) includes 0 < V_r＜V_t1and-V_t2＜V_r< 0 by setting the read potential V in this way_rSo that when V is applied_rThen the memristor M is not changed₁And M₂So that the identity of character 1 and character 2 can be stored by the resistance of each memristor.

In step S710, the current I in the output line is read to determine whether the word 1 is identical to the word 2.

Similarly to the above step S310, referring to fig. 6, after applying the potential in step S708, it is equivalent to applying the memristor M₁And M₂In parallel connection, so that the current I on the output line flows through the memristor M₁And M₂I.e. I ═ I₁+I₂Wherein

Specifically, for the cases in fig. 8(a) and 8(d), the memristor M₁And M₂Are currently in the low-resistance state, therefore, I₁And I₂Are all of relatively large current value, e.g. when R is_LIn the order of Ω, e.g. V_r＝5V，I₁And I₂Are all of the order of a few amperes, and I₁＝I₂Thus I ═ I₁+I₂＝2I₁。

For the cases in fig. 8(b) and 8(c), the memristor M₁And M₂One of them is in a high resistance state, therefore, I₁And I₂There is a smaller current value, e.g. when R_HIn the order of M Ω, e.g. V_r＝5V，I₁And I₂Of (1) such as I₂Is 10^-6Magnitude, i.e. can be approximated as 0, so I ═ I₁+I₂＝I₁。

Thus, by determining the current value I to be 2I₁Or I₁To determine a pairThe characters are different.

Fig. 9 shows a hamming distance circuit 15 according to another embodiment of the invention. As shown in fig. 9, a plurality of arithmetic units 151 are included in the circuit 15. The number of the operation units 151 may be set to a larger number, for example, 50, or may be set according to the needs of a specific application scenario. As shown in the figure, the i-th arithmetic unit 151 includes a memristor M therein_i1And M_i2' AND memristor M_i1And memristor M_i2And the transistor T_iIs connected to the drain of (1). The transistor T_iThe transistor can be an NMOS transistor or a PMOS transistor, and the NMOS transistor will be described as an example hereinafter. As shown in the figure, NMOS transistor T_iIs connected to the control line, and, if an NMOS transistor T is provided_iIf the transistor in the last arithmetic unit is not the transistor, the source electrode of the transistor is connected with the negative electrodes of two memristors in the (i + 1) th arithmetic unit, and if the NMOS transistor T is connected_iThe transistor in the last arithmetic unit has its source grounded for grounding the output line when the transistor is turned on.

FIG. 10 shows source drain current I in NOMS tube_DSAnd gate to source voltage V_GSSchematic diagram of the relationship of (1). As shown in the figure, when the NMOS transistor T_iVoltage V of the gate with respect to the source_GSWhen equal to 0, NMOS tube T_iIn the off state, i.e. no current flows between the source and the drain. When V is_GSWhen gradually increasing, the NMOS tube T_iHas a smaller source leakage current I_DS. When NMOS transistor T_iVoltage V of the gate with respect to the source₃Greater than a threshold voltage V_t3(i.e., the turn-on voltage of the NMOS transistor), a large source leakage current can be obtained under a small source leakage voltage, i.e., the NMOS transistor is in a conducting state, wherein V_t3> 0, so the output line in circuit 15 is conductive and grounded. Therefore, by applying a specific potential to the control line, the on and off of each transistor can be controlled, and the connection of each operation unit to a subsequent circuit can be controlled. For example, when 0V potential is applied to the control line and a positive potential or 0 potential is applied to each bit line, the gate voltage of each NMOS transistor is relative to the source voltageLess than or equal to 0, therefore, the NMOS tube will not conduct. When applying V to the control line₃＞V_t3First, the gate to source voltage of the rightmost transistor is greater than V_t3The transistor is turned on, and after the transistor is turned on, the source of the transistor next to the left side thereof corresponds to ground, and thus, similarly, the transistor becomes turned on. Similarly, the plurality of operation units sequentially turn on the NMOS tubes therein in the order from right to left, so that the output lines are all turned on. That is, each NMOS transistor functions as a switch, and the output line can be turned off or on by the control of the control line.

A hamming distance calculation method based on the circuit 15 of this embodiment will be described below.

FIG. 11 shows a flow chart of a method for calculating the Hamming distance of two strings by the circuit of FIG. 9. The method is performed by the control unit 12 in the system 100 shown in fig. 1, and as shown in fig. 11, the method comprises the following steps.

Step S1102, apply V to the control line₃A voltage potential of-V is applied to each bit line of each operation unit₂The potential of volts.

Similarly to step S302, this step is a preparatory step before hamming distance calculation is performed, by which each memristor M is made_i1And M_i2Are initialized to a high impedance state for subsequent calculations. Fig. 12 schematically shows an initialization process for the respective memristors in this step S1102. As shown in fig. 12, by applying V3 volts to the control line, as described above, the output lines are all made conductive and grounded. By applying a voltage to each bit line BL_i1And BL_i2Are all applied with-V₂The potential of volts, i.e. greater than V, applied to each memristor_t2So that each memristor is in a high resistance state R_H. The specific resistance change process of the memristor can refer to the description of the step S302, and is not detailed here.

In step S1104, two character strings with equal length, character string 1 and character string 2, are obtained. The process of acquiring the character string may refer to the description of step S304 above, and will not be described in detail here. Here, the number of bits of the

character strings

1 and 2 should be smaller than or equal to the number of arithmetic units 151 in the circuit 15 so that each bit in the

character strings

1 and 2 can be calculated in parallel. In addition, similar to the above, the two equal-length character strings may include any form of characters, such as binary characters, decimal characters, and the like. Hereinafter, for convenience of description, the character string 1 and the character string 2 are exemplified as "1100" and "1010", respectively.

In step S1106, a potential of 0V is applied to the control line, and potentials corresponding to the respective characters of the two character strings are applied to the corresponding bit lines. Wherein the difference between the preset potentials relative to different characters is greater than 2V_t1。

Specifically, each arithmetic unit 151 in circuit 15 corresponds to the same bit in both strings. For example, the ith arithmetic unit 151 corresponds to the ith bit character in two character strings, wherein the memristor M in the ith arithmetic unit 151_i1And M_i2And BL_i1And bit line BL_i2Are respectively connected, wherein, the bit line BL_i1Bit line BL corresponding to ith bit character of character string 1_i2Corresponding to the ith bit character of string 2.

Assume that the preset potential is 0V for the character "0" and 2V for the character "1₁＞2V_t1. When a potential of 0V is applied to the control line and a potential of 0 or 2V is applied to each bit line₁In the case of volts, as described above, each NMOS transistor is in the off state, i.e., each operational unit is disconnected from the circuits before and after. Therefore, each operational unit can perform a resistance state change as shown in fig. 5, that is, if two characters of the ith bit of the

character strings

1 and 2 are the same, the memristor M of the ith operational unit 151_i1And M_i2Both remain in a high resistive state, and if the two characters of the ith bit of the

strings

1 and 2 are different, the memristor M of the ith arithmetic unit 151_i1And M_i2One of the resistance changes to a low resistance state.

Fig. 13 schematically shows a parallel calculation process by the respective arithmetic units in step S1106. In FIG. 13(a), phasesFor the two characters (1, 1) of the 1 st bit in "1100" and "1010", 2V is applied to the two bit lines of the 1 st operation cell from the left side, respectively₁And 2V₁For the two characters (1, 0) of the 2 nd bit in "1100" and "1010", 2V is applied to the two bit lines of the 2 nd operation cell from the left side, respectively₁And 0V, 0V and 2V are applied to two bit lines of the 3 rd operation cell from the left side with respect to two characters (0, 1) of the 3 rd bit in "1100" and "1010", respectively₁With respect to the two characters (0, 0) of the 4 th bit in "1100" and "1010", 0V and 0V are applied to the two bit lines of the 4 th operation cell from the left side, respectively. When the electric potential is applied at the beginning, all the memristors are in a high resistance state R_H. In fig. 13(b), referring to the description of fig. 5 above, in the 1 st and 4 th operation units, since the characters of the corresponding bits are the same, that is, the potentials applied to the two bit lines are the same, no current flows in the two memristors, and thus both memristors are maintained in the high resistance state, in the 2 nd and 3 rd operation units, since the characters of the corresponding bits are different, that is, the voltage applied to one of the memristors is the positive V of the positive V₁Thus, the memristor is resistive-switching to a low resistance state.

Here, in the case where the number of operation cells is larger than the number of bits of the character string, for example, if the number of operation cells is 6 and the number of bits of the character string is 4, the potential 2V may be applied to both bit lines of the 5 th and 6 th operation cells₁And thus does not affect the final calculation result.

Step S1108, applying V to the control line₃A voltage potential, a read potential V is applied to each bit line_r. Wherein, V_rThe value range of (A) includes 0 < V_r＜V_t1and-V_t2＜V_rIs less than 0. Fig. 14 shows a process implemented in step S1108 for reading the hamming distance. As shown in fig. 14, by applying V to the control line₃The voltage potential, i.e., turns on the output line, and grounds the output line, i.e., applies a 0V potential to the output line. Similarly, by setting the read potential V in this way_rSo that when V is applied_rIn-line with the aboveWill not change each memristor M_i1And M_i2So that the identity of each corresponding character of the

character strings

1 and 2 can be stored through the resistance value of each memristor.

In step S1110, the current I in the output line is read to determine the hamming distance between the

character strings

1 and 2.

Similarly as above, by applying the potential in step S1008, it is equivalent to applying the respective memristors M_i1And M_i2Are all connected in parallel so that the current on the output line is the sum of the currents flowing through the individual memristors. Fig. 15 schematically shows a connection circuit diagram of each memristor in step S1110. As shown in figure 15 of the drawings,

wherein the content of the first and second substances,

similarly to the above description of step S310, if the ith character of each of the

character strings

1 and 2 is the same character, M is the ith operation unit_i1And M_i2Are all in a high-resistance state with corresponding current I_i1+I_i2Can be approximated to zero, if the ith character of each of the

character strings

1 and 2 is a different character, then in the ith arithmetic unit, M_i1And M_i2One in a low resistance state and one in a high resistance state, with a corresponding current I_i1+I_i2Should approximate the current on one of the low resistance state memristors, i.e. I_L＝V_r/R_LThat is, by pair I_i1+I_i2Getting the whole to obtain I_L. Thus, by calculating I/I_LAnd rounding, that is, determining the number of different characters at corresponding positions in the character string 1 and the character string 2, thereby obtaining the hamming distance between the character string 1 and the character string 2, that is, 2.

FIG. 16 shows a flow diagram of another method for calculating the Hamming distance of two strings by the circuit of FIG. 9. The method is performed by the control unit 12 in the system 100 shown in fig. 1, and as shown in fig. 17, the method comprises the following steps.

Step S1602, applying V to the control line₃A voltage potential, V is applied to each bit line of each operation unit₁The potential of volts.

Similarly to step S702, this step is a preparatory step before hamming distance calculation is performed, by which each memristor M is made_i1And M_i2Are initialized to a low resistance state for subsequent calculations.

In step S1604, two equal-length character strings, character string 1 and character string 2, are obtained. Similarly to the above, the following description will be made taking the example where the character string 1 and the character string 2 are "1100" and "1010", respectively.

In step S1606, a potential of 0V is applied to the control line, and potentials corresponding to the respective characters of the two character strings are applied to the corresponding bit lines. Wherein the difference between the preset potentials relative to different characters is greater than 2V_t2。

Assume that the preset potential is 0V for the character "0" and 2V for the character "1₂＞2V_t2. Fig. 17 schematically shows a parallel calculation process by the respective arithmetic units in this step. In fig. 17(a), 2V is applied to each of the two bit lines of the 1 st operation cell from the left with respect to the two characters (1, 1) of the 1 st bit in "1100" and "1010₂And 2V₂For the two characters (1, 0) of the 2 nd bit in "1100" and "1010", 2V is applied to the two bit lines of the 2 nd operation cell from the left side, respectively₂And 0V, 0V and 2V are applied to two bit lines of the 3 rd operation cell from the left side with respect to two characters (0, 1) of the 3 rd bit in "1100" and "1010", respectively₂With respect to the two characters (0, 0) of the 4 th bit in "1100" and "1010", 0V and 0V are applied to the two bit lines of the 4 th operation cell from the left side, respectively. When the electric potential is applied at the beginning, all the memristors are in a low resistance state R_L. In fig. 17(b), with reference to the description of fig. 8 above, in the 1 st and 4 th arithmetic units,since the characters of the corresponding bits are the same, i.e., the electric potentials applied to the two bit lines are the same, no current flows in the two memristors, so that both memristors are maintained in a low resistance state, and in the 2 nd and 3 rd arithmetic units, since the characters of the corresponding bits are different, i.e., the voltage applied to one of the memristors is a reversed V₂Thus, the memristor is resistive to a high resistance state.

Here, in the case where the number of operation cells is larger than the number of bits of the character string, for example, if the number of operation cells is 6 and the number of bits of the character string is 4, the potential 2V may be applied to both bit lines of the 5 th and 6 th operation cells₂And thus does not affect the final calculation result.

Step S1608, applying V to the control line₃A voltage potential, a read potential V is applied to each bit line_r. Wherein, V_rThe value range of (A) includes 0 < V_r＜V_t1and-V_t2＜V_rIs less than 0. This step may refer to the description of step S1108 above and will not be described herein.

In step S1610, the current I in the output line is read to determine the hamming distance between the

strings

1 and 2.

In this step, the connections of the individual memristors are likewise as shown in FIG. 15, i.e.

Wherein the content of the first and second substances,

since, as described in step S1608, if the ith character of each of the

character strings

1 and 2 is the same character, M is the same as the ith character in the ith arithmetic unit_i1And M_i2Are all in a low resistance state with a corresponding current I_i1+I_i2＝2I_L＝V_r/R_LIf the ith character of each of the

character strings

1 and 2 is a different character, M is used as the ith operation unit_i1And M_i2One of them is in high resistance state and one is in low resistance state, and its correspondent current I_i1+I_i2Should be approximated as one of lowThe current on the resistive memristor is I_L＝V_r/R_L. Thus, by calculating I/I_LRounding and subtracting I/I from the number of memristors involved in the calculation_LThe hamming distance between string 1 and string 2 can be found. For example, a total of 8 memristors are included in the circuit 15, as shown in FIG. 17, calculating the I/I_LIs equal to 6, the hamming distance between string 1 and string 2 is 8-6-2.

In the embodiment shown in fig. 9, transistors are used as switching elements for controlling connection and disconnection of the respective arithmetic units. It is to be understood that the switching element is not limited to using a transistor, but may be any switching element available to those skilled in the art as long as it can control the output line to be turned off and on and has a small resistance at the time of turning on, and depending on the specific switching element, the control of the switch is not limited to being controlled by a potential, but may be controlled by converting the potential of the control line to a specific control factor. For example, when the switch element is a magnetic-attraction switch, the switch can be controlled by converting an electric potential into a magnetic force.

FIG. 18 shows a Hamming distance computation chip 1800 according to the present application, including a control unit 181 and n arithmetic units 182, each including two memristors 1821/1822 connected negatively, where n ≧ 1,

the control unit 181 is configured to perform the following operations:

after the resistance of each memristor in the n arithmetic units is at a first resistance value, acquiring a first character string and a second character string, wherein two characters on the same position of the first character string and the second character string form a character pair, the number of the character pairs is equal to n, and one character pair corresponds to one arithmetic unit;

acquiring a preset potential corresponding to each character in each character pair;

for any character pair, respectively inputting preset potentials corresponding to two characters in the character pair into anodes of two memristors of an operation unit corresponding to the character pair, wherein when the two characters are different, the difference value of the preset potentials corresponding to the two characters is more than 2 times of threshold voltage for converting the memristor from the first resistance value to the second resistance value;

applying a read voltage to each memristor in the n arithmetic units, the read voltage enabling the resistance value of each memristor not to be changed and generating current in each memristor;

determining a Hamming distance of a first string from a second string based on a current in each memristor in the n arithmetic units.

In one embodiment, the control unit 181 for applying the read voltage to each memristor in the n arithmetic units 182 includes the control unit 181 for controlling each memristor in the n arithmetic units 182 to be connected in parallel to apply the read voltage to each memristor.

In one embodiment, the cathodes of two memristors in each arithmetic unit 182 are connected through an output line in the arithmetic unit, each arithmetic unit further includes a switch element 1823, the control unit 181 is configured to control each memristor in the n arithmetic units 182 to be connected in parallel, and the control unit 181 is configured to control the switch elements 1823 of the n arithmetic units to be closed, so that the output lines of the multiple arithmetic units 182 are connected; the control unit 181 is configured to determine, based on the current in each memristor in the n arithmetic units 182, a hamming distance of a first string from a second string, including: the control unit is used for reading the current on the output line and determining the Hamming distance between the first character string and the second character string according to the read current.

In one embodiment, the control unit 181 is further configured to: before the first character string and the second character string are acquired, the switching elements 1823 of the respective arithmetic units 182 are controlled to be turned off, so that the output lines of the respective arithmetic units 182 are turned off from each other.

The control unit 181 is a control center of the chip, and connects various parts of the chip by using a wire in the chip, and executes the hamming distance calculation method by running or executing logic solidified in the chip.

FIG. 19 shows a Hamming distance calculation device 1900 according to the present application, including a control unit 191, a storage unit 192, and a Hamming distance calculation chip 193, the Hamming distance calculation chip including n arithmetic units 1930, each arithmetic unit 1930 including two memristors 1931/1932 connected to the negative, where n ≧ 1,

the storage unit 192 has stored therein program instructions;

the control unit 191 is configured to perform the following operations according to the program instructions stored in the storage unit 192:

In one embodiment, the control unit 191 configured to apply a read voltage to each memristor in the n arithmetic units 1930 according to a program instruction stored in the storage unit 192 includes the control unit configured to control each memristor in the n arithmetic units to be connected in parallel according to the program instruction stored in the storage unit so as to apply the read voltage to each memristor.

In one embodiment, the negative electrodes of the two memristors in each arithmetic unit 1930 are connected through an output line in the arithmetic unit, each arithmetic unit 1930 further includes a switching element 1933, the control unit is configured to control each memristor in the n arithmetic units to be connected in parallel according to a program instruction stored in the storage unit, and the control unit is configured to control the switching elements of the n arithmetic units to be closed according to the program instruction stored in the storage unit, so that the output lines of the arithmetic units are connected; the control unit is used for determining the Hamming distance between the first character string and the second character string based on the current in each memristor in the n arithmetic units according to the program instructions stored in the storage unit, and comprises the following steps: the control unit is used for reading the current on the output line according to the program instruction stored in the storage unit and determining the Hamming distance between the first character string and the second character string according to the read current.

The storage unit 192 may be a volatile memory (volatile-access-memory, RAI), for example, or a non-volatile memory (non-volatile-memory), such as a read-only memory (ROI), a flash memory (flash-memory), a Hard Disk Drive (HDD), or a solid-state drive (SSD); the memory unit 192 may also comprise a combination of memories of the kind described above.

The control unit 191 is a control center of the device, connects the respective parts of the device using various interfaces and lines, and performs the hamming distance calculation method by operating or executing software programs and/or modules stored in the storage unit 192 and calling data stored in the storage unit 192. The control unit 191 may be a processor in a computer, or may be a logic unit implemented by a device, and is not limited herein.

It is to be understood that the terms "first," "second," and the like, herein are used for descriptive purposes only and not for purposes of limitation, and that similar concepts are to be distinguished.

It will be further appreciated by those of ordinary skill in the art that the elements and algorithm steps of the various embodiments described in connection with the embodiments disclosed herein can be embodied in electronic hardware, computer software, or combinations of both, and that the components and steps of the various embodiments have been described in a functional general sense in the foregoing description for the purpose of clearly illustrating the interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.

The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims

1. A method for calculating a Hamming distance of a character string is applied to a Hamming distance calculation chip, the Hamming distance calculation chip comprises n operation units, each operation unit comprises two memristors with connected cathodes, the resistors of the two memristors are all at a first resistance value, wherein n is larger than or equal to 1, and the method comprises the following steps:

acquiring a first character string and a second character string, wherein two characters on the same position of the first character string and the second character string form a character pair, the number of the character pairs is equal to n, and one character pair corresponds to one arithmetic unit;

applying a read voltage to each memristor in the n arithmetic units, the read voltage causing a current to be generated in each memristor without changing a resistance value of each memristor;

2. The method of claim 1, wherein applying a read voltage to each memristor in the n operational cells comprises controlling each memristor in the n operational cells in parallel to apply a read voltage to each memristor.

3. The method of claim 2, wherein the cathodes of two memristors in each arithmetic unit are connected by an output line in the arithmetic unit, each arithmetic unit further comprising a switching element;

the controlling of the parallel connection of the memristors in the n arithmetic units comprises:

controlling the switching elements of the n arithmetic units to be closed, and connecting the output lines of the plurality of arithmetic units;

the determining a Hamming distance of a first string from a second string based on currents in respective memristors in the n arithmetic units comprises:

the current on the output line is read, and a hamming distance between the first string and the second string is determined from the read current.

4. The method of claim 3, wherein the first resistance value is greater than the second resistance value, and wherein determining the Hamming distance between the first string and the second string based on the read current comprises:

the hamming distance between the first character string and the second character string is rounded by dividing the read current by a known current, wherein the known current is a current generated in a memristor with a second resistance value by applying a read voltage to the memristor with the second resistance value.

5. The method of claim 3, wherein the first resistance value is less than the second resistance value, and wherein determining the Hamming distance between the first string and the second string based on the read current comprises:

and dividing the read current by a known current to obtain a first value, and subtracting the first value from the total number of the memristors included in the n operation units to obtain the Hamming distance between the first character string and the second character string, wherein the known current is the current generated in the memristor with the first resistance value by applying a read voltage to the memristor with the first resistance value.

6. The method of claim 3, further comprising:

before the first character string and the second character string are acquired, the switching elements of the operation units are controlled to be turned off, so that the output lines of the operation units are turned off.

7. A Hamming distance calculation chip comprises a control unit and n operation units, wherein each operation unit comprises two memristors with negative electrodes connected, n is larger than or equal to 1, and the control unit is used for executing the following operations:

8. The chip of claim 7, wherein the control unit to apply a read voltage to each memristor of the n operational units comprises controlling each memristor of the n operational units in parallel to apply a read voltage to each memristor.

9. The chip of claim 8, wherein the cathodes of two memristors in each arithmetic unit are connected through an output line in the arithmetic unit, each arithmetic unit further comprises a switching element, and the control unit is configured to control the parallel connection of the memristors in the n arithmetic units, including controlling the switching elements of the n arithmetic units to be closed, so as to connect the output lines of the arithmetic units;

determining a Hamming distance of a first string from a second string based on the current in each memristor in the n arithmetic units comprises:

10. The chip of claim 8, wherein the control unit is further configured to:

11. A Hamming distance calculating device comprises a control unit, a storage unit and a Hamming distance calculating chip, wherein the Hamming distance calculating chip comprises n operation units, each operation unit comprises two memristors with negative electrodes connected, n is more than or equal to 1,

the storage unit stores program instructions;

the control unit is used for operating the program stored in the storage unit to execute the method of any one of claims 1-6.