CN113128015B - Method and system for predicting resources required by single-amplitude analog quantum computation - Google Patents
Method and system for predicting resources required by single-amplitude analog quantum computation Download PDFInfo
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Abstract
The invention discloses a method and a system for predicting resources required by single-amplitude analog quantum computation, and belongs to the field of quantum computation. The method comprises the steps of constructing an undirected graph corresponding to a quantum line to be simulated by acquiring a quantum line to be simulated and a configured process, determining the total quantity of tensor elements which can be stored by the process according to the parameter information of the process and the data type of the tensor elements, determining the splitting times of the undirected graph to be calculated according to the total quantity of the tensor elements, and finally determining resources required by the calculation of the single-amplitude simulated quantum according to the splitting times of the undirected graph to be calculated, so that the resources required by the calculation of the single-amplitude simulated quantum can be estimated in advance during single-amplitude simulation.
Description
Technical Field
The invention belongs to the technical field of quantum computation, and particularly relates to a method for predicting resources required by single-amplitude analog quantum computation.
Background
The quantum computation simulation is a simulation computation which simulates and follows the law of quantum mechanics by means of numerical computation and computer science, and is used as a simulation program which describes the space-time evolution of quantum states by utilizing the high-speed computing capability of a computer according to the basic law of quantum bits of the quantum mechanics.
At present, the quantum computation simulation mainly includes three modes of full-amplitude simulation, partial-amplitude simulation and single-amplitude simulation, a quantum program includes N quantum bits, and the single-amplitude simulation means that only 2 quantum bits are computed at a time N The amplitude of one of the quantum state components, i.e. the amplitude of the target quantum state component. Compared with full-amplitude simulation, single-amplitude simulation reduces the requirement on memory resources, and in practical application, only one or more amplitudes of all the amplitudes of the qubits are needed, and in this case, one or more times of simulation can be performed in a targeted manner by using a single-amplitude simulation method.
Based on the method, the computing resources at least needed when the single-amplitude quantum computing simulation is carried out on the quantum circuit to be simulated are estimated in advance for the distributed computer cluster carrying out the single-amplitude quantum simulation algorithm.
Disclosure of Invention
The invention provides a method for predicting resources required by single-amplitude analog quantum computation.
A method for predicting resources required by single-amplitude analog quantum computation comprises the following steps:
acquiring a quantum line to be simulated and a configuration process;
constructing a corresponding undirected graph to be calculated according to the quantum line to be simulated; wherein, the vertex of the undirected graph represents the quantum state of the operated quantum bit before or after the operation of the quantum logic gate, and the edge of the undirected graph represents tensor;
determining the total amount of tensor elements which can be stored by the process according to the parameter information of the process and the data type of the tensor elements;
determining the splitting times of the undirected graph to be calculated according to the total amount of the tensor elements;
and determining resources required by the single-amplitude analog quantum calculation according to the splitting times of the undirected graph to be calculated.
Preferably, the constructing a corresponding undirected graph to be computed according to the quantum wires to be simulated includes:
analyzing the quantum circuit to be simulated to obtain a linked list for recording the information of the quantum circuit to be simulated;
traversing the linked list, and creating an edge with a tensor order of 1 when the type of the quantum logic gate in the linked list is a first single quantum logic gate; the edge is connected with the last vertex of the corresponding vertex chain of the quantum bit operated by the first single-quantum logic gate, and the unitary matrix of the first single-quantum logic gate is a diagonal matrix;
when the type of the quantum logic gate in the linked list is a second single quantum logic gate, creating an edge with the tensor order of 2 and a vertex connected with the edge; the edge is connected with the last vertex of the corresponding vertex chain of the quantum bit operated by the second single-quantum logic gate, and the unitary matrix of the second single-quantum logic gate is a non-diagonal matrix;
when the type of the quantum logic gate in the linked list is a first double-quantum logic gate, creating an edge with the tensor order of 2; the edge is connected with the last vertex in the vertex chain respectively corresponding to the two quantum bits operated by the first double-quantum logic gate, and the unitary matrix of the first double-quantum logic gate is a diagonal matrix;
when the type of the quantum logic gate in the linked list is a second double-quantum logic gate, creating an edge with the tensor order of 4 and two vertexes connected with the edge; the edge is connected with the last vertex in the vertex chain respectively corresponding to the two quantum bits operated by the second double-quantum logic gate, and the unitary matrix of the second double-quantum logic gate is a non-diagonal matrix;
and obtaining the undirected graph to be calculated corresponding to the quantum line to be simulated.
Preferably, the determining, according to the parameter information of the process and the data type of the tensor elements, the total amount of tensor elements that can be stored by the process includes:
determining memory resources used for single-amplitude quantum simulation calculation in a single process according to the parameter information of the process;
determining the memory required by each element of the tensor according to the data type expressing the tensor element;
and determining the total amount of tensor elements which can be stored by the process according to the memory resources and the memory required by each element.
Preferably, wherein:
if the memory resource used for single-amplitude quantum simulation calculation in a single process is mM and the data type representing the tensor element is the Float type, the total amount of the tensor elements which can be stored by the process is m multiplied by 1024/8;
if the memory resource used for single-amplitude quantum simulation calculation in a single process is mM and the data type representing tensor elements is a Double type, the total amount of tensor elements which can be stored by the process is m multiplied by 1024/16, wherein m is any positive number.
Preferably, determining the splitting times of the undirected graph to be calculated according to the total number of tensor elements which can be stored in the process includes:
acquiring information of edges connected with vertexes in the undirected graph to be calculated according to a preset sequence;
executing fusion operation on the edges connected with the current vertex according to the information of the edges connected with the current vertex;
after the edges connected with the current vertex execute the fusion operation, updating the undirected graph to be calculated;
judging whether the sum of the number of tensor elements corresponding to all edges in the undirected graph to be calculated is greater than the total number of tensor elements which can be stored by the process;
if the number of elements of the tensor capable of being stored in the process is not larger than the total number of elements of the tensor capable of being stored in the process, executing definite value reduction on the edges connected with the current vertex, taking the next vertex as the current vertex, returning to execute the step of executing the fusion operation on the edges connected with the current vertex according to the information of the edges connected with the current vertex;
if the total quantity of the elements of the tensor which can be stored by the process is larger than the total quantity of the elements of the tensor which can be stored by the process, returning the undirected graph to be calculated which is updated last time, executing deletion operation on each vertex before the current vertex and information of edges connected with each vertex before the current vertex, executing definite value reduction on the edges connected with the current vertex, taking the next vertex as the current vertex, returning and executing the information of the edges connected according to the current vertex, and executing fusion operation on the edges connected with the current vertex;
and determining the splitting times of the undirected graph to be calculated according to the execution times of the deleting operation.
Preferably, determining the splitting times of the undirected graph to be computed according to the total number of tensor elements which can be stored in the process, further includes:
before the information of the edges connected with the vertexes in the undirected graph to be calculated is obtained according to the preset sequence, determining a first vertex and a last vertex of the undirected graph to be calculated according to the undirected graph to be calculated;
and respectively executing determined value reduction operation on the edge connected with the first vertex and the edge connected with the last vertex.
Preferably, the step of fusing comprises:
determining a first edge and a second edge to be fused;
according to a vertex which is not connected with the first edge in a second vertex group of the second edge, performing step-up operation on a first tensor of the first edge, and updating the first tensor by the raised tensor;
determining a corresponding element of each element in the first tensor in a second tensor of the second edge according to a corresponding relation between a first vertex group corresponding to the first tensor and the second vertex group;
traversing each element in the first tensor to update the element by the product of the element and its corresponding element in the second tensor;
deleting the second edge and connecting other vertices of the second edge except the current vertex to the first edge.
The invention also provides a system for predicting resources required by single-amplitude analog quantum computation, which comprises the following steps:
the acquisition module is used for acquiring the quantum line to be simulated and the configured process;
the construction module is used for constructing a corresponding undirected graph to be calculated according to the quantum line to be simulated; wherein, the vertex of the undirected graph represents the quantum state of the operated quantum bit before or after the operation of the quantum logic gate, and the edge of the undirected graph represents tensor;
a tensor element determining module, configured to determine, according to the parameter information of the process and the data type of the tensor elements, a total amount of tensor elements that can be stored in the process;
the splitting frequency determining module is used for determining the splitting frequency of the undirected graph to be calculated according to the total amount of the tensor elements;
and the calculation resource determining module is used for determining resources required by the single-amplitude analog quantum calculation according to the splitting times of the undirected graph to be calculated.
The invention also provides a storage medium having a computer program stored thereon, wherein the computer program is arranged to perform the method of any of the above when run.
The invention also provides an electronic device comprising a memory having a computer program stored therein and a processor arranged to run the computer program to perform the method of any of the above.
Compared with the prior art, the method comprises the steps of constructing the undirected graph corresponding to the quantum line to be simulated by acquiring the quantum line to be simulated and the configured process, determining the total amount of tensor elements which can be stored by the process according to the parameter information of the process and the data type of the tensor elements, determining the splitting times of the undirected graph to be calculated according to the total amount of the tensor elements, and finally determining the resources required by the calculation of the single-amplitude simulated quantum according to the splitting times of the undirected graph to be calculated, so that the resources required by the calculation of the single-amplitude simulated quantum can be estimated in advance during single-amplitude simulation.
Drawings
Fig. 1 is a specific example of a quantum program splitting into different paths corresponding to quantum wires;
FIG. 2 is a schematic flow chart of a method for estimating resources required for single-amplitude analog quantum computation;
fig. 3 is a schematic view of an undirected graph constructed by different types of quantum logic gates in the single-amplitude quantum computation simulation method according to the embodiment of the present invention;
fig. 4 is an undirected graph corresponding to an example of a quantum wire to be simulated according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of a system for estimating resources required for single-amplitude analog quantum computation.
Detailed Description
The invention is further described with reference to the accompanying drawings and specific embodiments.
Qubits are the basic unit of information in quantum computing, so that there is a correspondence of 2 for N qubits N The quantum state components, for example:
1 qubit is in a logic state that is a superposition of 2 quantum state components, the 2 quantum state components being |0> and |1>, respectively, and the logic state of the 1 qubit can be expressed as:
ψ＝a|0>+b|1>
wherein, a and b are the amplitude of |0> and |1>, and a and b are complex forms.
The matrix for ψ is expressed as:
after measurement, the 1 qubit is in a logic state that collapses to a fixed quantum state |0>Or |1>Wherein collapse to |0>Has a probability of 2 Collapse to |1>Has a probability of b 2 ，a 2 +b 2 ＝1。
The 3 qubits are in a logic state of 2 3 (i.e., 8) superposition states of quantum state components, wherein the 8 quantum state components are respectively |000>、|001>、|010>、|011>、|100>、|101>、|110>And |111>At this time, any logic state ψ where the 3 qubits are located can be expressed as:
ψ＝c 0 |000>+c 1 |001>+c 2 |010>+c 3 |011>+c 4 |100>+c 5 |101>+c 6 |110>+c 7 |111>
and psi corresponds to the matrix expressed as:
wherein each quantum state component in the 8 quantum states has an amplitude c 0 To c 7 One of these plural numbers, c 0 To c 7 The subscript value of (c) is the binary corresponding decimal value of the quantum state to which the amplitude belongs 0 To c 7 Each of these complex numbers is referred to as a single amplitude.
The process of quantum computation is a process of operating corresponding quantum bits by different quantum logic gates in order, wherein, the sequence of quantum logic gates combined in order is called a quantum wire. In the quantum computation simulation process, a unitary matrix is used for representing the quantum logic gate, and the process of quantum logic gate operation corresponding to the quantum bit is the process of matrix multiplication computation by multiplying the unitary matrix by a matrix corresponding to a quantum state right vector. Therefore, quantum computation can also be understood as that unitary matrixes corresponding to different quantum logic gates perform left multiplication on initial quantum states in order. Wherein:
single quantum logic gates (e.g., aldamard, paly-X, paly-Y, paly-Z, etc.) are a 2X 2 matrix, where an operation of a single quantum logic gate on a qubit in a quantum wire only changes the amplitude of the state to which the qubit corresponds, and where the states to which the qubit corresponds are present in groups of 2 qubits; a dual quantum logic gate (e.g., a control not gate, a switching gate, etc.) is a 4 x 4 matrix, where operating on two qubits in a quantum wire only changes the amplitudes of the states corresponding to the two qubits, and where the states corresponding to the qubits occur in groups of 4 quantum states.
It should be noted that the qubits of the qubits acted by the dual-quantum logic gate include two bits, which are a control bit and an operation bit, respectively, a common dual-quantum logic gate is a CNOT gate (i.e., a control not gate), q1 in the CNOT (q 1, q 2) is a control bit, q2 is an operation bit, and the actions of the dual-quantum logic gate are as follows: the quantum state of operational bit q2 is unchanged when the control bit is in the |0> state and the quantum state of operational bit q2 is inverted when the control bit is in the |1> state. It should be noted that the control bit and the operation bit are not allowed to be the same qubit when constructing the quantum wire.
The quantum computation simulation mainly comprises amplitude simulation, partial amplitude simulation and single amplitude simulation, wherein:
single amplitude simulation refers to one-time simulation of calculating 2 of N qubits N The amplitude of one of the quantum state components, i.e. the amplitude of the target quantum state component. In particular, single amplitude simulation is achieved by mapping quantum wiresThe method is characterized in that the method comprises the steps of shooting an undirected graph, splitting the undirected graph into a plurality of computing processes (or called computing nodes) by combining a path integral method, and computing corresponding sub-undirected graphs by each process, thereby realizing parallel computing. The whole calculation process is based on simple operation of elements in the tensor, and compared with full-amplitude simulation, the requirement on memory resources is greatly reduced.
In addition, in practical application, sometimes only one or more than one amplitude of the full amplitude of the qubits is needed, and in this case, if full-amplitude simulation is adopted, that is, all the amplitudes are simulated at one time, the waste of resources such as a memory and time is undoubted; and by applying the single-amplitude simulation method, one or more times of simulation can be performed in a targeted manner, and only one or more single amplitudes required can be simulated, so that resources and time are greatly saved.
However, with the separation of the undirected graph, the resources required for single-amplitude simulation also change, even increase, which seriously affects the simulation efficiency of quantum computation, and therefore, a method for estimating the resources required for single-amplitude simulation quantum computation is needed.
It should be noted that, in the single-amplitude simulation, it is assumed that the initial quantum state |0.. 0 of the qubit is divided in the quantum line (or quantum program) to be simulated>And the last state is involved in M 1 Quantum state, then, since the state of each qubit can be at |0>And |1>So as to be directed to M 1 One quantum state in the quantum well, splitting it into |0>And |1>So as to obtain the initial quantum state to the final state component X = | X 0 ...x n-1 >2 of (2) M1 And calculating the amplitude of each path by using the possible transformation paths, and summing to obtain the final state component, namely the amplitude of the target quantum state component. Wherein M is 1 Is a positive integer.
For example, a quantum wire to be simulated involves 2 qubits, respectively: q. q.s 0 、q 1 Initial state s 0 ＝|00>The target quantum state component is |11>(a quantum state component of the last state), the quantum wire contains 2H gates (Hadamard Gate ): h 1 、H 2 1 CNOT Gate (Control-not Gate,a control not gate).
As shown in FIG. 1a, which gives a simple illustration of the quantum process with respect to a quantum wire, it can be seen that the quantum wire divides the initial quantum state |00>And a target quantum state component |11>In addition, 4 quantum states are involved: s 0 1 、 s 0 2 、s 1 1 、s 1 2 Where each quantum state can be represented as |0>And |1>In the stacked state. If will s 1 1 Splitting into |0>And |1>Two parts, then, from the initial quantum state |00>To |11>It can be split into two paths as shown in (1 b) and (1 c) to obtain the initial quantum state |00>Transformed into |11 via two paths>And summing the sub-amplitudes to obtain an amplitude value corresponding to the target quantum program, thereby completing the simulation.
It will be appreciated that if M in a quantum wire is to be used 1 Quantum state, all splitting it into |0>And |1>Two parts, then the initial quantum state to the final state component is obtained
And calculating the amplitude of each path by using the possible transformation paths, and summing to obtain the target single amplitude of the quantum state.
In a quantum wire (or quantum program) with only single-quantum logic gates and diagonal dual-quantum logic gates, the initial quantum state of a given qubit is |0.. 0>When the value of the last state component, namely the target quantum state component, is x = | x 0 ...x n-1 >Then, the calculation formula of the amplitude can be expressed as:
formula (1) is a basic formula of the quantum mechanical path integration method.
It should be noted that psi function in formula (1) is a complex function related to boolean variable, which represents the contribution of quantum logic gate to quantum state, and for better illustration, formula (1) only embodies threeOne of the psi-like functions omits the other psi functions;
the quantum bit with the value of {0,1} and corresponding to the quantum bit j is subjected to the action of the kth quantum logic gate to obtain the component of the quantum state. The value of psi function is mainly related to two factors, namely, the quantum state of quantum bit operated by the quantum logic gate before and after the quantum logic gate is executed, and unitary matrix of the quantum logic gate.
In particular, the amount of the solvent to be used,
is a function of the boolean variable->
And &>
Is determined by the values of two variables and a unitary matrix corresponding to diagonal dual-quantum logic gates, and is taken on a value basis>
And &>
Respectively corresponding to qubits of v 1 And v 2 The two quantum bits of (a) are not subjected to the component of the quantum state before the action of the v diagonal dual-quantum logic gate; />
Is a function of a boolean variable>
Is determined by the value of the variable and the unitary matrix corresponding to the diagonal single-quantum logic gate, and is taken on>
The qubit corresponding to qubit u has not yet u'The components of the previous quantum state before the action of the diagonal single-quantum logic gate; />
Is a function of the boolean variable->
And &>
Is determined by the values of two variables and a unitary matrix corresponding to an off-diagonal single-quantum logic gate, and is taken on>
And &>
The quantum bit corresponding to the quantum bit j has the components of the quantum state before and after the action of the ith off-diagonal single-quantum logic gate. It is understood that j, k, v 1 、v 2 、v 1 ′、v 2 ', u', i are all non-negative integers.
As shown in fig. 2, the present embodiment provides a method for estimating resources required for single-amplitude analog quantum computation, including the following steps S100 to S500, where:
s100, obtaining a quantum line to be simulated and a configuration process.
For ease of understanding, as described below with reference to fig. 1 and the specific example, the quantum wire to be simulated is, for example, the following 1# quantum wire, the distributed computer cluster simulating the 1# quantum wire is configured with 4 procedures based on MPI communication, the target quantum state component is |101>, and the corresponding amplitude of the target quantum state component is the single amplitude to be calculated:
QCircuitcir；
cir＜＜RY(q[0]，PI/2)＜＜H(q[2])
＜＜CNOT(q[2]，q[1])
＜＜CNOT(q[0]，q[1])＜＜H(q[2])
＜＜H(q[0])＜＜CNOT(q[1]，q[2]).
among these, those skilled in the art will appreciate that:
h represents an adama Hadamard gate, X represents a Paly-X gate (a matrix corresponding to the gate is a Paly matrix sigma X), Y represents a Paly-Y gate (a matrix corresponding to the gate is a Paly matrix sigma Y), Z represents a Paly-Z gate (a matrix corresponding to the gate is a Paly matrix sigma Z), RX represents an arbitrary rotating Pay-X gate, RY represents an arbitrary rotating Pay-Y gate, RZ represents an arbitrary rotating Pay-Z gate, and CNOT represents a Control NOT gate (Control-NOT);
q0, q1, q2 refer to qubits having bits from 0 to 2. It should be noted that the representation of the quantum state corresponds to the arrangement rule of q2q1q0, and the corresponding bit from right to left in q2q1q0 is from low to high.
Therefore, from this quantum wire, it can be determined that the quantum logic gate H (q 0) is a single quantum logic gate, and the bit of the quantum bit it acts on is 0, similarly: determining that H (q 1) is a single-quantum logic gate and the bit of the quantum bit acted by the single-quantum logic gate is 1; determining RY (q 0) as a single-quantum logic gate, wherein the bit of the quantum bit acted by the single-quantum logic gate is 2; a cut-out; determining that CNOT (q 1, q 2) is a double-quantum logic gate, and the bit positions of the quantum bits acted by CNOT are 2 and 1; .......
S200, constructing a corresponding undirected graph to be calculated according to the quantum line to be simulated; wherein the vertices of the undirected graph represent quantum states of the manipulated qubits before and after operation of the quantum logic gate, and the edges of the undirected graph represent tensors.
The quantum circuit to be simulated comprises quantum logic gate information and related quantum bits, and an undirected graph is constructed by analyzing the quantum circuit to be simulated and sequentially reading data obtained by analysis; or configuring information of a target type format obtained after the quantum line to be simulated is analyzed, and constructing an undirected graph according to the information of the target type format. The target type format can be a linked list, a queue and the like, and the linked list is optimized in consideration of high efficiency of subsequent undirected graph construction.
It should be noted that:
in the process of constructing the undirected graph to be computed, when a vertex is created, the vertex is recorded as the second vertex of the quantum bit operated by the current quantum logic gate.
In the constructed undirected graph to be calculated, each quantum bit corresponds to vertex chain information, and the vertex chain information comprises vertex values from a first vertex to a last vertex, information of edges connected with the vertices and vertex identifications. The vertex identification uniquely determines a vertex, and the quantum bit to which the corresponding vertex belongs, the value of the quantum bit, the information of the connected edges and the like can be determined according to the identification; after the value of the vertex is determined, the value is 0 or 1; however, when the vertex value is uncertain, the vertex value may be null, or any agreed numerical value or character that conforms to the vertex value type, such as-1, for determining the vertex value condition in the implementation process. The vertex values may be expressed as tensors, or may be expressed as variables or other reasonable data types.
The undirected graph to be computed also includes tensor information of the edges, which may include a tensor array and identifications of vertices connected by edges corresponding to the tensor.
Wherein, the vertexes of the undirected graph to be calculated correspond to the quantum state components of the operated qubits before or after the operation of the quantum logic gate, the values are all {0,1}, and correspond to the variables in the formula (1)
And the operated qubit is the qubit corresponding to the operation of the quantum logic gate. The edges of the undirected graph correspond to quantum logic gates in a quantum circuit to be simulated, specifically, the edges corresponding to each quantum logic gate correspond to a tensor (that is, the tensor is related to the characteristics of the quantum logic gate), elements in the tensor are determined by a unitary matrix corresponding to the quantum logic gate and vertex values connected with the corresponding edges, and it can be understood that the tensor corresponds to the ψ function in formula (1).
The Tensor (Tensor) is a quantity defined in several linear spaces at the same time, and is a generalization of the vector concept and the matrix concept. Each tensor can be indexed using subscript notation, e.g., tensor T 12 The number of subscripts is the order of the tensor (rank), representing the tensorOf (c) is calculated. For example, a scalar is a 0 th order tensor, a vector is a 1 st order tensor, and a matrix is a 2 nd order tensor. The shape of the tensor then refers to the number of elements in each dimension; the number of tensor elements is determined by their shape.
In the embodiment of the invention, the order of the tensor is equal to the number of vertexes connected with corresponding edges of the tensor, and the subscript of the tensor is the number of vertexes in the undirected graph. Since each vertex can only take a value of 0 or 1, there are only two possibilities, and thus, for an n-order tensor, its shape = [2, 2.. 2 ]]The number of elements is 2 n 。
The number of each tensor element can be represented as a binary number, and each bit of the binary number can be represented as a value of a corresponding vertex.
For example, edge E m Connecting 4 vertices, the corresponding tensor is a 4 th order tensor with 2 total elements 4 By =16, the element number can be represented as a binary number: (0000) 2 ～(1111) 2 . When edge E m The 4 connected vertexes are arranged according to a certain sequence to obtain a vertex sequence, and when the four vertexes all take the value of O, the combined value of the vertex sequence is 0000, and the (0000) th corresponding tensor is obtained 2 A bit element; when edge E m The value of the first vertex of the connection is 1, the value of the second vertex is 0, the value of the third vertex is 0, and the value of the fourth vertex is 1, the combined value of the vertex sequences is '1001', corresponding to the tensor (1001) 2 A bit element.
It can be understood that, in the process of constructing the undirected graph to be computed in this embodiment, vertices and edges are added according to the order of the quantum logic gates in the quantum wires to be simulated and the transformation of the quantum states of the qubits operated by the quantum logic gates. The following further explains the construction of the undirected graph to be computed in combination with different types of quantum logic gates, specifically as follows:
in the first case: the quantum logic gate is a diagonal single-quantum logic gate or a diagonal double-quantum logic gate
In this case, when the unitary matrix corresponding to the single-quantum logic gate or the dual-quantum logic gate is a diagonal matrix,the quantum logic gate acts on the qubit, usually only with a change in amplitude, corresponding to the quantum state component of the qubit-corresponding to that in equation (1)
There is typically no change.
A single quantum logic gate of this type, typically a Pauli-Z gate (Pauli-Z gate), has a unitary matrix of
When a qubit is operated on with a Poly-Z gate, the basic state |0> of the qubit is left unchanged and |1> is converted to- |1>.
A dual quantum logic gate of this type, typically a CZ gate, has a unitary matrix of:
when for two qubits Q 0 、Q 1 (Q 0 To control bits, Q 1 Target bit) when performing a CZ gate operation, Q is the same as the target bit 0 Quantum state of (b) is |0>When is, Q 1 The quantum state of (a) is unchanged; when Q is 0 Quantum state of |1>When is, Q 1 Quantum state retention of (1) |0>Unchanged, will |1>Changed into- |1>。
It can be seen that either the pauli-Z or CZ gates result in only a change in the amplitude of the quantum state component, with the quantum state component being unchanged. Therefore, when an undirected graph is constructed for such a quantum logic gate, i.e., a single quantum logic gate or a double quantum logic gate in which a unitary matrix is a diagonal matrix, an edge corresponding to the quantum logic gate is added to the undirected graph.
As shown in FIG. 3a, for diagonal single quantum logic gate, only one edge E is added when constructing an undirected graph 1 That is, one end of the edge and the vertex V 0 Are connected. Wherein, V 0 For the current last vertex of the corresponding qubitI.e. the vertex corresponding to the quantum state that the quantum logic gate directly acts on.
It can be understood that, as shown in fig. 3a, the edge E1 connects only one vertex, so its tensor is
Is a tensor of order 1, and has a total of 2 1 =2 elements, the tensor corresponding to ψ in equation (1) u A function representing the contribution of the diagonal single quantum logic gate to a quantum state.
For example, when the edge E 1 When the corresponding edge of the diagonal single quantum logic gate Pagli-Z gate is known, the tensor can be known according to the unitary matrix of the Pagli-Z gate
As shown in FIG. 3b, for diagonal double-quantum logic gates, only one edge E needs to be added when constructing an undirected graph 12 One end of the edge and the vertex V 1 Connected with one end of the vertex V 2 Are connected. Wherein, V 1 And V 2 The two qubits of the diagonal double-quantum logic gate operation are respectively corresponding to the current last vertex, i.e. the vertex corresponding to the quantum state directly acted by the diagonal double-quantum logic gate.
It will be appreciated that edge E, as shown in FIG. 3b 12 With two vertices V 1 And V 2 Are connected so their tensors
Is a tensor of order 2, and has a total of 2 2 =4 elements, the tensor corresponding to ψ in equation (1) ν A function representing the contribution of the diagonal dual quantum logic gate to a quantum state.
For example, when the edge E 12 When the corresponding edge of the diagonal biquantum logic gate CZ gate is obtained, the tensor can be known according to the unitary matrix
In the second case: the quantum logic gate is an off-diagonal single-quantum logic gate
When the quantum logic gate is a single-quantum logic gate and the unitary matrix corresponding thereto is an off-diagonal matrix, i.e., an off-diagonal single-quantum logic gate, such as an H-gate, the unitary matrix is
Through the operation of the H gate, |0>Will become->
|1>Will become->
Both the amplitude and the quantum state components are changed. For the quantum logic gate, when an undirected graph is constructed, a vertex corresponding to a new quantum state and an edge corresponding to a quantum logic gate after a single quantum logic gate operation need to be added to the undirected graph.
As shown in FIG. 3c, for the non-diagonal single quantum logic gate, when constructing an undirected graph, a vertex V is added 4 An edge E 34 One end of the edge and the vertex V 3 Connected with one end to the vertex V 4 Are connected. Wherein, V 3 The current last vertex corresponding to the qubit operated by the off-diagonal single-quantum logic gate, namely the vertex corresponding to the quantum state directly acted by the off-diagonal quantum logic gate; v 4 And the new vertex corresponds to a new quantum state after the operation of the off-diagonal single-quantum logic gate.
As can be appreciated, edge E 34 With two vertices V 3 And V 4 Connected with each other, so its tensor
Is a tensor of order 2, and has a total of 2 2 =4 elements, the tensor corresponds to ψ in equation (1) i A function representing a contribution of the off-diagonal single quantum logic gate to a quantum state.
For example, when the edge E 34 When the corresponding edge of the H gate of the non-diagonal single quantum logic gate is known according to the unitary matrix, tensor
In a third case: the quantum logic gate is an off-diagonal double-quantum logic gate
In this case, the quantum logic gate is a dual-quantum logic gate and the corresponding unitary matrix is an off-diagonal matrix, for example, for an off-diagonal dual-quantum logic gate CNOT, the unitary matrix is:
then, through the operation of the CNOT gate, when the quantum state of the control bit is |0>, the quantum state of the controlled bit is not changed, that is, when the quantum states of the control bit and the controlled bit are |00> and |01>, the quantum states are still |00> and |01> respectively after the operation of the CNOT gate; when the quantum state of the control bit is |1>, the quantum state of the controlled bit is not operated, i.e., |0> is changed to |1> and |1> is changed to |0>, i.e., the quantum states of the control bit and the controlled bit are |10> and |11>, respectively changed to |11> and |10> after being operated by the CNOT gate. Since two qubits are usually in the superposition state of |00>, |01>, |10> and |11>, after operation of the CNOT gate, it can be seen that both the amplitude and the quantum state components of the two qubits involved will change. For such quantum logic gates, when an undirected graph is constructed, for each qubit, a vertex corresponding to a new quantum state of the undirected graph after the operation of the dual-quantum logic gate, that is, two new vertices, is added to the undirected graph, and a corresponding edge of the dual-quantum logic gate is added to the undirected graph.
As shown in fig. 3d, for the non-diagonal biquantum logic gate, when constructing the undirected graph, an edge E needs to be added 5678 For clarity, two edges are shown here, but it should be noted that the two edges in fig. 3d are actually the same edge E 5678 . Newly added edge end and vertex V 5 、V 7 Connected with one end to the vertex V 6 、V 8 Are connected. Wherein, V 5 And V 6 Two quantities respectively operating for the non-diagonal double-quantum logic gateCurrent last vertex, V, corresponding to a sub-bit 7 And V 8 Respectively corresponding to the new quantum state of the two quantum bits after the operation of the off-diagonal double-quantum logic gate. In particular, when the non-diagonal double-quantum logic gate is a control logic gate, V 5 、V 7 Corresponding to the control bit, V 6 、V 8 Corresponding to the controlled bit.
It will be appreciated by those skilled in the art that any multi-quantum bit gate can be constructed with a single-quantum logic gate plus any double-quantum logic gate, in most cases a double-quantum logic gate multi-selects the CNOT gate. In a sense, the CNOT gate and the single quantum logic gate are prototypes of all other gates. The method provided by the present application is also applicable to quantum wires (or quantum programs) with multi-qubit logic gates.
Therefore, in combination with the above analysis, a specific implementation of step S200 can be obtained as follows:
s210, analyzing the quantum circuit to be simulated to obtain a linked list for recording the information of the quantum circuit to be simulated;
s220, traversing the linked list, sequentially reading the type and unitary matrix form of each quantum logic gate in the linked list, and adding corresponding vertexes and edges, wherein:
when the type of the quantum logic gate in the linked list is a first single quantum gate, creating an edge with a tensor order of 1; wherein the edge is connected with the last vertex of the corresponding vertex chain of the quantum bit operated by the first single quantum gate, and the unitary matrix of the first single quantum gate is a diagonal matrix;
when the type of the quantum logic gate in the linked list is a second single quantum gate, creating an edge with the tensor order of 2 and a vertex connected with the edge; the edge is connected with the last vertex of the corresponding vertex chain of the quantum bit operated by the second single quantum gate, and the unitary matrix of the second single quantum gate is a non-diagonal matrix;
when the type of the quantum logic gate in the linked list is a first double quantum gate, an edge with the tensor order of 2 is created; wherein the edge is connected with the last vertex in the vertex chain respectively corresponding to the two qubits operated by the first dual-quantum gate, and the unitary matrix of the first dual-quantum gate is a diagonal matrix;
when the type of the quantum logic gate in the linked list is a second double-quantum gate, creating an edge with the tensor order of 4 and two vertexes connected with the edge; the edge is connected with the last vertex in the vertex chain respectively corresponding to the two qubits operated by the second double-quantum gate, and the unitary matrix of the second double-quantum gate is a non-diagonal matrix;
s230, completing traversal, and completing adding vertices and edges, that is, constructing an undirected graph of the quantum wires to be simulated, to obtain an undirected graph corresponding to the quantum wires to be simulated, where the undirected graph to be calculated corresponding to the quantum wire to be simulated example (1 # quantum wire) provided in this embodiment is as shown in fig. 4.
The undirected graph shown in fig. 4 describes vertex chain information of each quantum bit in the 1# quantum line, and the vertex chain information includes values of vertices from the first vertex to the last vertex, information of edges connected to the vertices, vertex identifiers, and tensor information of the edges.
For the 1# quantum wire in this embodiment, the vertex of its undirected graph is labeled V 1 To V 13 The information of the edge connected to each vertex and the tensor information of the edge are as follows:
table 1# Quantum line corresponding to the tensor order of the edge connected with the edge urgency of each vertex connection in the undirected graph to be calculated
Note: the tensor order of the connected edge is arranged in the table.
S300, determining the total amount of tensor elements which can be stored by the process according to the parameter information of the process and the data type of the tensor elements.
As a specific implementation manner of the embodiment of the present invention, S300 includes the following steps:
s310, determining memory resources used for single-amplitude quantum simulation calculation in a single process according to the parameter information of the process;
s320, determining a memory required by each element of the tensor according to the data type expressing the tensor element;
and S330, determining the total amount of tensor elements which can be stored by the process according to the memory resources and the memory required by each element.
Wherein: if the memory resource used for single-amplitude quantum simulation calculation in a single process is mM (M is a unit of megabyte) and the data type representing the tensor element is a Float type, the total amount of the tensor elements which can be stored by the process is M multiplied by 1024/8; if the memory resource used for single-amplitude quantum simulation calculation in a single process is mM (M is a unit of megabyte) and the data type representing the tensor element is a Double type, the total amount of the tensor elements which can be stored in the process is M multiplied by 1024/16, wherein M is any positive number.
The parameter information of the process in this step refers to parameters that determine memory resources used by the process for single-amplitude quantum simulation calculation, such as a memory of the process, a set memory proportion used for single-amplitude quantum simulation calculation, and the like.
S400, determining the splitting times of the undirected graph to be calculated according to the total quantity of tensor elements which can be stored in the process.
The method comprises the steps of simulating quantum computation, namely realizing matrix multiplication, updating an undirected graph to be computed after performing fusion operation on edges in the undirected graph when the undirected graph to be computed simulates quantum computation, wherein the upper limit which can be reached by tensor elements corresponding to the undirected graph to be computed cannot exceed the total amount of the tensor elements determined in the previous step, and therefore the splitting times of the undirected graph to be computed can be determined.
As a specific embodiment, step S400 includes:
s430, acquiring information of edges connected with each vertex in the undirected graph to be calculated according to a preset sequence;
s440, executing fusion operation on the edges connected with the current vertex according to the information of the edges connected with the current vertex;
it should be noted here that, in order to facilitate quick determination of data to be calculated, vertices corresponding to a tensor are generally arranged in a certain order, and binary numbers of combined values of the vertex sequence correspond to position numbers of elements in the tensor one by one.
S450, after the edges connected with the current vertex execute the fusion operation, updating the undirected graph to be calculated;
s460, judging whether the sum of the number of tensor elements corresponding to all edges in the undirected graph to be calculated is larger than the total number of the elements of the tensor which can be stored by the process;
if the number of the elements of the tensor which can be stored by the process is not larger than the total number of the elements of the tensor which can be stored by the process, executing value determination reduction on the edges connected with the current vertex, taking the next vertex as the current vertex, returning and executing the information of the edges connected according to the current vertex, and executing the step of executing the fusion operation on the edges connected with the current vertex;
if the total quantity of the elements of the tensor which can be stored by the process is larger than the total quantity of the elements of the tensor which can be stored by the process, returning the undirected graph to be calculated which is updated last time, executing deletion operation on each vertex before the current vertex and information of edges connected with each vertex before the current vertex, executing definite value reduction on the edges connected with the current vertex, taking the next vertex as the current vertex, returning and executing the information of the edges connected according to the current vertex, and executing fusion operation on the edges connected with the current vertex;
s470, determining the splitting times of the undirected graph to be calculated according to the execution times of the deleting operation.
The following describes how a vertex is fused and reduced in order for all its connected edges.
In an implementation manner, a step of performing a fusion operation on all edges connected to the vertex to obtain a target edge may be specifically performed, where two edges of all edges connected to the vertex are fused to obtain at least one fused edge, and then, under a condition that the number of new edges obtained by fusion is not less than 2, the two-edge fusion operation on the new edges is continued until a fused edge, that is, the target edge, is finally obtained.
In another implementation manner, the step of performing a fusion operation on all edges connected to the vertex to obtain a target edge may specifically be to first perform fusion on any two edges of all edges connected to the vertex to obtain a new edge, then select one edge from the remaining unfused edges to be fused with the new edge, and repeat the above steps until all connected edges of the vertex are fused into one edge.
Of course, in practical applications, the above two implementation manners may be combined or other manners may be adopted to implement the edge fusion, which is not limited herein.
Specifically, the step of the fusion operation in this embodiment includes:
s431, determining a first edge and a second edge to be fused;
s433, according to a vertex which is not connected with the first edge in the second vertex group of the second edge, performing a step-up operation on the first tensor of the first edge, and updating the first tensor by the stepped-up tensor;
s433, determining a corresponding element of each element in the first tensor in the second tensor of the second edge according to a corresponding relationship between the first vertex group and the second vertex group corresponding to the first tensor;
s434, traversing each element in the first tensor, and updating the element by the product of the element and its corresponding element in the second tensor;
s435, deleting the second edge, and connecting other vertexes of the second edge except the current vertex to the first edge.
For example, for an undirected graph, all vertices and their connecting edges are S 12 、S 16 、S 25 、S 3 、S 4 The fusion operation comprises the following steps:
for vertex 1, S 12 、S 16 Fuse into a new edge S 126 For its tensor A 126 Reduced to A 26 The corresponding edge becomes S 26 Delete vertex 1;
for vertex 2, the current connecting edge S 25 、S 26 Fuse into a new edge S 256 For its tensor A 256 Reduced order to A 56 Corresponding side S 56 Delete vertex 2;
for vertex 3, only edge S is connected 3 For its tensor A 3 Reduced order of A = x 3 (scalar quantity) in which the corresponding edge becomes an edge s having a tensor order of 0 3 Delete vertex 3;
for vertex 4, only edge S is connected 4 For its tensor A 4 Reduced order of A' = x 4 (scalar quantity) that the corresponding edge becomes an edge s of tensor order 0 4 Delete vertex 4;
for vertex 5, currently only edge S is connected 56 Invariant after fusion, tensor A for it 56 Reduced to A 6 Corresponding side S 6 Delete vertex 5;
for vertex 6, currently only edge S is connected 6 For its tensor A 6 Reduced order of A = x 6 (scalar quantity) in which the corresponding edge becomes an edge s having a tensor order of 0 6 Vertex 6 is deleted.
With reference to the undirected graph to be computed corresponding to the 1# quantum line in this embodiment, an exemplary description is given to how to determine the splitting times of the undirected graph to be computed according to the total amount of tensor elements that can be stored by the process:
the vertex preset sequence in the undirected graph to be computed corresponding to the 1# quantum wire is assumed to be V 1 、V 2 、…、V 13 The edge in the undirected graph to be calculated is S 12 、S 2367 、S 34 、S 56(10)(11) 、S 78(12)(13) 、S 9(10) 、S (11)(12) (wherein, the tensor order corresponding to each side is R 12 、R 2367 、R 34 、R 56(10)(11) 、R 78(12)(13) 、R 9(10) 、R (11)(12) ) In this embodiment, it is assumed that the number of elements of the determined tensor that can be stored by the process is 64 (this number is only required for the exemplary explanation in this embodiment, and is determined according to the foregoing step S300 in the actual application), so:
for vertex 1, the current connecting edge S 12 New edge S after fusion operation 12 Corresponding tensor is A 12 (number of tensor elements is 2 2 ) And updating the undirected graph to be calculated, wherein the sum of the number of tensor elements corresponding to all edges is as follows:
A 12 reduced to A 2 (the number of corresponding tensor elements is 2 1 = 2), the corresponding edge becomes S 2 Delete vertex 1;
for vertex 2, the current connecting edge S 2367 、S 2 New edge S after fusion operation 2367 Corresponding tensor is A 2367 (number of tensor elements is 2 4 ) And updating the undirected graph to be calculated, wherein the sum of the number of tensor elements corresponding to all edges is as follows:
A 2367 reduced to A 367 (number of tensor elements is 2 3 = 8), corresponding to the side S 367 Delete vertex 2;
for vertex 3, the current connecting edge S 367 、S 34 New edge S after fusion operation 3467 Corresponding tensor is A 3467 (number of tensor elements is 2 4 ) And updating the undirected graph to be calculated, wherein the sum of the number of tensor elements corresponding to all edges is as follows:
A 3467 reduced order to A 467 (number of tensor elements is 2 3 = 8), the corresponding edge becomes S 467 Delete vertex 3;
for vertex 4, currently only edge S is connected 467 New edge S after fusion operation 467 Corresponding tensor is A 467 (number of tensor elements is 2 3 ) And updating the undirected graph to be calculated, wherein the sum of the tensor element quantities corresponding to all edges is as follows:
A 467 reduced to A 67 (the number of tensor elements is 2 2 ) The corresponding edge becomes S 67 Delete vertex 4;
for vertex 5, the current connecting edge S 56(10)(11) New edge S after fusion operation 56(10)(11) Corresponding tensor is A 56(10)(11) (number of tensor elements is 2 4 ) And updating the undirected graph to be calculated, wherein the sum of the tensor element quantities corresponding to all edges is as follows:
A 56(10)(11) reduced to A 6(10)(11) (the number of tensor elements is 2 3 ) The corresponding edge becomes S 6(10)(11) Delete vertex 5;
for vertex 6, the current connecting edge S 6(10)(11) 、S 67 New edge S after fusion operation 67(10)(11) Corresponding to tensor A 67(10)(11) (number of tensor elements is 2 4 = 16), updating the undirected graph to be computed, where the sum of the number of tensor elements corresponding to all edges is:
A 67(10)(11) reduced to A 7(10)(11) (the number of tensor elements is 2 3 ) Corresponding side S 7(10)(11) Vertex 6 is deleted;
for vertex 7, the current connecting edge S 78(12)(13) 、S 7(10)(11) New edge S after fusion operation 78(10)(11)(12)(13) Corresponding to tensor A 78(10)(11)(12)(13) (number of tensor elements is 2 6 ) And updating the undirected graph to be calculated, wherein the sum of the tensor element quantities corresponding to all edges is as follows:
A 78(10)(11)(12)(13) reduced to A 8(10)(11)(12)(13) (number of tensor elements is 2 5 ) The corresponding edge becomes S 8(10)(11)(12)(13) Vertex 7 is deleted.
Since 72 is greater than 64, returning to the undirected graph to be computed updated after the edge fusion operation for vertex 6 connection, a deletion operation is performed for information of vertex 6 and the edge connected to vertex 6 (note: this deletion operation is different from the operation of deleting vertex after reduction in the foregoing step), and deterministic value reduction is performed for the edge connected to vertex 7, vertex 7 currently connecting edge S 78(12)(13) 、S 7(10)(11) After determining the value reduction, respectively is S 8(12)(13) 、 S (10)(11) At this time, the sum of the tensor element numbers corresponding to all edges is:
for vertex 8, the current connecting edge S 8(12)(13) New edge S after fusion operation 8(12)(13) Corresponding to tensor A 8(12)(13) (number of tensor elements is 2 2 ) And updating the undirected graph to be calculated, wherein the sum of the number of tensor elements corresponding to all edges is as follows:
A 8(12)(13) reduced to A (12)(13) (number of tensor elements is 2 2 ) The corresponding edge becomes S (12)(13) Vertex 8 is deleted;
for vertex 9, the current connecting edge S 9(10) New edge S after fusion operation 9(10) Corresponding to tensor A 9(10) (number of tensor elements)Is 2 2 ) And updating the undirected graph to be calculated, wherein the sum of the number of tensor elements corresponding to all edges is as follows:
A 9(10) reduced order to A (10) The corresponding edge becomes S (10) Delete vertex 9;
for vertex 10, the current connecting edge S (10)(11) 、S (10) New edge S after fusion operation (10)(11) Corresponding to tensor A (10)(11) (number of tensor elements is 2 2 ) And updating the undirected graph to be calculated, wherein the sum of the tensor element quantities corresponding to all edges is as follows:
A (10)(11) reduced to A (11) The corresponding edge becomes S (11) Delete vertex 10;
for vertex 11, the current connecting edge S (11) 、S (11)(12) New edge S after fusion operation (11)(12) Corresponding to tensor A (11)(12) (number of tensor elements is 2 2 ) And updating the undirected graph to be calculated, wherein the sum of the tensor element quantities corresponding to all edges is as follows:
A (11)(12) reduced to A (12) The corresponding edge becomes S (12) Delete vertex 11;
for vertex 12, the current connecting edge S (12) 、S (12)(13) New edge S after fusion operation (12)(13) Corresponding to tensor A (12)(13) (number of tensor elements is 2 2 ) And updating the undirected graph to be calculated, wherein the sum of the tensor element quantities corresponding to all edges is as follows:
A (12)(13) reduced to A (13) Corresponding side S (13) Delete vertex 12;
for vertex 13, the current connecting edge S (13) New edge S after fusion operation (13) Corresponding to tensor A (13) (the number of tensor elements is 2), updating the undirected graph to be calculated, wherein the sum of the number of the tensor elements corresponding to all edges is as follows:
A (13) reduced order of A = x 13 (scalar quantity) corresponding to the side S whose order of the side tensor is 0 (13) Vertex 13 is deleted.
Based on the above process, the splitting frequency of the undirected graph to be computed can be determined according to the execution frequency of the deletion operation, that is, the splitting frequency of the undirected graph to be computed corresponding to the quantum line example to be simulated provided by this embodiment is 1.
As a preferred implementation manner, the determining, according to the maximum order, the number of times of performing the merging operation on the edge in the undirected graph to be computed in S400 further includes, before step S430, the following steps:
s410, determining a first vertex and a last vertex of the undirected graph to be calculated according to the undirected graph to be calculated.
Specifically, the first vertex and the last vertex of the undirected graph to be computed are determined according to the undirected graph to be computed, and the initial state and the target quantum state component of the quantum bit related to the quantum line to be simulated during single-amplitude simulation computation each time, where the first vertex in the undirected graph of the quantum line to be simulated in this embodiment is V 1 、 V 5 、V 9 Last vertex V 4 、V 8 、V 13 。
And S420, respectively executing determined value reduction operation on the edge corresponding to the first vertex and the edge corresponding to the last vertex.
It should be noted that, the determined value reduction of the vertices and edges is substantially determined value reduction of the relevant tensor, and in the embodiment of the present application, the determined value reduction is performed according to the initial state of the qubit involved in the analog quantum circuit and the target quantum state component.
Specifically, the determined value of the tensor is reduced, that is, the corresponding element is determined in the original tensor according to the determined subscript value, and then the element of the tensor is updated to the determined corresponding element.
For example, the 4 th order tensor A 1234 With the index 2 being determined to be 0, then from A 1234 Find the element with subscript 2 having a value of 0: the first (0000) 2 、(0001) 2 、(0010) 2 、(0011) 2 、(1000) 2 、(1001) 2 、 (1010) 2 、(1011) 2 Bit elements, these numbering minus the second digit in the subscript being (000) 2 、(001) 2 、(010) 2 、 (011) 2 、(100) 2 、(101) 2 、(110) 2 、(111) 2 They form a new 3 rd order tensor A 134 This operation is a deterministic value reduction.
The reduction of the edges in the undirected graph in the present application is essentially the reduction of the tensors of the opposite edges, and is not described in detail in the present application.
In this embodiment, the edge corresponding to the first vertex in the undirected graph of the quantum wire to be simulated is S 12 、S 56(10)(11) 、S 9(10) Assume that the initial state of the involved qubit is |000>I.e. vertex V 1 、V 5 、V 9 Are all |0>To S 12 、S 56(10)(11) 、S 9(10) Respectively executing definite value reducing operation, the new edge after reducing is S 2 、S 6(10)(11) 、 S (10) ；
The edge corresponding to the last vertex is S 34 、S 78(12)(13) The target quantum state component is |101>I.e. V 4 、V 8 、V 13 Respectively correspond to |1>、|0>、|1>To S to 34 、S 78(12)(13) Respectively executing definite value reducing operation, the new edge after reducing is S 3 、S 7(12) ；
Performing deterministic value reduction operation on the edge corresponding to the first vertex and the edge corresponding to the last vertex respectively, wherein the tensor order of the edge which is connected by the edges connected by the vertices in the undirected graph of the quantum line to be simulated in table 1 changes, which is specifically shown in table 2:
TABLE 2 tensor order of edges connected urgently to each vertex in the undirected graph to be computed after performing deterministic value reduction
Note: the tensor order of the connected edges is arranged in the table.
In the present embodiment, the undirected graph to be computed can be optimized through S410 to S420, and then the resource condition that is needed the lowest when the optimized undirected graph is used for performing the simulated quantum computation is determined through S430 to S470, and the fusion process refers to the above exemplary description.
And S500, determining resources required by single-amplitude analog quantum calculation according to the splitting times of the undirected graph to be calculated.
Specifically, if the splitting frequency of the undirected graph to be calculated is N, the resource required by the computation of the single-amplitude analog quantum is 2 N Therefore, the resource required for performing single-amplitude analog quantum computation by using the quantum wire example to be simulated provided in this embodiment is 2 processes.
In this embodiment, a quantum line to be simulated and a configured process are acquired, an undirected graph corresponding to the quantum line to be simulated is constructed, the total amount of tensor elements which can be stored by the process is determined according to parameter information of the process and data types of the tensor elements, the splitting times of the undirected graph to be calculated is determined according to the total amount of the tensor elements, and finally, resources required by calculation of a single-amplitude simulated quantum are determined according to the splitting times of the undirected graph to be calculated, so that the resources required by calculation of the single-amplitude simulated quantum can be estimated in advance during single-amplitude simulation.
Referring to fig. 5, fig. 5 is a schematic structural diagram of a system for predicting resources required for single-amplitude analog quantum computation according to an embodiment of the present invention, which corresponds to the flow shown in fig. 2, and this embodiment further provides a system for predicting resources required for single-amplitude analog quantum computation, including:
an obtaining module 601, configured to obtain a quantum line to be simulated and a configured process;
a constructing module 602, configured to construct a corresponding undirected graph according to the quantum line to be simulated; wherein, the vertex of the undirected graph represents the quantum state of the operated quantum bit before or after the operation of the quantum logic gate, and the edge of the undirected graph represents tensor;
a tensor element determining module 603, configured to determine, according to the parameter information of the process and the data type of the tensor element, a total amount of tensor elements that can be stored by the process;
a splitting frequency determining module 604, configured to determine, according to the total amount of the tensor elements, a splitting frequency of the undirected graph to be calculated;
and the calculation resource determining module 605 is configured to determine resources required by single-amplitude analog quantum calculation according to the splitting times of the undirected graph to be calculated.
An embodiment of the present invention further provides a storage medium, where a computer program is stored in the storage medium, where the computer program is configured to execute the steps in any of the above method embodiments when the computer program runs.
Specifically, in the present embodiment, the storage medium may be configured to store a computer program for executing the steps of:
s100, acquiring a quantum line to be simulated and a configuration process;
s200, constructing a corresponding undirected graph according to the quantum wires to be simulated; wherein, the vertex of the undirected graph represents the quantum state of the operated quantum bit before or after the operation of the quantum logic gate, and the edge of the undirected graph represents the tensor;
s300, determining the total amount of tensor elements which can be stored by the process according to the parameter information of the process and the data type of the tensor elements;
s400, determining the splitting times of the undirected graph to be calculated according to the total amount of the tensor elements;
and S500, determining resources required by single-amplitude analog quantum calculation according to the splitting times of the undirected graph to be calculated.
An embodiment of the present invention further provides an electronic apparatus, which includes a memory and a processor, where the memory stores a computer program, and the processor is configured to execute the computer program to perform the steps in any one of the method embodiments described above.
Specifically, the electronic apparatus may further include a transmission device and an input/output device, wherein the transmission device is connected to the processor, and the input/output device is connected to the processor.
Specifically, in this embodiment, the processor may be configured to execute the following steps by a computer program:
s100, acquiring a quantum line to be simulated and a configuration process;
s200, constructing a corresponding undirected graph according to the quantum wires to be simulated; wherein, the vertex of the undirected graph represents the quantum state of the operated quantum bit before or after the operation of the quantum logic gate, and the edge of the undirected graph represents tensor;
s300, determining the total amount of tensor elements which can be stored by the process according to the parameter information of the process and the data type of the tensor elements;
s400, determining the splitting times of the undirected graph to be calculated according to the total amount of the tensor elements;
and S500, determining resources required by single-amplitude analog quantum calculation according to the splitting times of the undirected graph to be calculated.
Claims (10)
1. A method for predicting resources required by single-amplitude analog quantum computation is characterized by comprising the following steps:
acquiring a quantum line to be simulated and a configuration process;
determining corresponding vertexes and edges according to the types of all quantum logic gates in the quantum circuit to be simulated and the form of the unitary matrix, and adding the vertexes and the edges to construct a corresponding undirected graph to be calculated; wherein, the vertex of the undirected graph represents the quantum state of the operated quantum bit before or after the operation of the quantum logic gate, and the edge of the undirected graph represents tensor;
determining the total amount of tensor elements which can be stored by the process according to the parameter information of the process and the data type of the tensor elements;
determining the splitting times of the undirected graph to be calculated according to the sum of the total tensor elements and tensor elements corresponding to all edges of the undirected graph to be calculated and updated after splitting;
and determining resources required by the computation of the single-amplitude analog quantum according to the splitting times of the undirected graph to be computed.
2. The method of claim 1, wherein the determining the corresponding vertices and edges according to the types of the quantum logic gates in the quantum lines to be simulated and the unitary matrix form, and adding the vertices and the edges to construct the corresponding undirected graph to be computed comprises:
analyzing the quantum circuit to be simulated to obtain a linked list for recording the information of the quantum circuit to be simulated;
traversing the linked list, and creating an edge with a tensor order of 1 when the type of the quantum logic gate in the linked list is a first single quantum logic gate; wherein the edge is connected with the last vertex of the corresponding vertex chain of the quantum bit operated by the first single quantum logic gate, and the unitary matrix of the first single quantum logic gate is a diagonal matrix;
when the type of the quantum logic gate in the linked list is a second single quantum logic gate, creating an edge with the tensor order of 2 and a vertex connected with the edge; wherein the edge is connected with the last vertex of the corresponding vertex chain of the quantum bit operated by the second single quantum logic gate, and the unitary matrix of the second single quantum logic gate is a non-diagonal matrix;
when the type of the quantum logic gate in the linked list is a first double quantum logic gate, creating an edge with the tensor order of 2; the edge is connected with the last vertex in the vertex chain respectively corresponding to the two quantum bits operated by the first double-quantum logic gate, and the unitary matrix of the first double-quantum logic gate is a diagonal matrix;
when the type of the quantum logic gate in the linked list is a second double-quantum logic gate, creating an edge with the tensor order of 4 and two vertexes connected with the edge; the edge is connected with the last vertex in the vertex chains respectively corresponding to the two quantum bits operated by the second double-quantum logic gate, and the unitary matrix of the second double-quantum logic gate is a non-diagonal matrix;
and obtaining the undirected graph to be calculated corresponding to the quantum line to be simulated.
3. The method for estimating resources required for single-amplitude simulated quantum computation according to claim 1, wherein the determining the total amount of tensor elements that the process can store according to the parameter information of the process and the data type of the tensor elements comprises:
determining memory resources used for single-amplitude quantum simulation calculation in a single process according to the parameter information of the process;
determining the memory required by each element of the tensor according to the data type expressing the tensor element;
and determining the total amount of tensor elements which can be stored by the process according to the memory resources and the memory required by each element.
4. The method of claim 3, wherein the method comprises:
if the memory resource used for single-amplitude quantum simulation calculation in a single process is mM and the data type representing the tensor element is the Float type, the total amount of the tensor elements which can be stored by the process is m multiplied by 1024/8;
if the memory resource used for single-amplitude quantum simulation calculation in a single process is mM and the data type representing tensor elements is Double type, the total amount of tensor elements which can be stored in the process is m × 1024 × 1024/16, wherein m is any positive number.
5. The method for estimating resources required by single-amplitude simulated quantum computation according to claim 1, wherein determining the splitting times of the undirected graph to be computed according to the total amount of tensor elements and the sum of tensor elements corresponding to all edges of the undirected graph updated after splitting comprises:
according to a preset sequence, obtaining information of edges connected with each vertex in the undirected graph to be calculated;
executing fusion operation on the edges connected with the current vertex according to the information of the edges connected with the current vertex;
after the edges connected with the current vertex execute the fusion operation, updating the undirected graph to be calculated;
judging whether the sum of the number of tensor elements corresponding to all edges in the undirected graph to be calculated is greater than the total number of tensor elements which can be stored by the process;
if the number of the elements of the tensor which can be stored by the process is not larger than the total number of the elements of the tensor which can be stored by the process, executing value determination reduction on the edges connected with the current vertex, taking the next vertex as the current vertex, returning and executing the information of the edges connected according to the current vertex, and executing the step of executing the fusion operation on the edges connected with the current vertex;
if the total quantity of the elements of the tensor which can be stored by the process is larger than the total quantity of the elements of the tensor which can be stored by the process, returning the undirected graph to be calculated which is updated last time, executing deletion operation on each vertex before the current vertex and information of edges connected with each vertex before the current vertex, executing definite value reduction on the edges connected with the current vertex, taking the next vertex as the current vertex, returning and executing the information of the edges connected according to the current vertex, and executing fusion operation on the edges connected with the current vertex;
and determining the splitting times of the undirected graph to be calculated according to the execution times of the deleting operation.
6. The method of estimating resources required for single-amplitude simulated quantum computation according to claim 5, wherein the determining the number of times of splitting the undirected graph to be computed according to the total number of tensor elements and a sum of tensor elements corresponding to all edges of the undirected graph updated after splitting further comprises:
before the information of the edges connected with the vertexes in the undirected graph to be calculated is obtained according to the preset sequence, determining a first vertex and a last vertex of the undirected graph to be calculated according to the undirected graph to be calculated;
and respectively executing determined value reduction operation on the edge connected with the first vertex and the edge connected with the last vertex.
7. The method of estimating resources required for single-amplitude analog quantum computing as claimed in claim 5, wherein the step of fusing comprises:
determining a first edge and a second edge to be fused;
according to a vertex which is not connected with the first edge in a second vertex group of the second edge, performing step-up operation on a first tensor of the first edge, and updating the first tensor by the raised tensor;
determining a corresponding element of each element in the first tensor in a second tensor of the second edge according to a corresponding relation between a first vertex group corresponding to the first tensor and the second vertex group;
traversing each element in the first tensor to update the element by its product with its corresponding element in the second tensor;
deleting the second edge and connecting other vertices of the second edge except the current vertex to the first edge.
8. A system for predicting resources required for single-amplitude analog quantum computing, comprising:
the acquisition module is used for acquiring the quantum line to be simulated and the configured process;
the building module is used for determining corresponding vertexes and edges according to the types of all quantum logic gates in the quantum circuit to be simulated and the form of the unitary matrix, and adding the vertexes and the edges to build a corresponding undirected graph to be calculated; wherein, the vertex of the undirected graph represents the quantum state of the operated quantum bit before or after the operation of the quantum logic gate, and the edge of the undirected graph represents the tensor;
a tensor element determining module, configured to determine, according to the parameter information of the process and the data type of the tensor elements, a total amount of tensor elements that can be stored in the process;
the splitting frequency determining module is used for determining the splitting frequency of the undirected graph to be calculated according to the total tensor elements and the sum of tensor elements corresponding to all edges of the undirected graph to be calculated, which are updated after splitting;
and the calculation resource determining module is used for determining resources required by the single-amplitude analog quantum calculation according to the splitting times of the undirected graph to be calculated.
9. A storage medium, in which a computer program is stored, wherein the computer program is arranged to perform the method of any of claims 1 to 7 when executed.
10. An electronic device comprising a memory and a processor, wherein the memory has stored therein a computer program, and wherein the processor is arranged to execute the computer program to perform the method of any of claims 1 to 7.
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