CN113126110A - Device and method for detecting arrival time of acoustic echo - Google Patents
Device and method for detecting arrival time of acoustic echo Download PDFInfo
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- CN113126110A CN113126110A CN202110668281.8A CN202110668281A CN113126110A CN 113126110 A CN113126110 A CN 113126110A CN 202110668281 A CN202110668281 A CN 202110668281A CN 113126110 A CN113126110 A CN 113126110A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S17/00—Systems using the reflection or reradiation of electromagnetic waves other than radio waves, e.g. lidar systems
- G01S17/02—Systems using the reflection of electromagnetic waves other than radio waves
- G01S17/06—Systems determining position data of a target
- G01S17/08—Systems determining position data of a target for measuring distance only
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
- G01S7/52—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S15/00
- G01S7/539—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S15/00 using analysis of echo signal for target characterisation; Target signature; Target cross-section
Abstract
The embodiment of the specification provides a device and a method for detecting the arrival time of an acoustic echo, wherein the device comprises: a first voltage detection circuit and a second voltage detection circuit; the input end of the first voltage detection circuit and the input end of the second voltage detection circuit are used for inputting target electric signals corresponding to the acoustic echo to be detected; the output end of the first voltage detection circuit is connected with the enable end of the second voltage detection circuit; the first voltage detection circuit is used for detecting whether the voltage value of the target electric signal reaches a preset voltage threshold value or not and enabling the second voltage detection circuit to work when the voltage value of the target electric signal reaches the voltage threshold value; after the second voltage detection circuit works, detecting whether the voltage value of the target electric signal is zero or not, and outputting a voltage jump signal when the voltage value is zero for the first time; the output time of the voltage jump signal is used for calculating the arrival time of the acoustic echo. Through the embodiment, the arrival time of the acoustic echo can be accurately measured, and the detection circuit is simpler than that of the existing method.
Description
Technical Field
The present invention relates to the field of acoustic ranging technologies, and in particular, to a device and a method for detecting an arrival time of an acoustic echo.
Background
Currently, ranging can be achieved by ultrasound. The principle of ultrasonic ranging is that an ultrasonic signal is transmitted to a measured object, an acoustic echo returned by the measured object is received, the time difference between the moment of transmitting the ultrasonic signal and the moment of receiving the acoustic echo, which is also called flight time, is calculated, and the distance of the measured object is calculated according to the flight time.
At present, after an acoustic echo is acquired, the flight time is mainly calculated by a digital logic device in a digital signal processing (correlation algorithm, maximum energy wave extraction) mode and the like, or a certain threshold voltage is set at an echo receiving device, and the flight time is determined by the moment when the echo amplitude reaches the threshold voltage.
Disclosure of Invention
An object of the embodiments of the present disclosure is to provide a device and a method for detecting an arrival time of an acoustic echo, so as to simply and accurately calculate the arrival time of the acoustic echo, thereby improving convenience and accuracy of calculating a flight time.
To solve the above technical problem, one or more embodiments of the present specification are implemented as follows:
in a first aspect, an embodiment of the present specification provides an apparatus for detecting arrival time of an acoustic echo, including:
a first voltage detection circuit and a second voltage detection circuit;
the input end of the first voltage detection circuit and the input end of the second voltage detection circuit are both used for inputting a target electric signal corresponding to the acoustic echo to be detected;
the output end of the first voltage detection circuit is connected with the enabling end of the second voltage detection circuit;
the first voltage detection circuit is used for detecting whether the voltage value of the target electric signal reaches a preset voltage threshold value or not and enabling the second voltage detection circuit to work when the voltage value of the target electric signal reaches the voltage threshold value;
after the second voltage detection circuit works, detecting whether the voltage value of the target electric signal is zero or not, and outputting a voltage jump signal when the voltage value of the target electric signal is zero for the first time;
wherein the output time of the voltage jump signal is used for calculating the arrival time of the acoustic echo.
In a second aspect, another embodiment of the present specification provides a method for detecting an arrival time of an acoustic echo, including:
acquiring the output time of the voltage jump signal output by the acoustic echo arrival time detection device according to the first aspect and acquiring the frequency of the target electrical signal;
determining the number of cycles of a target characteristic point in the target electric signal; the target characteristic point is a corresponding characteristic point when the voltage value of the target electric signal is changed to zero for the first time after reaching the voltage threshold;
and determining the arrival time of the acoustic echo according to the periodicity, the frequency of the electric signal and the output time of the voltage jump signal.
The device and the method for detecting the arrival time of the acoustic echo provided by one or more embodiments of the present disclosure can detect whether the voltage value of the target electrical signal corresponding to the acoustic echo to be detected reaches the voltage threshold value by using the first voltage detection circuit and the second voltage detection circuit, detect whether the voltage value of the target electrical signal is zero after the voltage threshold value is reached, and output a voltage jump signal when the voltage value is zero for the first time, where the output time of the voltage jump signal is used to calculate the arrival time of the acoustic echo. It can be seen that, through this embodiment, the arrival time of the acoustic echo can be calculated through the device having the first voltage detection circuit and the second voltage detection circuit, the device has a simple structure, has no special requirement for the signal-to-noise ratio of the target electrical signal, and can process the echo electrical signal without delay, so that the arrival time of the acoustic echo can be simply and accurately calculated, and the convenience and the accuracy of calculating the flight time can be improved.
Drawings
In order to more clearly illustrate the embodiments of the present disclosure or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, it is obvious that the drawings in the following description are only some embodiments described in the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts;
fig. 1 is a schematic structural diagram of an acoustic echo arrival time detection apparatus provided in an embodiment of the present disclosure;
fig. 2 is a schematic diagram of a first voltage detection circuit according to an embodiment of the present disclosure;
fig. 3 is a schematic structural diagram of an acoustic echo arrival time detection apparatus according to another embodiment of the present disclosure;
fig. 4 is a schematic voltage waveform diagram of an acoustic echo arrival time detection apparatus provided in an embodiment of the present disclosure;
fig. 5 is a schematic flowchart of a method for detecting an arrival time of an acoustic echo according to an embodiment of the present disclosure.
Reference numerals:
11-a first voltage detection circuit, 12-a second voltage detection circuit, 111-a first voltage detection circuit input, 112-a first voltage detection circuit output, 113-a first comparator, 114-a first flip-flop, 121-a second voltage detection circuit input, 122-a second voltage detection circuit enable, 123-a second comparator, 124-a second flip-flop, 1131-a first comparator positive phase input, 1132-a first comparator negative phase input, 1133-a first comparator positive phase output, 1231-a second comparator positive phase input, 1232-a second comparator negative phase input, 1233-a second comparator negative phase output.
Detailed Description
In order to make those skilled in the art better understand the technical solution of the present invention, the technical solution in the embodiment of the present invention will be clearly and completely described below with reference to the drawings in the embodiment of the present invention, and it is obvious that the described embodiment is only a part of the embodiment of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Fig. 1 is a schematic structural diagram of an acoustic echo arrival time detection apparatus provided in an embodiment of the present disclosure, and as shown in fig. 1, the acoustic echo detection apparatus includes a first voltage detection circuit 11 and a second voltage detection circuit 12, 111 is an input terminal of the first voltage detection circuit, 112 is an output terminal of the first voltage detection circuit, 121 is an input terminal of the second voltage detection circuit, and 122 is an enable terminal of the second voltage detection circuit;
the input end 111 of the first voltage detection circuit 11 and the input end 121 of the second voltage detection circuit 12 are both used for inputting a target electrical signal corresponding to an acoustic echo to be detected;
the output end 112 of the first voltage detection circuit 11 is connected with the enable end 122 of the second voltage detection circuit 12;
the first voltage detection circuit 11 is configured to detect whether a voltage value of the target electrical signal reaches a preset voltage threshold, and enable the second voltage detection circuit 12 to operate when the voltage value reaches the voltage threshold;
after the second voltage detection circuit 12 works, detecting whether the voltage value of the target electrical signal is zero, and outputting a voltage jump signal when the voltage value of the target electrical signal is zero for the first time; the output time of the voltage jump signal is used for calculating the arrival time of the acoustic echo.
In this embodiment, whether the voltage value of the target electrical signal corresponding to the acoustic echo to be detected reaches the voltage threshold can be detected by using the first voltage detection circuit and the second voltage detection circuit, and after the voltage value reaches the voltage threshold, whether the voltage value of the target electrical signal is zero is detected, and when the voltage value is zero for the first time, the voltage jump signal is output, and the output time of the voltage jump signal is used for calculating the arrival time of the acoustic echo. Therefore, according to the embodiment, the arrival time of the acoustic echo can be calculated through the device with the first voltage detection circuit and the second voltage detection circuit, the device is simple in structure, and has no requirement on the signal-to-noise ratio of the target electric signal, so that the arrival time of the acoustic echo can be simply and accurately calculated, and the convenience and the accuracy of calculating the flight time are improved.
In one embodiment, the first voltage detection circuit includes a first comparator and a first flip-flop;
a first input end of the first comparator is used for inputting a target electric signal, and a second input end of the first comparator is used for accessing a voltage threshold signal corresponding to a voltage threshold;
the first output end of the first comparator is connected with the first input end of the first trigger, and the first output end of the first trigger is connected with the enabling end of the second voltage detection circuit.
When the first comparator detects that the voltage value of the target electric signal reaches the voltage threshold value, a first output end of the first comparator outputs a first voltage signal; the first voltage signal may be a high level signal.
When the first input end of the first trigger receives the first voltage signal, the first output end of the first trigger outputs an enable signal for triggering the second voltage detection circuit. The enable signal may be a high level signal.
In one case, the first input terminal of the first comparator is a positive phase input terminal, the second input terminal of the first comparator is an inverted phase input terminal, and the first output terminal of the first comparator is a positive phase output terminal. The first input end of the first trigger is a clock end. The first output end of the first trigger is an inverted output end.
Fig. 2 is a schematic diagram of a first voltage detection circuit according to an embodiment of the present disclosure, and as shown in fig. 2, the first voltage detection circuit 11 includes a first comparator 113 and a first flip-flop 114.
The first comparator comprises a positive phase input end 1131, an inverse phase input end 1132 and a positive phase output end 1133, the positive phase input end 1131 of the first comparator 113 is used for inputting a target electrical signal corresponding to a to-be-detected acoustic echo, the inverse phase input end 1132 of the first comparator 113 is used for accessing a preset voltage threshold signal, the voltage threshold signal is realized by an adjustable power supply with adjustable voltage, and the positive phase output end 1133 of the first comparator 113 is connected with a clock end of the first trigger. The non-inverting output terminal 1133 of the first comparator 113 outputs a low level when the voltage of the target electrical signal is less than the voltage threshold, and the non-inverting output terminal 1133 of the first comparator 113 outputs a high level when the voltage of the target electrical signal is greater than the voltage threshold.
The first flip-flop 114 may be a D flip-flop, and the first flip-flop 114 includes: PR end is the set end, D end is the signal input end, CLK end is the clock end, CLR end is the clear end, Q end is the reverse output end, Q end is the normal output end. The set end of the first flip-flop 114 is connected to an enable signal source, the clear end of the first flip-flop 114 is connected to a high level signal, the signal input end of the first flip-flop 114 is grounded, and the inverted output end of the first flip-flop 114 is connected to the enable end of the second voltage detection circuit. When the set terminal of the first flip-flop 114 is not connected to the enable signal, the inverted output terminal of the first flip-flop 114 continuously outputs a low level signal, and the output signal of the inverted output terminal of the first flip-flop 114 is not affected by the input signal of the clock terminal, after the set terminal of the first flip-flop 114 is connected to the enable signal, if a transition signal from a low level to a high level is input to the clock terminal of the first flip-flop 114, the inverted output terminal of the first flip-flop 114 outputs a high level. The enable signal of the first flip-flop 114 may be high or low.
In this embodiment, the first voltage detection circuit specifically works when the voltage of the target electrical signal received by the non-inverting input terminal 1131 of the first comparator 113 is changed from being smaller than the voltage threshold received by the inverting input terminal 1132 of the first comparator 113 to being larger than the voltage threshold, and the voltage output by the non-inverting output terminal 1133 of the first comparator 113 to the clock terminal of the first flip-flop 114 is changed from low level to high level, so that the inverting output terminal of the first flip-flop outputs high level to the enable terminal of the second voltage detection circuit.
In one embodiment, the second voltage detection circuit 12 includes a second comparator 123 and a second flip-flop 124;
the first input end of the second comparator is used for inputting a target electric signal, and the second input end of the second comparator is grounded;
the first output end of the second comparator is connected with the first input end of the second trigger, the output end of the first voltage detection circuit is connected with the enabling end of the second trigger, and the first output end of the second trigger is used for outputting a voltage jump signal.
When the second comparator detects that the voltage value of the target electric signal is zero, a first output end of the second comparator outputs a second voltage signal; the second voltage signal may be a high level signal.
After the second trigger is enabled, when the first input end of the second trigger receives the second voltage signal, the first output end of the second trigger outputs a voltage jump signal. The voltage jump signal may be a jump signal changed from a high level to a low level.
In one case, the first input terminal of the second comparator is a positive phase input terminal; the second input end of the second comparator is an inverting input end; the first output end of the second comparator is an inverted output end;
the first input end of the second trigger is a clock end; the enabling end of the second trigger is a setting end; the first output end of the second trigger is a positive phase output end.
Fig. 3 is a schematic structural diagram of an acoustic echo arrival time detection apparatus according to another embodiment of the present disclosure, and as shown in fig. 3, the second voltage detection circuit 12 includes a second comparator 123 and a second flip-flop 124. The second comparator comprises a positive phase input end 1231, an inverse phase input end 1232 and an inverse phase output end 1233, the positive phase input end 1231 of the second comparator 123 is used for inputting a target electrical signal corresponding to the acoustic echo to be detected, the inverse phase input end 1232 of the second comparator 123 is grounded, and the inverse phase output end 1233 of the second comparator 123 is connected to the clock end of the second flip-flop 124. The inverting output terminal 1233 of the second comparator 123 outputs a low level when the voltage of the target electrical signal is greater than 0V, and the inverting output terminal 1233 of the second comparator 123 outputs a high level when the voltage of the target electrical signal is less than 0V.
The second flip-flop 124 may be a D flip-flop, and the second flip-flop 124 includes: PR end is the set end, D end is the signal input end, CLK end is the clock end, CLR end is the clear end, Q end is the reverse output end, Q end is the normal output end. The set terminal of the second flip-flop 124, i.e., the second voltage detection circuit enable terminal 122, is connected to the output terminal 112 of the first voltage detection circuit, the clear terminal of the second flip-flop 124 is connected to the high level signal, and the signal input terminal of the second flip-flop 124 is grounded. When the first voltage detection circuit 11 outputs a low level signal to the set terminal of the second flip-flop 124, the non-inverting output terminal of the second flip-flop 124 continues to output a high level signal, and the output signal of the non-inverting output terminal of the second flip-flop 124 is not affected by the input signal of the clock terminal, after the first voltage detection circuit 11 outputs a high level signal to the set terminal of the second flip-flop 124, if a transition signal from a low level to a high level is input to the clock terminal of the second flip-flop 124, the non-inverting output terminal of the second flip-flop 124 outputs a low level.
In this embodiment, the specific operation process of the second voltage detection circuit is that, when the first voltage detection circuit 11 inputs a high level to the enable terminal 122 of the second voltage detection circuit 12, that is, to the set terminal of the second flip-flop 124, the second voltage detection circuit 12 enters the detection state, and after the detection state, when the voltage of the target electrical signal changes from greater than 0V to less than 0V, the voltage output from the inverting output terminal 1233 of the second voltage comparator 123 to the second flip-flop changes from a low level to a high level, which causes the output voltage at the non-inverting output terminal of the second flip-flop 124 to change from the high level to the low level, and the time when the output voltage at the non-inverting output terminal of the second flip-flop 124 jumps is taken as the time when the voltage of the target electrical signal is equal to zero, that is, when the voltage value of the target electrical signal first changes to zero after reaching the voltage threshold, according to the, the arrival time of the acoustic echo can be calculated.
In this embodiment, the time when the output voltage of the inverting output terminal of the second flip-flop jumps from low level to high level is the same as the time when the output voltage of the non-inverting output terminal of the second flip-flop jumps from high level to low level, so the arrival time of the acoustic echo can also be determined from the time when the output voltage of the inverting output terminal of the second flip-flop jumps from low level to high level.
Fig. 4 is a voltage waveform diagram of the acoustic echo arrival time detection apparatus according to an embodiment of the present disclosure, and as shown in fig. 4, the voltage waveform includes a target electrical signal waveform converted by an acoustic echo, a waveform output by a positive phase output terminal of a first comparator, a waveform output by a negative phase output terminal of a second comparator, and a waveform output by a positive phase output terminal of a second trigger, where a voltage of a first characteristic point is a voltage threshold, when the target electrical signal voltage is smaller than the voltage threshold, the positive phase output terminal of the first comparator outputs a low level, when the target electrical signal voltage is greater than the voltage threshold, the positive phase output terminal of the first comparator outputs a high level, when the target electrical signal voltage is smaller than 0V, the negative phase output terminal of the second comparator outputs a high level, when the target electrical signal voltage is greater than 0V, the negative phase output terminal of the second comparator outputs a low level, when the voltage input by the inverting input end of the second comparator is input, the output signals of the first comparator and the second comparator repeatedly jump, because the output of the trigger changes after the clock end of the trigger receives a first voltage jump signal from low to high, and the output of the trigger does not change after the first voltage jump signal, the circuit function is not affected by subsequent voltage jump caused by noise interference, the positive phase output end of the second trigger continuously outputs high level before the target electric signal reaches the first zero point after the voltage threshold value, namely the second characteristic point, and the positive phase output end of the second trigger outputs low level after the target electric signal reaches the second characteristic point, namely the output voltage of the positive phase output end of the second trigger jumps at the second characteristic point.
In one embodiment, the acoustic echo arrival time detection device includes a voltage detection circuit that is divided into a circuit disabled state and a circuit enabled state. In the circuit disabled state, the second voltage detection circuit always outputs a high level, and in the circuit enabled state, the falling edge of the circuit, namely the voltage jumps from the high level to a low level, which indicates that a certain specific zero-crossing time in the target electric signal is successfully identified and locked, wherein the zero-crossing time refers to the time when the voltage of the target electric signal is zero;
in this embodiment, the circuit is disabled when the external enable signal is at a low level, and the circuit is enabled when the external enable signal is at a high level.
In the circuit forbidden state, the enabling signal is connected with the setting end of the first trigger and outputs low level, the zero clearing end of the first trigger is always connected with high level, according to the characteristics of the trigger, the first trigger is in the setting state, namely the output of the first trigger is not influenced by the input signal of the clock end of the first trigger, the positive phase output end of the first trigger outputs high level, and the negative phase output end of the first trigger outputs low level. The setting end of the second trigger is connected with the inverted output end of the first trigger, the output voltage of the inverted output end of the first trigger is low level, the zero clearing end of the second trigger is always connected with high level, according to the characteristics of the triggers, the second trigger is in a setting state, namely the output of the second trigger is not influenced by the input signal of the clock end of the second trigger, the positive phase output end of the second trigger outputs high level, and the inverted output end of the second trigger outputs low level. In summary, the positive phase output terminal of the second flip-flop always outputs a high level when the circuit is in the disabled state.
In the circuit enabling state, an enabling signal is connected with a setting end of the first trigger and outputs a high level, a zero clearing end of the first trigger is always connected with the high level, and the first trigger is in a working mode, namely the output voltages of a positive phase output end and a reverse phase output end of the first trigger are influenced by the input voltage of the clock end. The positive phase input end of the first comparator is connected with a target electric signal, the negative phase input end of the first comparator is connected with a voltage threshold signal, when the voltage of the target electric signal is smaller than the voltage threshold, the first comparator outputs low level, and the negative phase output end of the first trigger outputs low level. The second trigger is still in the setting state, that is, the output of the second trigger is not affected by the clock input signal, the positive phase output terminal of the second trigger outputs high level, when the target electrical signal is greater than the voltage threshold, the positive phase output terminal voltage of the first comparator changes from low level to high level, the inverted phase output terminal output voltage of the first trigger changes to high level, the second trigger changes to the working mode, that is, the output voltages of the positive phase output terminal and the inverted phase output terminal of the second trigger are affected by the clock input voltage, after that, when the target voltage signal changes from greater than 0V to less than 0V, the inverted phase output terminal output voltage of the second comparator changes from low level to high level, the positive phase output terminal output voltage of the second trigger changes from high level to low level, according to the output voltage transition time of the second trigger, that is, the voltage value of the target electrical signal first becomes zero after reaching the voltage threshold, the arrival time of the acoustic echo can be calculated from the output time of the voltage jump signal.
When the voltage of the target electrical signal is changed from being smaller than the voltage threshold to being larger than the voltage threshold, the voltage of the target electrical signal is influenced by noise, the voltage of the target electrical signal can be repeatedly changed near the voltage threshold, so that the output voltage of the positive phase output end of the first comparator is repeatedly changed between a high level and a low level, but the output voltage of the first trigger is only influenced by a signal which is output by the positive phase output end of the first comparator and is changed from the low level to the high level for the first time, and the subsequent jump voltage output by the first comparator does not influence the first trigger any more; when the voltage of the target electric signal is changed from more than 0V to less than 0V, the target electric signal is influenced by noise, the voltage of the target electric signal can be repeatedly changed near 0V, so that the output voltage of the positive phase output end of the second comparator is repeatedly changed between a high level and a low level, but the output voltage of the second trigger is only influenced by a signal which is output by the negative phase output end of the second comparator and is changed from the low level to the high level for the first time, and the subsequent voltage jump output by the second comparator does not influence the second trigger any more.
The acoustic echo arrival time detection device is described above, and an acoustic echo arrival time detection method based on the acoustic echo arrival time detection device is described below.
Fig. 5 is a schematic flowchart of a method for detecting an arrival time of an acoustic echo according to an embodiment of the present disclosure, where, as shown in fig. 5, the flowchart includes:
step S502, obtaining the output time of the voltage jump signal output by the acoustic echo arrival time detection device and obtaining the frequency of a target electric signal;
step S504, determining the number of cycles of the target characteristic point in the target electrical signal; the target characteristic point is a corresponding characteristic point when the voltage value of the target electric signal becomes zero for the first time after reaching the voltage threshold;
and step S506, determining the arrival time of the acoustic echo according to the cycle number, the frequency of the target electric signal and the output time of the voltage jump signal.
In step S502, the output time at which the acoustic echo arrival time detection device outputs the voltage jump signal and the frequency of the target electrical signal are obtained. Specifically, the output time of the voltage jump signal is obtained by connecting a timer for monitoring the voltage jump signal to the output end of the detection device. And transmitting a test sound wave with the same frequency as the transmitted sound wave, acquiring a sound echo of the test sound wave, converting the sound echo into an electric signal, inputting the electric signal into frequency measurement equipment, and acquiring the frequency as the frequency of the target electric signal.
In step S504, determining the number of cycles of the target feature point in the target electrical signal; the target characteristic point is a characteristic point corresponding to zero when the voltage value of the target electric signal first becomes zero after reaching the voltage threshold. The process of determining the number of cycles is to determine the number of cycles that the target feature point in the target electrical signal is in the target electrical signal according to the number of cycles that the voltage threshold is in the target electrical signal. In one embodiment, the voltage threshold is in the rising edge of the 3 rd period of the target electrical signal, and the voltage threshold is greater than 0V, the target characteristic point is a corresponding characteristic point when the voltage value of the target electrical signal first becomes zero after reaching the voltage threshold, and since the waveform of the electrical signal converted by the acoustic echo is similar to a sine wave, the number of periods of the characteristic point in the target electrical signal can be determined to be 3.5 according to the characteristics of the sine wave and the period of the voltage threshold.
The method for determining the voltage threshold specifically includes:
(a1) transmitting a test sound wave with the same frequency and the same voltage amplitude as the transmitted sound wave of the sound echo to obtain the echo of the test sound wave;
(a2) converting the echo of the test sound wave into an electric signal, and selecting a voltage threshold value from the electric signal obtained by conversion;
(a3) and determining the number of cycles of the voltage threshold in the converted electric signal as the number of cycles of the voltage threshold in the target electric signal.
In the above operation (a 2), the echo of the test sound wave is converted into an electric signal, and a voltage threshold is selected from the converted electric signal. In order to facilitate the measurement of the acoustic echo arrival time detection device, the selected voltage threshold should be smaller than the peak voltage of the next period of the period where the voltage threshold is located and larger than the peak voltage of the previous period of the period where the voltage threshold is located.
It should be noted that, after the acoustic echo generated at the receiving transducer passes through the receiving transducer, the acoustic echo is distorted due to the influence of the physical characteristics of the receiving transducer, and the electrical signal converted from the acoustic echo in this embodiment is in a "spindle shape".
The electrical signal converted from the acoustic echo presents a spindle shape, the xth period of the electrical signal converted from the test acoustic wave is positioned in the first half part of the whole spindle-shaped electrical signal, the peak voltage amplitude of the xth period is certainly larger than that of the xth-1 period and certainly smaller than that of the xth +1 period, therefore, the voltage threshold value should be set in the first half part of the electrical signal.
Since the first few cycles of the electrical signal into which the acoustic echo is converted tend to be drowned by noise, the voltage threshold should be set in the first half of the electrical signal, the portion that is not drowned by noise.
In the above-described operation (a 3), the number of cycles in which the voltage threshold value is present in the converted electrical signal is determined as the number of cycles in which the voltage threshold value is present in the target electrical signal. Since the waveform of the electrical signal converted by the acoustic echo resembles a sine wave, the number of cycles in which the voltage threshold value is present in the converted electrical signal can be determined by observing the waveform of the converted electrical signal.
In step S506, the arrival time of the acoustic echo is determined based on the cycle number, the frequency of the target electrical signal, and the output time of the voltage jump signal. The method comprises the following specific steps:
(b1) determining the duration of one period of the target electrical signal according to the frequency of the target electrical signal;
(b2) determining the interval between the electric signal jumping time and the acoustic echo arrival time according to the duration and the periodicity of one period of the target electric signal;
(b3) and determining the arrival time of the acoustic echo according to the interval between the electric signal jumping time and the arrival time of the acoustic echo and the signal jumping time.
In the above-described action (b 1), the duration of one cycle of the target electric signal is determined based on the frequency of the target electric signal. Specifically, according to the frequency of the target electric signal, the duration of one period of the target electric signal is determined by calculation through the formula T =1/f, wherein the capital letter T represents the period and the lower-case letter f represents the frequency.
In the above-mentioned operation (b 2), the interval between the jump time of the electric signal and the arrival time of the acoustic echo is determined based on the duration and the number of cycles of one cycle of the target electric signal. The duration of one period of the target electric signal is multiplied by the period number, and the obtained result is the interval between the electric signal jumping time and the sound echo arrival time.
In the above operation (b 3), the acoustic echo arrival time is determined based on the interval between the electrical signal transition time and the acoustic echo arrival time and the signal transition time. Specifically, the electric signal jump time is different from the time interval, and the result is taken as the arrival time of the acoustic echo. If a more accurate result is needed, the sum of the delay parameters of the key elements in the acoustic echo detection device is obtained, the difference between the jumping time of the electric signal and the time interval is compared with the sum of the delay parameters of the key elements, and the result is used as the arrival time of the acoustic echo.
In summary, the circuit and the method for detecting the arrival time of the acoustic echo in this embodiment have at least the following advantages:
(1) the circuit provided by the embodiment does not comprise any programmable logic device, has a simple structure, is easy to use, and does not need a programmable logic device, an analog-to-digital conversion device and an algorithm;
(2) the circuit and the method provided by the embodiment have good adaptability to the low signal-to-noise ratio acoustic echo, and do not need to carry out special filtering processing on the acoustic echo;
(3) the circuit provided by the embodiment has good adaptability to high-frequency acoustic echo, for example, for high-frequency acoustic echo greater than 10MHz, a traditional digital signal processing method is adopted, a whole set of filtering, sampling and conditioning link (a large-bandwidth ADC and a high-speed programmable logic device) with a large bandwidth and a software algorithm are required, the circuit provided by the embodiment can be used for measurement only by adopting a high-speed comparator and a high-speed D trigger which are greater than the frequency of the acoustic echo, and the high-speed comparator and the high-speed D trigger support the input of frequency signals above 1GHz at present;
(4) compared with the traditional digital signal processing method, the method provided by the embodiment can complete measurement and estimation by selecting the characteristic point in a certain characteristic wave in the acoustic echo without sampling the whole acoustic echo, and is rapid, stable and good in real-time performance;
(5) the measurement and estimation results of the embodiment are integrated to calculate the acoustic echo frequency f, and when the acoustic echo frequency f is precisely calculated or is higher, the delay parameters of the comparator and the trigger can be integrated to calibrate according to the formula given by the method, so that the accuracy and precision of measurement and estimation of the acoustic echo arrival point are obviously and obviously improved, and the accuracy and precision of estimation of the flight time are indirectly improved.
(6) The circuit provided by the embodiment adopts edge jump to represent the zero-crossing time, and simultaneously represents the end of one-time measurement, so that the response and the use of an external circuit are facilitated. The external circuit can accurately calculate the arrival time of the acoustic echo according to the zero-crossing time by combining the frequency f of the acoustic echo and a formula given by the method.
(7) In some special applications, such as practical applications of a ringing sound velocity meter, ultrasonic ranging and the like, the circuit and the method provided by the embodiment are particularly suitable for occasions that the system is required to be low in cost, high in speed and low in time delay, and a high-frequency transducer above 1MHz is required to be adopted.
The foregoing description has been directed to specific embodiments of this disclosure. Other embodiments are within the scope of the following claims. In some cases, the actions or steps recited in the claims may be performed in a different order than in the embodiments and still achieve desirable results. In addition, the processes depicted in the accompanying figures do not necessarily require the particular order shown, or sequential order, to achieve desirable results. In some embodiments, multitasking and parallel processing may also be possible or may be advantageous.
In the 90 s of the 20 th century, improvements in a technology could clearly distinguish between improvements in hardware (e.g., improvements in circuit structures such as diodes, transistors, switches, etc.) and improvements in software (improvements in process flow). However, as technology advances, many of today's process flow improvements have been seen as direct improvements in hardware circuit architecture. Designers almost always obtain the corresponding hardware circuit structure by programming an improved method flow into the hardware circuit. Thus, it cannot be said that an improvement in the process flow cannot be realized by hardware physical modules. For example, a Programmable Logic Device (PLD), such as a Field Programmable Gate Array (FPGA), is an integrated circuit whose Logic functions are determined by programming the Device by a user. A digital system is "integrated" on a PLD by the designer's own programming without requiring the chip manufacturer to design and fabricate application-specific integrated circuit chips. Furthermore, nowadays, instead of manually making an Integrated Circuit chip, such Programming is often implemented by "logic compiler" software, which is similar to a software compiler used in program development and writing, but the original code before compiling is also written by a specific Programming Language, which is called Hardware Description Language (HDL), and HDL is not only one but many, such as abel (advanced Boolean Expression Language), ahdl (alternate Hardware Description Language), traffic, pl (core universal Programming Language), HDCal (jhdware Description Language), lang, Lola, HDL, laspam, hardward Description Language (vhr Description Language), vhal (Hardware Description Language), and vhigh-Language, which are currently used in most common. It will also be apparent to those skilled in the art that hardware circuitry that implements the logical method flows can be readily obtained by merely slightly programming the method flows into an integrated circuit using the hardware description languages described above.
The controller may be implemented in any suitable manner, for example, the controller may take the form of, for example, a microprocessor or processor and a computer-readable medium storing computer-readable program code (e.g., software or firmware) executable by the (micro) processor, logic gates, switches, an Application Specific Integrated Circuit (ASIC), a programmable logic controller, and an embedded microcontroller, examples of which include, but are not limited to, the following microcontrollers: ARC 625D, Atmel AT91SAM, Microchip PIC18F26K20, and Silicone Labs C8051F320, the memory controller may also be implemented as part of the control logic for the memory. Those skilled in the art will also appreciate that, in addition to implementing the controller as pure computer readable program code, the same functionality can be implemented by logically programming method steps such that the controller is in the form of logic gates, switches, application specific integrated circuits, programmable logic controllers, embedded microcontrollers and the like. Such a controller may thus be considered a hardware component, and the means included therein for performing the various functions may also be considered as a structure within the hardware component. Or even means for performing the functions may be regarded as being both a software module for performing the method and a structure within a hardware component.
The systems, devices, modules or units illustrated in the above embodiments may be implemented by a computer chip or an entity, or by a product with certain functions. One typical implementation device is a computer. In particular, the computer may be, for example, a personal computer, a laptop computer, a cellular telephone, a camera phone, a smartphone, a personal digital assistant, a media player, a navigation device, an email device, a game console, a tablet computer, a wearable device, or a combination of any of these devices.
For convenience of description, the above devices are described as being divided into various units by function, and are described separately. Of course, the functionality of the units may be implemented in one or more software and/or hardware when implementing the present application.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the specification. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instruction information. These computer program instruction information may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instruction information executed by the processor of the computer or other programmable data processing apparatus produce means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instruction information may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instruction information stored in the computer-readable memory produce an article of manufacture including instruction information means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instruction information may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instruction information executed on the computer or other programmable apparatus provides steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
In a typical configuration, a computing device includes one or more processors (CPUs), input/output interfaces, network interfaces, and memory.
The memory may include forms of volatile memory in a computer readable medium, Random Access Memory (RAM) and/or non-volatile memory, such as Read Only Memory (ROM) or flash memory (flash RAM). Memory is an example of a computer-readable medium.
Computer-readable media, including both non-transitory and non-transitory, removable and non-removable media, may implement information storage by any method or technology. The information may be computer readable instruction information, data structures, modules of a program, or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), Read Only Memory (ROM), Electrically Erasable Programmable Read Only Memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), Digital Versatile Discs (DVD) or other optical storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other non-transmission medium that can be used to store information that can be accessed by a computing device. As defined herein, a computer readable medium does not include a transitory computer readable medium such as a modulated data signal and a carrier wave.
It should also be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The application may be described in the general context of computer-executable instruction information, such as program modules, being executed by a computer. Generally, program modules include routines, programs, objects, components, data structures, etc. that perform particular tasks or implement particular abstract data types. The application may also be practiced in distributed computing environments where tasks are performed by remote processing devices that are linked through a communications network. In a distributed computing environment, program modules may be located in both local and remote computer storage media including memory storage devices.
The embodiments in the present specification are described in a progressive manner, and portions that are similar to each other in the embodiments are referred to each other, and each embodiment focuses on differences from other embodiments. In particular, for the system embodiment, since it is substantially similar to the method embodiment, the description is simple, and for the relevant points, reference may be made to the partial description of the method embodiment.
The above description is only an example of the present application and is not intended to limit the present application. Various modifications and changes may occur to those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the scope of the claims of the present application.
Claims (10)
1. An acoustic echo arrival time detection apparatus, comprising:
a first voltage detection circuit and a second voltage detection circuit;
the input end of the first voltage detection circuit and the input end of the second voltage detection circuit are both used for inputting a target electric signal corresponding to the acoustic echo to be detected;
the output end of the first voltage detection circuit is connected with the enabling end of the second voltage detection circuit;
the first voltage detection circuit is used for detecting whether the voltage value of the target electric signal reaches a preset voltage threshold value or not and enabling the second voltage detection circuit to work when the voltage value of the target electric signal reaches the voltage threshold value;
after the second voltage detection circuit works, detecting whether the voltage value of the target electric signal is zero or not, and outputting a voltage jump signal when the voltage value of the target electric signal is zero for the first time;
wherein the output time of the voltage jump signal is used for calculating the arrival time of the acoustic echo.
2. The apparatus of claim 1,
the first voltage detection circuit comprises a first comparator and a first trigger;
a first input end of the first comparator is used for inputting the target electric signal, and a second input end of the first comparator is used for accessing a voltage threshold signal corresponding to the voltage threshold;
and a first output end of the first comparator is connected with a first input end of the first trigger, and a first output end of the first trigger is connected with an enabling end of the second voltage detection circuit.
3. The apparatus of claim 2,
when the first comparator detects that the voltage value of the target electric signal reaches the voltage threshold value, a first output end of the first comparator outputs a first voltage signal;
when the first input end of the first trigger receives the first voltage signal, the first output end of the first trigger outputs an enable signal for triggering the second voltage detection circuit.
4. The apparatus of claim 3,
the first input end of the first comparator is a positive phase input end; the second input end of the first comparator is an inverting input end; the first output end of the first comparator is a normal-phase output end;
a first input end of the first trigger is a clock end; the first output end of the first trigger is an inverted output end.
5. The apparatus of claim 1,
the second voltage detection circuit comprises a second comparator and a second trigger;
the first input end of the second comparator is used for inputting the target electric signal, and the second input end of the second comparator is grounded;
the first output end of the second comparator is connected with the first input end of the second trigger, the output end of the first voltage detection circuit is connected with the enabling end of the second trigger, and the first output end of the second trigger is used for outputting the voltage jump signal.
6. The apparatus of claim 5,
when the second comparator detects that the voltage value of the target electric signal is zero, a first output end of the second comparator outputs a second voltage signal;
and after the second trigger is enabled, when the first input end of the second trigger receives the second voltage signal, the first output end of the second trigger outputs the voltage jump signal.
7. The apparatus of claim 6,
the first input end of the second comparator is a positive phase input end; a second input end of the second comparator is an inverting input end; the first output end of the second comparator is an inverted output end;
the first input end of the second trigger is a clock end; the enabling end of the second trigger is a setting end; the first output end of the second trigger is a positive phase output end.
8. A method for detecting the arrival time of an acoustic echo, comprising:
acquiring the output moment of the voltage jump signal output by the device according to any one of claims 1-7 and acquiring the frequency of the target electrical signal;
determining the number of cycles of a target characteristic point in the target electric signal; the target characteristic point is a corresponding characteristic point when the voltage value of the target electric signal is changed to zero for the first time after reaching the voltage threshold;
and determining the arrival time of the acoustic echo according to the periodicity, the frequency of the electric signal and the output time of the voltage jump signal.
9. The method of claim 8, wherein determining a number of cycles in the target electrical signal at which the target feature point in the target electrical signal is located comprises:
and determining the number of cycles of the target characteristic point in the target electrical signal according to the number of cycles of the voltage threshold in the target electrical signal.
10. The method of claim 8, wherein the voltage threshold is determined by:
emitting a test sound wave with the same frequency and the same voltage amplitude as the emitted sound wave of the acoustic echo to obtain the echo of the test sound wave;
converting the echo of the test sound wave into an electric signal, and selecting the voltage threshold value from the electric signal obtained by conversion;
and determining the number of cycles of the voltage threshold in the converted electric signal as the number of cycles of the voltage threshold in the target electric signal.
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Application publication date: 20210716 |