CN113114232B - Calibration method of voltage-controlled oscillator frequency calibration circuit - Google Patents

Calibration method of voltage-controlled oscillator frequency calibration circuit Download PDF

Info

Publication number
CN113114232B
CN113114232B CN202110284838.8A CN202110284838A CN113114232B CN 113114232 B CN113114232 B CN 113114232B CN 202110284838 A CN202110284838 A CN 202110284838A CN 113114232 B CN113114232 B CN 113114232B
Authority
CN
China
Prior art keywords
frequency
controlled oscillator
voltage
calibration
frequency band
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202110284838.8A
Other languages
Chinese (zh)
Other versions
CN113114232A (en
Inventor
谢翔宇
侯照临
张文锋
金广华
陈昌锐
刘武广
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CETC 29 Research Institute
Original Assignee
CETC 29 Research Institute
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CETC 29 Research Institute filed Critical CETC 29 Research Institute
Priority to CN202110284838.8A priority Critical patent/CN113114232B/en
Publication of CN113114232A publication Critical patent/CN113114232A/en
Application granted granted Critical
Publication of CN113114232B publication Critical patent/CN113114232B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/099Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00Reducing energy consumption in communication networks
    • Y02D30/70Reducing energy consumption in communication networks in wireless communication networks

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

The application relates to a voltage-controlled oscillator frequency calibration circuit and a calibration method, wherein the voltage-controlled oscillator frequency calibration circuit comprises a control unit, a multi-section voltage-controlled oscillator, a loop filter and a phase discriminator; the calibration method comprises the following steps: step S1: writing the highest frequency and the lowest frequency which are not calibrated in different frequency bands of the multistage voltage-controlled oscillator into the control unit; step S2: calibrating the highest frequency of the frequency band and recording the highest frequency in a control unit; step S3: after calibrating the highest frequency of the frequency band, calibrating the lowest frequency of the frequency band, and recording the lowest frequency in a control unit; step S4: and (3) finishing the calibration of the highest frequency and the lowest frequency of all the frequency bands of the multi-section voltage-controlled oscillator. The application can ensure that the frequency segments of the multi-segment voltage controlled oscillators in different batches can completely cover the wide-band frequency range under the conditions of full temperature (high temperature, low temperature and normal temperature).

Description

Calibration method of voltage-controlled oscillator frequency calibration circuit
Technical Field
The application relates to the technical field of radio frequency microwaves, in particular to a calibration method of a voltage-controlled oscillator frequency calibration circuit.
Background
Phase locked loops are widely used in radio frequency microwave circuits and systems. Fig. 1 is a schematic block diagram of a typical single loop phase locked loop.
The phase-locked loop circuit is a closed loop system, and the three most critical components of the system are: phase detector, loop filter, voltage controlled oscillator. The voltage-controlled oscillator is an important component of the circuit, the output of proper frequency is controlled through the tuning voltage of the input end, the voltage-controlled oscillator divides the signal into two paths through the splitter (the power divider, the coupler and the like), one path of the signal is directly output to the outside, the other path of the signal is fed back to the phase discriminator, the feedback signal and the reference signal enter the phase discriminator to perform phase discrimination at the same time, the output signal generated by the phase discriminator generates the tuning voltage through the loop filter, then the output frequency of the voltage-controlled oscillator is controlled until the feedback process reaches a stable state, and the phase-locked loop circuit outputs a stable signal to the outside.
The frequency range of the voltage-controlled oscillator determines the bandwidth of the output signal of the phase-locked loop, and the wideband phase-locked loop needs to select a voltage-controlled oscillator with wider frequency band, and typical models of the conventional wideband voltage-controlled oscillator are as follows: HMC6380, HMC733, etc., typically characterized by: the maximum tuning voltage is relatively high and the push frequency coefficient is relatively high. The higher tuning voltage requires an external power supply circuit to provide a direct current voltage with higher voltage, so that the requirement on the power supply circuit is improved; the higher frequency-pushing coefficient has higher requirements on the configuration of the phase detector of the phase-locked loop circuit and the setting of the loop filter. Taking HMC6380 as an example, the output frequency is 8GHz-16GHz, the maximum tuning voltage is 23V, and the push frequency coefficient is: 190MHz/V. In recent years, a class of frequency multistage voltage controlled oscillators, typical models of which are SIV100SP4, SIV019SP4, and the like, have appeared and developed, and the frequency multistage voltage controlled oscillators are typically characterized in that: the frequency of the broadband voltage-controlled oscillator is logically controlled and divided into a plurality of sections of narrowband voltage-controlled oscillators, and each section of narrowband voltage-controlled oscillator is spliced and completely covers the broadband frequency range to realize the external output of broadband voltage-controlled oscillator signals. The frequency multi-segment voltage controlled oscillator has lower phase noise than a conventional wideband voltage controlled oscillator. The frequency multistage voltage-controlled oscillator has the biggest characteristic that the frequency is divided into a plurality of sections, so that the selection of proper frequency band combinations to completely cover all frequency bands is a key point of circuit design. Taking SIV019SP4 as an example, the output frequency is 8-16GHz, the maximum tuning voltage is 5V, the push frequency coefficient is 20MHz/V, and the frequency segmentation is controlled by control bits S, S1, S2 and S3: frequency band 1 (7.7 GHz-8.5 GHz), frequency band 2 (8.0 GHz-9.3 GHz), frequency band 3 (7.4 GHz-9.7 GHz), frequency band 4 (8.9 GHz-10.6 GHz), frequency band 5 (9.4 GHz-11.0 GHz), frequency band 6 (9.8 GHz-12.1 GHz), frequency band 7 (10.4 GHz-12.7 GHz), frequency band 8 (11.6 GHz-14.7 GHz), frequency band 9 (13.2 GHz-16.3 GHz). Frequency band 1, frequency band 2, frequency band 4, frequency band 6, frequency band 8, frequency band 9 may be selected to completely cover the 8-16GHz wideband frequency range.
The multi-stage vco has its advantages, but has an unavoidable disadvantage that the frequency division of different batches of products will be different due to limitations of materials, processes, etc., and thus the following situations will exist: the band combination selected for lot a may cover lot a completely, but not lot B. The frequency division conditions of the products in the same batch at high temperature, low temperature and normal temperature also have drift. Therefore, calibration is required for the frequency segmentation case in phase-locked loop applications for frequency multi-segment voltage controlled oscillators.
Disclosure of Invention
The application aims to solve the technical problem of providing a voltage-controlled oscillator frequency calibration circuit and a calibration method, which ensure that frequency segments of multi-segment voltage-controlled oscillators in different batches can completely cover a broadband frequency range under the conditions of full temperature (high temperature, low temperature and normal temperature).
The application solves the technical problems by adopting the following solution:
a voltage-controlled oscillator frequency calibration circuit comprises a control unit, a multi-section voltage-controlled oscillator, a loop filter and a phase discriminator;
the control unit is respectively connected with the multi-section voltage-controlled oscillator and the phase discriminator;
the loop filter is positioned between the multi-section voltage-controlled oscillator and the phase discriminator and is respectively connected with the multi-section voltage-controlled oscillator and the phase discriminator;
the multi-section voltage controlled oscillator is also connected with the phase discriminator.
In some possible embodiments, the control unit includes a controller and a memory connected to the controller.
In some possible implementations, the loop filter is an active loop filter or a passive loop filter.
In another aspect, a calibration method for a voltage controlled oscillator frequency calibration circuit,
step S1: writing the highest frequency and the lowest frequency which are not calibrated in different frequency bands of the multistage voltage-controlled oscillator into the control unit;
step S2: calibrating the highest frequency of the frequency band and recording the highest frequency in a control unit;
step S3: after calibrating the highest frequency of the frequency band, calibrating the lowest frequency of the frequency band, and recording the lowest frequency in a control unit;
step S4: and (3) finishing the calibration of the highest frequency and the lowest frequency of all the frequency bands of the multi-section voltage-controlled oscillator.
In some possible embodiments, the step S1 specifically includes the following steps:
step S11: selecting control codes of voltage-controlled oscillators with different frequency bands in multi-band voltage-controlled oscillators and lowest frequency F of each frequency band min_n And the highest frequency F max_n Writing into a memory of the control unit;
step S12: setting a frequency band variable n, wherein n is a natural number, and the initial value n=0;
step S13: counting the frequency band variable n by adding 1, and assigning n to cover an n value, namely n=n+1;
step S14: the controller sends an instruction to the multistage voltage-controlled oscillator to control the multistage voltage-controlled oscillator to work in the frequency band n.
In some possible embodiments, the step S2 specifically includes the following steps:
step S21: setting a variable k, wherein k is an integer, and the initial value k=0;
step S22: counting the frequency band variable k by adding 1, and assigning k to cover a k value, namely k=k+1;
step S23: the controller sends an instruction to the phase detector, and calculates the output frequency of the phase detector;
step S24: the phase discriminator reports whether the phase-locked loop is locked or not to the control unit;
step S25: the controller judges whether the phase-locked loop is locked or not;
if not, returning to the step S21 until the locking is achieved;
if locked, recording the locked frequency value in a memory, wherein the frequency value is the highest frequency F of the calibrated frequency band n max_n
In some possible embodiments, in the step S23, the calculating method for calculating the output frequency of the phase detector specifically refers to:
F max_nk =f max_n +(f max_n -f min_n )×a×k;
wherein F is max_nk Intermediate frequency values for the calibration process;
f max_n the highest frequency which is not calibrated in a certain frequency band;
f min_n the lowest frequency which is not calibrated for a certain frequency band;
k calibration times, which are intermediate variables in the calibration process;
a is a scale factor, a.epsilon.0, 1.
In some possible embodiments, the step S3 specifically includes the following steps:
step S31: setting a variable m, m is an integer, and an initial value m=0;
step S32: counting the frequency band variable m by adding 1, assigning the value to m, and covering an m value, namely m=m+1;
step S33: the controller sends an instruction to the phase detector, and calculates the output frequency of the phase detector;
step S34: the phase discriminator reports whether the phase-locked loop is locked or not to the control unit;
step S35: the controller judges whether the phase-locked loop is locked or not;
if not, returning to the step S31 until the locking is achieved;
if locked, recording the locked frequency value in a memory, wherein the frequency value is the lowest frequency F of the calibrated frequency band n min_n
In some possible embodiments, in the step S33, the calculating method for calculating the output frequency of the phase detector is:
F min_nm =f min_n +(f max_n -f min_n )×b×m;
wherein F is min_nm Intermediate frequency values for the calibration process;
f max_n the highest frequency which is not calibrated in a certain frequency band;
f min_n the lowest frequency which is not calibrated for a certain frequency band;
m is the number of calibration times, which belongs to the intermediate variable of the calibration process;
b is a scale factor, b.epsilon.0, 1.
In some possible embodiments, the step S4 specifically refers to:
the controller judges whether all frequency bands of the multi-section voltage controlled oscillator are calibrated completely;
if not, returning to the step S1, and executing the steps S1-S4;
if all calibrations have been completed, the calibration process ends.
Compared with the prior art, the application has the beneficial effects that:
the application can ensure that the multi-section type hold-down oscillators among different batches can completely cover the wide-band frequency range under the full-temperature (high temperature, low temperature and normal temperature) state of the multi-section type VCO frequency sections of the same batch; the frequency band combination selected by the batch A can be completely covered by the batch A, but cannot be completely covered by the batch B
Drawings
FIG. 1 is a schematic diagram of the connection relationship of the calibration circuit according to the present application;
FIG. 2 is a schematic diagram of a circuit interface of a control unit according to the present application;
fig. 3 is a schematic diagram of a circuit interface of the phase detector according to the present application;
FIG. 4 is a schematic diagram of a circuit interface of a multi-stage VCO in accordance with the present application;
fig. 5 is a circuit diagram of a passive loop filter employed in the loop filter of the present application;
FIG. 6 is a flow chart of the calibration method of the present application;
FIG. 7 is a schematic diagram showing the connection relationship among a control unit, a phase detector, a multi-stage voltage controlled oscillator and a loop filter in the present application;
wherein: 1. a resistor I; 2. a resistor II; 3. the method comprises the steps of carrying out a first treatment on the surface of the A first capacitor; 4. a third resistor; 5. a second capacitor; 6. a third capacitor; 7. and a capacitor IV.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present application more apparent, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the embodiments of the present application, and it is apparent that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present application without making any inventive effort, are intended to fall within the scope of the present application. Accordingly, the detailed description of the embodiments of the application provided below is not intended to limit the scope of the application as claimed, but is merely representative of selected embodiments of the application.
In the description of the present application, it should be understood that the terms "orientation" or "positional relationship" are based on the orientation or positional relationship shown in the drawings, and are merely for convenience of description and to simplify the description, rather than to indicate or imply that the apparatus or elements referred to must have a particular orientation, be constructed and operate in a particular orientation, and therefore should not be construed as limiting the application.
In the drawings of the present application, it should be understood that different technical features which are not mutually substituted are shown in the same drawings only for the convenience of simplifying the description of the drawings and reducing the number of the drawings, and not to indicate or imply that the embodiments described with reference to the drawings contain all the technical features in the drawings, and thus should not be construed as limiting the application.
In the present application, unless explicitly specified and limited otherwise, the terms "mounted," "connected," "secured," and the like are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally formed; can be directly connected or indirectly connected through an intermediate medium, and can be communicated with the inside of two elements or the interaction relationship of the two elements. Reference to "first," "second," and similar terms herein do not denote any order, quantity, or importance, but rather are used to distinguish one element from another. Also, the terms "a" or "an" and the like do not denote a limitation of quantity, but rather denote the presence of at least one. In the implementation of the present application, "and/or" describes the association relationship of the association object, which means that there may be three relationships, for example, a and/or B may mean: a exists alone, A and B exist together, and B exists alone. In describing embodiments of the application, unless otherwise indicated,
the meaning of "plurality" means two or more. For example, a plurality of positioning posts refers to two or more positioning posts. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art according to the specific circumstances.
The present application will be described in detail below.
As shown in figures 1-5 of the drawings,
a voltage-controlled oscillator frequency calibration circuit comprises a control unit, a multi-section voltage-controlled oscillator, a loop filter and a phase discriminator;
the control unit is respectively connected with the multi-section voltage-controlled oscillator and the phase discriminator;
the loop filter is positioned between the multi-section voltage-controlled oscillator and the phase discriminator and is respectively connected with the multi-section voltage-controlled oscillator and the phase discriminator;
the multi-section voltage controlled oscillator is also connected with the phase discriminator.
In some possible embodiments, the control unit includes a controller and a memory connected to the controller.
In some possible implementations, the loop filter is an active loop filter or a passive loop filter.
Preferably, the phase detector is HMC704; the loop filter adopts a passive loop filter; the multi-section voltage-controlled oscillator selects SIV019SP4 which is a broadband voltage-controlled oscillator integrating the frequency divider function and covers the output frequency of the 8-16GHz frequency band without gaps; the controller and the memory of the control unit are realized by adopting functionally independent devices, the controller adopts XC4VLX25, and the memory adopts XCF32PFS48C.
The pin 19 of the phase discriminator is used as an input port of a reference signal, the pin 5 and the pin 6 are used as input ports of feedback signals, the single-ended signal can select the pin 5 as feedback input, and the pin 6 is matched with the ground; the pin 4 has the function of reporting whether the phase-locked loop is locked or not; the pin 1, the pin 2 and the pin 24 can receive frequency code information sent by an external control signal to control output frequency, and an SPI three-wire protocol is adopted as a control protocol; pin 16 is the output port of the phase discrimination output signal, which is connected with the passive loop filter, and the control voltage is led out from the output end of the loop filter;
preferably, the reference signal is a 100MHz signal generated by a constant temperature crystal oscillator;
as shown in fig. 5, the passive loop filter includes a first resistor 1 and a second resistor 2 connected in series in this order, a first capacitor 3 and a third resistor 4 connected to the input terminal of the first resistor, a second capacitor 5 connected to the output terminal of the first resistor 1 and the input terminal of the second resistor 2, a third capacitor 6 connected to the output terminal of the second resistor 2, and a fourth capacitor 7 connected to the output terminal of the third resistor 4; the output ends of the first capacitor 3, the second capacitor 5, the third capacitor 6 and the fourth capacitor 7 are all grounded.
The pin 4 of the multistage voltage controlled oscillator is connected with the output end of the passive filter, the pin 15 outputs a radio frequency signal, the pin 20 can output/2,/4,/8,/16 programmable frequency division signals, and the signals output by the RF/N can be used as feedback signals to be fed back to the phase discriminator, so that the function of the graph splitter is realized, and the circuit design is simplified.
Pin 5, pin 6, pin 7 and pin 8 of the multistage voltage controlled oscillator are connected to XC4VLX25 of the control unit to control the multistage voltage controlled oscillator to select the stage.
The feedback signal is connected from the frequency division output port pin 20 of the multi-stage voltage controlled oscillator to the pin 5 of the phase discriminator, and the output signal is output from the output port pin 15 of the multi-stage voltage controlled oscillator to the outside.
Pin 1, pin 2, pin 24, pin 4 of the phase discriminator are connected to the control unit; wherein pin 1, pin 2 and pin 24 are used as input ports for controlling frequency codes, and pin 4 is used as an output port for reporting control signals (reporting LD state) to the control unit by the phase discriminator.
In the present application, the control unit has the following features:
1. the control device is provided with a control device which can send control signals according to certain control protocol content; the controller has a function of accepting state information input from an external circuit and performing processing.
2. The memory device with the memory function has the function that the memory information is not cleared after the system is powered down.
3. The controller and the memory can be integrated together to realize the function of the control unit, or mutually independent devices can be connected together in a certain mode to realize the function of the control unit.
The phase detector has the following characteristics:
1. has the basic function of being a non-deletable phase detector.
2. Having a reference signal input port and a radio frequency feedback signal input port.
3. A more typical lock state reporting method (but not limited to this method) is to report a lock instruction (LD), and in general, the lock instruction (LD) is high, locked, and the lock instruction (LD) is low, and unlocked, but other lock instruction states are not excluded.
4. The application is not limited to the control protocol form, and has the function of receiving the frequency code information sent by the external control signal to control the output frequency.
The loop filter has the following features: may be an active or passive loop filter, preferably a passive loop filter.
The multistage voltage controlled oscillator has the following characteristics:
1. has the basic function of being a non-deletable voltage-controlled oscillator.
2. The broadband frequency range is divided into a plurality of sections of narrowband voltage-controlled oscillators, and different frequency bands are selected through the control signals.
3. The individual segments of narrow band voltage controlled oscillator splice must completely cover the wide band frequency range.
4. 4, due to the limitations of materials, processes and the like, the frequency division conditions of products in different batches are different, or the frequency division conditions of products in the same batch are different at high temperature, low temperature and normal temperature.
The peripheral configuration circuit of the calibration circuit in the application can be built according to a device manual and a reference circuit provided by a manufacturer, and is not described in detail.
On the other hand, as shown in fig. 6, the calibration method based on the calibration circuit specifically includes the following steps:
step S1: writing the highest frequency and the lowest frequency which are not calibrated in different frequency bands of the multistage voltage-controlled oscillator into the control unit;
the method specifically comprises the following steps:
step S11: selecting control codes of voltage-controlled oscillators with different frequency bands in multi-band voltage-controlled oscillators and lowest frequency F of each frequency band min_n And the highest frequency F max_n Writing into a memory of the control unit;
step S12: setting a frequency band variable n, wherein n is a natural number, and the initial value n=0;
step S13: counting the frequency band variable n by adding 1, and assigning n to cover an n value, namely n=n+1;
step S14: the controller sends an instruction to the multistage voltage-controlled oscillator to control the multistage voltage-controlled oscillator to work in the frequency band n.
Step S2: calibrating the highest frequency of the frequency band and recording the highest frequency in a control unit; the method specifically comprises the following steps:
step S21: setting a variable k, wherein k is an integer, and the initial value k=0;
step S22: counting the frequency band variable k by adding 1, and assigning k to cover a k value, namely k=k+1;
step S23: the controller sends an instruction to the phase detector, and calculates the output frequency of the phase detector; the method for calculating the output frequency of the phase discriminator specifically comprises the following steps:
F max_nk =f max_n +(f max_n -f min_n ) X a x k; wherein a takes a value of 5%;
wherein F is max_nk Intermediate frequency values for the calibration process;
f max_n the highest frequency which is not calibrated in a certain frequency band;
f min_n the lowest frequency which is not calibrated for a certain frequency band;
k calibration times, which are intermediate variables in the calibration process;
a is a scale factor, a e [0,1];
the smaller a is, the closer the calibrated frequency value is to the actual value, but the calibration times k are increased, and the calibration time is prolonged; for example, for a certain multi-stage voltage-controlled oscillator, a is selected to be 5% -10% (not limited to the value), and the accuracy and the time of calibration are both considered.
Step S24: the phase discriminator reports whether the phase-locked loop is locked or not to the control unit;
step S25: the controller judges whether the phase-locked loop is locked or not;
if not, returning to the step S21 until the locking is achieved;
if locked, recording the locked frequency value in a memory, wherein the frequency value is the highest frequency f of the calibrated frequency band n max_n
Step S3: after calibrating the highest frequency of the frequency band, calibrating the lowest frequency of the frequency band, and recording the lowest frequency in a control unit; the method specifically comprises the following steps:
step S31: setting a variable m, m is an integer, and an initial value m=0;
step S32: counting the frequency band variable m by adding 1, assigning the value to m, and covering an m value, namely m=m+1;
step S33: the controller sends an instruction to the phase detector, and calculates the output frequency of the phase detector; the method for calculating the output frequency of the phase discriminator comprises the following steps:
F min_nm =f min_n +(f max_n -f min_n ) X b x m; wherein b takes the value of 5%
Wherein F is min_nm Intermediate frequency values for the calibration process;
f max_n the highest frequency which is not calibrated in a certain frequency band;
f min_n the lowest frequency which is not calibrated for a certain frequency band;
m is the number of calibration times, which belongs to the intermediate variable of the calibration process;
b is a scale factor, b ε [0,1];
the smaller b is, the closer the calibrated frequency value is to the actual value, but the calibration times k are increased, and the calibration time is prolonged; for example, for a certain multi-section voltage-controlled oscillator, b is selected to be 5% -10% (not limited to the value), and the accuracy and the time of calibration are both considered; the values of a and b can be the same or different.
Step S34: the phase discriminator reports whether the phase-locked loop is locked or not to the control unit;
step S35: the controller judges whether the phase-locked loop is locked or not;
if not, returning to the step S31 until the locking is achieved;
if locked, recording the locked frequency value in a memory, wherein the frequency value is the lowest frequency F of the calibrated frequency band n min_n
Step S4: until the calibration of the highest frequency and the lowest frequency of all frequency bands of the multi-section voltage-controlled oscillator is completed, and the calibration is finished; the method specifically comprises the following steps:
the controller judges whether all frequency bands of the multi-section voltage controlled oscillator are calibrated completely;
if not, returning to the step S1, and executing the steps S1-S4;
if all calibrations have been completed, the calibration process ends.
It should be noted that, when n=1, the calibration method can be used for frequency calibration of a conventional voltage-controlled oscillator.
In the present application, "=" in "n=n+1, k=k+1, m=m+1" means operation and assignment, and does not necessarily mean that the formula is an equation.
Aiming at the sectional frequency offset of the multistage VCO caused by factors such as materials, processes and the like, the application can effectively solve the problem that the frequency band combination selected by the batch A can completely cover the batch A but cannot completely cover the product of the batch B. "problem.
The application is not limited to the specific embodiments described above. The application extends to any novel one, or any novel combination, of the features disclosed in this specification, as well as to any novel one, or any novel combination, of the steps of the method or process disclosed.

Claims (5)

1. The calibration method of the voltage-controlled oscillator frequency calibration circuit is characterized by comprising a control unit, a multi-section voltage-controlled oscillator, a loop filter and a phase discriminator;
the control unit is respectively connected with the multi-section voltage-controlled oscillator and the phase discriminator; the phase discriminator reports a control signal to the control unit through the output port;
the loop filter is positioned between the multi-section voltage-controlled oscillator and the phase discriminator and is respectively connected with the multi-section voltage-controlled oscillator and the phase discriminator;
the multi-section voltage controlled oscillator is also connected with the phase discriminator;
the method specifically comprises the following steps:
step S1: writing the highest frequency and the lowest frequency which are not calibrated in different frequency bands of the multistage voltage-controlled oscillator into the control unit;
step S2: calibrating the highest frequency of the frequency band and recording the highest frequency in a control unit; the method specifically comprises the following steps:
step S21: setting a variable k, wherein k is an integer, and the initial value k=0;
step S22: counting the frequency band variable k by adding 1, and assigning k to cover a k value, namely k=k+1;
step S23: the controller sends an instruction to the phase detector, and calculates the output frequency of the phase detector;
in the step S23, the calculating method for calculating the output frequency of the phase discriminator specifically includes:
F max_nk =f max_n +(f max_n -f min_n )×a×k;
wherein F is max_nk Intermediate frequency values for the calibration process;
f max_n the highest frequency which is not calibrated in a certain frequency band;
f min_n the lowest frequency which is not calibrated for a certain frequency band;
k calibration times, which are intermediate variables in the calibration process;
a is a scale factor, a e [0,1];
step S24: the phase discriminator reports whether the phase-locked loop is locked or not to the control unit;
step S25: the controller judges whether the phase-locked loop is locked or not;
if not, returning to the step S21 until the locking is achieved;
if locked, recording the locked frequency value in a memory, wherein the frequency value is the highest frequency F of the calibrated frequency band n max_n
Step S3: after calibrating the highest frequency of the frequency band, calibrating the lowest frequency of the frequency band, and recording the lowest frequency in a control unit; the method specifically comprises the following steps:
step S31: setting a variable m, m is an integer, and an initial value m=0;
step S32: counting the frequency band variable m by adding 1, assigning the value to m, and covering an m value, namely m=m+1;
step S33: the controller sends an instruction to the phase detector, and calculates the output frequency of the phase detector; in the step S33, the method for calculating the output frequency of the phase detector includes:
F min_nm =f min_n +(f max_n -f min_n )×b×m;
wherein F is min_nm Intermediate frequency values for the calibration process;
f max_n the highest frequency which is not calibrated in a certain frequency band;
f min_n the lowest frequency which is not calibrated for a certain frequency band;
m is the number of calibration times, which belongs to the intermediate variable of the calibration process;
b is a scale factor, b ε [0,1];
step S34: the phase discriminator reports whether the phase-locked loop is locked or not to the control unit;
step S35: the controller judges whether the phase-locked loop is locked or not;
if not, returning to the step S31 until the locking is achieved;
if locked, recording the locked frequency value in a memory, wherein the frequency value is calibratedThe lowest frequency F of the subsequent frequency band n min_n
Step S4: and (3) finishing the calibration of the highest frequency and the lowest frequency of all the frequency bands of the multi-section voltage-controlled oscillator.
2. The method of claim 1, wherein the control unit includes a controller and a memory coupled to the controller.
3. The calibration method of a voltage controlled oscillator frequency calibration circuit of claim 2, wherein the loop filter is an active loop filter or a passive loop filter.
4. The calibration method of a voltage controlled oscillator frequency calibration circuit according to claim 1, wherein the step S1 specifically comprises the steps of:
step S11: selecting control codes of voltage-controlled oscillators with different frequency bands in multi-band voltage-controlled oscillators and lowest frequency F of each frequency band min_n And the highest frequency F max_n Writing into a memory of the control unit;
step S12: setting a frequency band variable n, wherein n is a natural number, and the initial value n=0;
step S13: counting the frequency band variable n by adding 1, and assigning n to cover an n value, namely n=n+1;
step S14: the controller sends an instruction to the multistage voltage-controlled oscillator to control the multistage voltage-controlled oscillator to work in the frequency band n.
5. The calibration method of a voltage controlled oscillator frequency calibration circuit according to claim 1, wherein the step S4 specifically refers to:
the controller judges whether all frequency bands of the multi-section voltage controlled oscillator are calibrated completely;
if not, returning to the step S1, and executing the steps S1-S4;
if all calibrations have been completed, the calibration process ends.
CN202110284838.8A 2021-03-17 2021-03-17 Calibration method of voltage-controlled oscillator frequency calibration circuit Active CN113114232B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202110284838.8A CN113114232B (en) 2021-03-17 2021-03-17 Calibration method of voltage-controlled oscillator frequency calibration circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202110284838.8A CN113114232B (en) 2021-03-17 2021-03-17 Calibration method of voltage-controlled oscillator frequency calibration circuit

Publications (2)

Publication Number Publication Date
CN113114232A CN113114232A (en) 2021-07-13
CN113114232B true CN113114232B (en) 2023-08-29

Family

ID=76711650

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202110284838.8A Active CN113114232B (en) 2021-03-17 2021-03-17 Calibration method of voltage-controlled oscillator frequency calibration circuit

Country Status (1)

Country Link
CN (1) CN113114232B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114665870B (en) * 2022-02-24 2024-01-26 中国电子科技集团公司第二十九研究所 Multi-section VCO frequency calibration circuit and calibration method
CN116743158B (en) * 2023-08-15 2023-11-07 慷智集成电路(上海)有限公司 Method for extracting frequency phase of input signal and digital signal transmission system

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103036560A (en) * 2012-12-13 2013-04-10 广州润芯信息技术有限公司 Phase-locked loop and circuit and method of closed loop frequency self-calibration of phase-locked loop
CN103095295A (en) * 2012-12-28 2013-05-08 重庆西南集成电路设计有限责任公司 Phase-locking frequency synthesizer, self-adaptation frequency calibration circuit and calibration method
CN106788404A (en) * 2016-11-15 2017-05-31 中国电子科技集团公司第四十研究所 A kind of phase-locked loop frequency synthesizer auto-calibration circuits and method
CN109714049A (en) * 2019-02-27 2019-05-03 上海创远仪器技术股份有限公司 The circuit structure and method realizing that frequency is quickly calibrated for integrated frequency synthesizer and scanning
CN110417406A (en) * 2019-06-25 2019-11-05 成都九洲迪飞科技有限责任公司 The digital phase-locked loop of broadband frequency source is realized using integrated multisection type broadband VCO
CN110719099A (en) * 2019-11-19 2020-01-21 中国电子科技集团公司第二十九研究所 Synthesizer-based in-loop mixing type phase-locked loop

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7486147B2 (en) * 2006-12-06 2009-02-03 Broadcom Corporation Low phase noise phase locked loops with minimum lock time
CN104052474B (en) * 2014-06-03 2017-03-15 华为技术有限公司 A kind of phase-locked loop frequency bearing calibration and system

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103036560A (en) * 2012-12-13 2013-04-10 广州润芯信息技术有限公司 Phase-locked loop and circuit and method of closed loop frequency self-calibration of phase-locked loop
CN103095295A (en) * 2012-12-28 2013-05-08 重庆西南集成电路设计有限责任公司 Phase-locking frequency synthesizer, self-adaptation frequency calibration circuit and calibration method
CN106788404A (en) * 2016-11-15 2017-05-31 中国电子科技集团公司第四十研究所 A kind of phase-locked loop frequency synthesizer auto-calibration circuits and method
CN109714049A (en) * 2019-02-27 2019-05-03 上海创远仪器技术股份有限公司 The circuit structure and method realizing that frequency is quickly calibrated for integrated frequency synthesizer and scanning
CN110417406A (en) * 2019-06-25 2019-11-05 成都九洲迪飞科技有限责任公司 The digital phase-locked loop of broadband frequency source is realized using integrated multisection type broadband VCO
CN110719099A (en) * 2019-11-19 2020-01-21 中国电子科技集团公司第二十九研究所 Synthesizer-based in-loop mixing type phase-locked loop

Also Published As

Publication number Publication date
CN113114232A (en) 2021-07-13

Similar Documents

Publication Publication Date Title
EP2033318B1 (en) Continuous gain compensation and fast band selection in a multi-standard, multi-frequencey synthesizer
CN113114232B (en) Calibration method of voltage-controlled oscillator frequency calibration circuit
US7042253B2 (en) Self-calibrating, fast-locking frequency synthesizer
KR100532476B1 (en) Frequency synthesizer using a wide-band voltage controlled oscillator and fast adaptive frequency calibration technique
US6670861B1 (en) Method of modulation gain calibration and system thereof
US6844763B1 (en) Wideband modulation summing network and method thereof
US7129793B2 (en) Device for calibrating the frequency of an oscillator, phase looked loop circuit comprising said calibration device and related frequency calibration method
US7154342B2 (en) Phase locked loop circuit with a tunable oscillator and an independent frequency converter and frequency counter
US8010072B1 (en) Charge pump current compensation for phase-locked loop frequency synthesizer systems
CN103346790B (en) A kind of frequency synthesizer of quick lock in
EP2267900A1 (en) High resolution auto-tuning for a voltage controlled oscillator
CN110719099B (en) In-loop mixing phase-locked loop based on synthesizer
US6972633B2 (en) Calibrating a loop-filter of a phase locked loop
CN102195645A (en) Frequency synthesizer suitable for software radio system
CN117220700A (en) Local oscillator spurious avoidance circuit and method for broadband receiver
CN113489487B (en) Integrated VCO type phase discriminator and in-loop mixing type phase-locked loop circuit
CN114665870B (en) Multi-section VCO frequency calibration circuit and calibration method
CN117254805B (en) SUB-1G full-frequency coverage frequency integrated circuit
WO2004082196A2 (en) Frequency synthesizer with prescaler
KR102321030B1 (en) Signal synthesizer, signal synthesis method and communication apparatus adjusting automatically frequency deviation difference according to the two point modulation of the phase lock loop
Curtin Design a direct 6-GHz local oscillator with a wideband integer-N PLL synthesizer
US6597246B2 (en) Methods and apparatus for alteration of terminal counts of phase-locked loops
EP1638207B1 (en) Method of calibrating the frequency of an oscillator in a phase locked loop circuit
CN116414181A (en) Broadband agile source and signal simulator
JP2003318730A (en) Pll synthesizer oscillator

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant