CN113114029A - Ramp wave injection circuit giving consideration to both precision and speed and error compensation method for switching power supply - Google Patents
Ramp wave injection circuit giving consideration to both precision and speed and error compensation method for switching power supply Download PDFInfo
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- CN113114029A CN113114029A CN202110391748.9A CN202110391748A CN113114029A CN 113114029 A CN113114029 A CN 113114029A CN 202110391748 A CN202110391748 A CN 202110391748A CN 113114029 A CN113114029 A CN 113114029A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
- H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/06—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
- H02M3/07—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
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Abstract
The ramp injection circuit utilizes charging current related to the difference value of the output voltage of the switching power supply and reference voltage to charge a capacitor to generate ramp voltage, and resets the voltage value of the ramp voltage to zero under the control of a first control signal, thereby simultaneously realizing high speed and high precision; and generating a compensation voltage proportional to the reference voltage by using the error compensation module, and outputting the ramp voltage subtracted by the ramp injection circuit as a final ramp voltage. When the method is applied to the switching power supply, the ramp voltage is irrelevant to the working duty ratio of the switching device in the switching power supply, so that the problem of output error introduced by the fact that the ramp voltage is relevant to the working duty ratio of the switching device in the switching power supply in the traditional switching power supply with the ramp injection circuit integrated inside is solved, the output voltage of the switching power supply is kept constant under the conditions of different duty ratios, and the output error of the switching power supply is eliminated.
Description
Technical Field
The invention belongs to the technical field of power electronics, and relates to a ramp injection circuit with an error compensation function, in particular to a ramp injection circuit capable of giving consideration to both precision and speed, and a method for performing error compensation in a switching power supply by using the ramp injection circuit.
Background
With the development of technology, in order to meet market demands, the requirements on the switching power supply are higher and higher, and the switching power supply is generally required to have the advantages of high response speed and the like. The switching power supply with fixed on-time can integrate a ramp wave injection circuit in order to simplify peripheral devices and reduce output ripples. As shown in fig. 1, in a conventional fixed on-time switching power supply with an internally integrated ramp injection circuit, the ramp injection circuit generates a ramp voltage Vripple, which is superimposed on a reference voltage Vref, and then the ramp voltage Vripple is compared with a feedback voltage Vfb of an output voltage Vout of the switching power supply, and PWM is performed according to the comparison result.
However, in this structure, the injected ramp waves are different under different duty ratios, as shown in fig. 3, (b), (c), and (d) in fig. 3 are respectively the case where the ramp wave voltage Vripple corresponding to three different duty ratios is superposed with the reference voltage Vref and then compared with the feedback voltage Vfb, and (a) in fig. 3 is a schematic drawing of (b), (c), and (d) in fig. 3, and it can be seen that the ramp wave voltages Vripple corresponding to three different duty ratios are different, resulting in different superposed values of Vripple and Vref, and thus causing a change in the feedback voltage Vfb.
Since the switching power supply output voltage Vout is (Vfb) ((R1 + R2)/R1) ((Vref + Vripple) ((R1 + R2)/R1, the feedback voltage Vfb differs and the switching power supply output voltage Vout also differs for different duty ratios. It is obvious that the conventional ramp injection circuit causes the switching power supply to introduce an output error, and a ramp injection circuit capable of compensating the output error is required.
Disclosure of Invention
Aiming at the problem of output error introduced by the fact that a ramp voltage is related to the working duty ratio of a switching device in a switching power supply of an internal integrated ramp injection circuit, the invention provides a ramp injection circuit, which generates a ramp voltage which is unrelated to the working duty ratio of the switching device in the switching power supply through special time sequence control, generates a ramp voltage for charging a capacitor by using variable charging current, and takes a voltage proportional to a reference voltage as a compensation voltage, so that the invention can take both precision and speed into consideration. In addition, the invention also provides a scheme for applying the ramp injection circuit in the switching power supply, and the output error of the switching power supply is eliminated.
The technical scheme of the ramp wave injection circuit provided by the invention is as follows:
a ramp wave injection circuit giving consideration to both precision and speed comprises a ramp wave voltage generation module and an error compensation module;
the ramp voltage generation module comprises a capacitor and a charging current generation unit, and the charging current generation unit is used for generating charging current related to the difference value of the output voltage of the switching power supply and the reference voltage; the ramp voltage generation module charges the capacitor by using the charging current to generate ramp voltage with a linearly rising voltage value, resets under the control of a first control signal, and controls the voltage value of the ramp voltage to be reset to zero only when the first control signal is changed from a first state to a second state;
the error compensation module is used for generating a compensation voltage proportional to the reference voltage, and the ramp injection circuit subtracts the compensation voltage from the voltage on the capacitor to obtain a final ramp voltage.
Specifically, the ramp voltage generation module further includes a timing control unit and a logic control unit, the timing control unit is configured to generate a pulse signal according to the first control signal, the pulse signal is valid only when the first control signal is changed from a first state to a second state, and otherwise, the pulse signal is invalid;
the logic control unit comprises a first switch and a second switch; the first connecting end of the capacitor is grounded, and the second connecting end of the capacitor is connected with the current source after passing through the first switch on one hand and is grounded after passing through the second switch on the other hand; the first switch and the second switch are controlled by the pulse signal, the first switch is controlled to be switched off and the second switch is controlled to be switched on when the pulse signal is effective, and the first switch is controlled to be switched on and the second switch is controlled to be switched off when the pulse signal is ineffective; and the second connecting end of the capacitor outputs the ramp voltage.
Specifically, the time sequence control unit comprises a not gate and an and gate, wherein the input end of the not gate is connected with the first input end of the and gate and the first control signal, and the output end of the not gate is connected with the second input end of the and gate; the output end of the AND gate generates the pulse signal.
Specifically, the charging current generating unit includes an error amplifier and a transconductance amplifier, two input ends of the error amplifier are respectively connected to the sampling value of the output voltage of the switching power supply and the reference voltage, an output end of the error amplifier is connected to the input end of the transconductance amplifier, and the output end of the transconductance amplifier outputs the charging current.
Specifically, the transconductance amplifier comprises a first amplifier, a first NMOS transistor, a first PMOS transistor, a second PMOS transistor and a first resistor, wherein a positive input end of the first amplifier is connected with an output end of the error amplifier, a negative input end of the first amplifier is connected with a source electrode of the first NMOS transistor and is grounded through the first resistor, and an output end of the first amplifier is connected with a gate electrode of the first NMOS transistor; the grid electrode of the second PMOS tube is connected with the grid electrode and the drain electrode of the first PMOS tube and the drain electrode of the first NMOS tube, the source electrode of the second PMOS tube is connected with the source electrode of the first PMOS tube and is connected with a power supply, and the drain electrode of the second PMOS tube outputs the charging current.
Specifically, the error compensation module comprises a second amplifier, a second resistor, a third resistor, a fourth resistor and a fifth resistor, the second resistor and the third resistor are connected in series and in parallel between the reference voltage and the ground, and the series point of the second resistor and the third resistor is connected with the positive input end of the second amplifier; the fourth resistor and the fifth resistor are connected in series and in parallel between the output end of the second amplifier and the ground, and the series point of the fourth resistor and the fifth resistor is connected with the negative input end of the second amplifier; the output of the second amplifier generates the compensation voltage.
The ramp injection circuit provided by the invention is applied to a switching power supply to eliminate output errors, and the technical scheme is as follows:
the switching power supply uses a signal obtained by superposing a reference voltage with a ramp voltage as a comparison reference and is used for comparing with a feedback voltage of an output voltage of the switching power supply, and generates a pulse width modulation signal according to a comparison result to control the working duty ratio of a switching device in the switching power supply;
the error compensation method of the switching power supply comprises the following steps:
generating a charging current related to a difference value between a feedback voltage and a reference voltage of the output voltage of the switching power supply, enabling the charging current to charge a capacitor to enable the voltage on the capacitor to rise, and taking the voltage on the capacitor as the ramp voltage;
secondly, a switching device in the switching power supply comprises an upper power tube and a lower power tube which are connected in series and in parallel between a power supply and the ground, a signal of a series point of the upper power tube and the lower power tube is taken as a first control signal, and the voltage value of the ramp voltage is reset to zero only when the first control signal is changed from a low level to a high level, so that the ramp voltage is unrelated to the working duty ratio of the switching device in the switching power supply;
and thirdly, taking a signal obtained by superposing the reference voltage on the ramp voltage and subtracting a compensation voltage proportional to the reference voltage as a final comparison reference for comparison with a feedback voltage of the output voltage of the switching power supply, so that the comparison reference is constant, and the error caused by the ramp voltage is eliminated.
Specifically, the structure for generating the ramp voltage in the first step includes a timing control unit and a logic control unit;
the time sequence control unit is used for generating a pulse signal according to the first control signal, the pulse signal is effective only when the first control signal is changed from a low level to a high level, and otherwise, the pulse signal is ineffective;
the logic control unit comprises a first switch and a second switch, wherein a first connecting end of the capacitor is grounded, and a second connecting end of the capacitor is connected with the charging current after passing through the first switch on one hand and is grounded after passing through the second switch on the other hand; the first switch and the second switch are controlled by the pulse signal, the first switch is controlled to be switched off and the second switch is controlled to be switched on when the pulse signal is effective, the first switch is controlled to be switched on and the second switch is controlled to be switched off when the pulse signal is ineffective, and the second connecting end of the capacitor outputs the ramp voltage.
Specifically, a feedback voltage of the output voltage of the switching power supply and a reference voltage are input into an error amplifier to obtain an error voltage, and the error voltage is converted into a current signal through a transconductance amplifier to obtain the charging current.
In particular, when
When the reference voltage is directly used asThe compensation voltage of gmIs the transconductance of said transconductance amplifier, VddIs the voltage value, T, of the power supplyswIs the duty cycle of the switching power supply, C is the capacitance value of the capacitor, VrefIs the voltage value of the reference voltage.
The invention has the beneficial effects that: the ramp wave injection circuit provided by the invention utilizes a ramp wave reset technology to generate a ramp wave voltage irrelevant to the working duty ratio of a switching device in a switching power supply, and utilizes a voltage proportional to a reference voltage to compensate, so that the compensation of the error generated on a system by the traditional ramp wave voltage is realized, and the compensation speed is improved based on the ramp wave reset technology; meanwhile, the current related to the difference value of the output voltage of the switching power supply and the reference voltage is used as the charging current, so that the compensation precision is improved, and the speed and the precision can be considered.
The invention is applied to the switching power supply, can solve the problem of output error introduced by the correlation between the ramp voltage and the working duty ratio of a switching device in the switching power supply in the traditional switching power supply with an internally integrated ramp injection circuit, realizes the constant output voltage of the switching power supply under the condition of different duty ratios, and eliminates the output error of the switching power supply.
Drawings
The following description of various embodiments of the invention may be better understood with reference to the following drawings, which schematically illustrate major features of some embodiments of the invention. These figures and examples provide some embodiments of the invention in a non-limiting, non-exhaustive manner. For purposes of clarity, the same reference numbers will be used in different drawings to identify the same or similar elements or structures having the same function.
Fig. 1 is a schematic diagram of a switching power supply of a conventional integrated ramp injection circuit.
Fig. 2 is a schematic diagram of a conventional circuit for generating a ramp voltage.
Fig. 3 is a waveform diagram of a key signal under different duty cycles in a switching power supply of a conventional integrated ramp injection circuit, where (b) (c) (d) are a waveform diagram of a signal Vref + Vripple generated by controlling a control signal Vsw under three duty cycles and superimposed with a reference voltage Vref, and a waveform diagram of a corresponding feedback voltage Vfb, and the diagram (a) is a comparison diagram integrating the three cases.
Fig. 4 is a schematic diagram of applying the ramp injection circuit with speed and precision in the switching power supply.
Fig. 5 is a waveform diagram of a key node when the ramp injection circuit with speed and precision provided by the present invention is applied to a switching power supply, wherein (b), (c) and (d) are waveform diagrams obtained by respectively comparing a reference voltage Vref with a ramp voltage Vripple generated by control of a first control signal Vsw and subtracting a compensation voltage Vec with a feedback voltage Vfb of an output voltage of the switching power supply under three duty ratios, and the diagram (a) is a comparison diagram integrating the three conditions.
Fig. 6 is a specific circuit diagram of a ramp injection circuit in an embodiment of the present invention, which is capable of achieving both speed and accuracy.
Fig. 7 is a waveform diagram of a key signal of a ramp injection circuit with speed and precision compatible according to the present invention at different duty ratios, where (b) (c) (d) are waveforms of a ramp voltage Vripple generated by controlling a control signal Vsw and a compensation voltage Vec generated at three duty ratios, respectively, and (a) is a comparison diagram integrating the three conditions, it can be seen that the peak value of the ramp voltage Vripple is kept the same as the compensation voltage Vec at different duty ratios to compensate for an error introduced by the ramp voltage.
Fig. 8 is a circuit diagram of an implementation of a transconductance amplifier in a ramp injection circuit with speed and precision compatible according to the present invention.
Fig. 9 is a circuit diagram of a first implementation of an error compensation module in a ramp injection circuit according to the present invention, which is compatible with speed and precision.
Fig. 10 is a circuit diagram of a second implementation of the error compensation module in the ramp injection circuit according to the present invention, which is compatible with speed and precision.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in detail with reference to the accompanying drawings. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It is to be noted that, in the present invention, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. For example, the first state and the second state of the control signal may be interchanged, and the first state may represent a high level, and the second state may represent a low level, or the first state may represent a low level, and the second state may represent a high level, which does not affect the implementation of the technical solution of the present invention.
The ramp wave injection circuit provided by the invention comprises a ramp wave voltage generation module and an error compensation module, as shown in fig. 6, the ramp wave voltage generation module comprises a capacitor 201 and a charging current generation unit, the traditional ramp wave injection circuit charges the capacitor by using a fixed current, but the charging current generation unit provided by the invention generates a current related to the difference value between the output voltage of the switching power supply and the reference voltage as a charging current; as shown in fig. 6, a specific implementation structure of the charging current generation unit is provided, where the charging current generation unit includes an error amplifier 204 and a transconductance amplifier 205, two input terminals of the error amplifier 204 are respectively connected to a sampling value of the output voltage Vout of the switching power supply (for example, a feedback voltage Vfb obtained by dividing the output voltage Vout of the switching power supply by a voltage dividing resistor) and a reference voltage Vref, an output terminal of the error amplifier 204 is connected to an input terminal of the transconductance amplifier 205, and an output terminal of the transconductance amplifier 205 outputs a charging current. Since the error amplifier 204 is virtually short, Vfb is Vref and Vfb is Vref + Vripple-Vec when stable, and therefore Vripple is Vec when stable, the error introduced by the ramp wave is compensated.
As shown in fig. 8, an implementation structure of the transconductance amplifier 205 is provided, where the transconductance amplifier includes a first amplifier 301, a first NMOS transistor 303, a first PMOS transistor 304, a second PMOS transistor 305, and a first resistor 302, a positive input end of the first amplifier 301 is connected to an output end of the error amplifier, a negative input end of the first amplifier is connected to a source of the first NMOS transistor 303 and grounded after passing through the first resistor 302, and an output end of the first amplifier is connected to a gate of the first NMOS transistor 303; the gate of the second PMOS transistor 305 is connected to the gate and the drain of the first PMOS transistor 304 and the drain of the first NMOS transistor 303, the source thereof is connected to the source of the first PMOS transistor 304 and the power supply, and the drain thereof outputs the charging current.
The present invention is based on a ramp reset technique for resetting the ramp voltage Vripple under the control of the first control signal Vsw, the control logic being such that the voltage value of the ramp voltage Vripple is reset to zero only when the first control signal Vsw transitions from the first state to the second state, and then rises linearly from zero. As shown in fig. 6, an implementation structure of the ramp voltage generating module is provided, in this embodiment, the ramp voltage generating module further includes a timing control unit and a logic control unit in addition to the capacitor 201 and the charging current generating unit, the timing control unit is configured to generate a pulse signal according to the first control signal Vsw, and the pulse signal effectively controls the voltage value of the ramp voltage Vripple to be reset to zero only when the first control signal Vsw transitions from the first state to the second state, otherwise the pulse signal does not effectively control the voltage value of the ramp voltage Vripple to rise linearly. As shown in fig. 6, in the present embodiment, a not gate 210 and an and gate 211 are used to generate the pulse signal, the input terminal of the not gate 210 is connected to the first input terminal of the and gate 211 and the first control signal Vsw, and the output terminal thereof is connected to the second input terminal of the and gate 211; the output of the and gate 211 generates a pulse signal.
As shown in fig. 6, in this embodiment, the logic control unit includes a first switch 202 and a second switch 203, a first connection end of a capacitor 201 is grounded, and a second connection end of the capacitor is connected to a charging current 204 after passing through the first switch 202, and is grounded after passing through the second switch 203; the first switch 202 and the second switch 203 are controlled by pulse signals, when the pulse signals are effective, the first switch 202 is controlled to be switched off, the second switch 203 is controlled to be switched on, and when the pulse signals are ineffective, the first switch 202 is controlled to be switched on, and the second switch 203 is controlled to be switched off; a second connection of the capacitor 201 outputs a ramp voltage Vripple.
The invention can be applied to the switching power supply, and is particularly suitable for the switching power supply with fixed on-time because the switching power supply with fixed on-time (including fixed off-time) often has the requirement of ramp wave injection in order to reduce output ripple waves. When the present invention is applied to a switching power supply with a fixed on-time, the control signal may be generated according to the voltage Vsw at the connection point of the upper power transistor 106 and the lower power transistor 107 in the switching power supply, for example, the voltage Vsw at the connection point of the upper power transistor 106 and the lower power transistor 107 in the switching power supply is directly taken as the first control signal Vsw in the embodiment shown in fig. 4, so that the first state of the first control signal Vsw in this embodiment is a low level, the second state is a high level, and the pulse signal generates an effective pulse when the first control signal Vsw is turned from low to high.
In the switching power supply, an upper power tube 106 and a lower power tube 107 are connected in series and in parallel between a power supply and the ground, a gate drive signal of the upper power tube 106 and the lower power tube 107 is controlled by a PWM pulse width modulation module 101, the conventional switching power supply integrated with a ramp wave circuit uses a reference voltage Vref superposed with a ramp wave voltage Vripple as a comparison reference, and then the reference voltage is compared with a feedback voltage Vfb of an output voltage of the switching power supply, the PWM pulse width modulation module 101 is adjusted according to a comparison result, because the ramp wave voltage Vripple is generated according to a voltage Vsw at a connection part of the upper power tube 106 and the lower power tube 107, the ramp wave voltage Vripple is related to a working duty ratio of a switching device in the switching power supply, and when the working duty ratios of the switching device in the switching power supply are different, the superposed ramp wave voltage vrip.
In the present embodiment, the timing control unit is utilized to generate a control signal V and a first control signal VSWPulse signal with aligned rising edges and complexThe ramp wave is always aligned with the working period Tsw of the switching power supply, and the working period does not change along with the duty ratio, so that the ramp wave voltage Vripple generated by the embodiment is not changed when the duty ratio is changed, and therefore, an error introduced by the ramp wave voltage Vripple can be compensated by generating a proper direct current voltage Vec through the error compensation module.
The invention utilizes an error compensation module to generate a compensation voltage Vec proportional to a reference voltage Vref, and as shown in fig. 9, a first implementation structure of the error compensation module in the embodiment is provided, which comprises a second amplifier 400, a second resistor 403, a third resistor 404, a fourth resistor 401 and a fifth resistor 402, wherein the second resistor 403 and the third resistor 404 are connected in series and in parallel between the reference voltage Vref and the ground, and the series point is connected with the positive input end of the second amplifier 400; the fourth resistor 401 and the fifth resistor 402 are connected in series and in parallel between the output terminal of the second amplifier 400 and the ground, and the series point is connected with the negative input terminal of the second amplifier 400; the output of the second amplifier 400 generates the compensation voltage Vec. A second implementation of the error compensation module in the embodiment shown in fig. 10 is shown, and compared with the structure shown in fig. 9, the error compensation module in the structure shown in fig. 10 removes the voltage dividing resistor in the structure shown in fig. 9, and implements a different ratio between the compensation voltage Vec and the reference voltage Vref.
When the capacitance of capacitor 201 and the transconductance of transconductance amplifier 205 are set to appropriate values (i.e., the values are set to be appropriate)
) Then, the reference voltage Vref may be directly output as the compensation voltage Vec, where gmIs the transconductance of a transconductance amplifier, VddFor the voltage value of the power supply, TswFor the duty cycle of the switching power supply, C is the capacitance of the capacitor, VrefIs the voltage value of the reference voltage.
When the invention is applied to a switching power supply, the ramp voltage Vripple can be connected to one positive input end of the comparator 102, and the compensation voltage Vec can be connected to one negative input end of the comparator 102, as shown in fig. 4, the other positive input end of the comparator 102 is connected to the reference voltage Vref, and the other negative input end of the comparator 102 is connected to the feedback voltage Vfb after the output voltage is divided by the resistor, so that the reference voltage Vref is superposed with the initial ramp voltage Vripple, and the signal obtained by subtracting the compensation voltage Vec is used as a new comparison reference to be compared with the feedback voltage Vfb.
As shown in fig. 5, the waveform diagram is obtained by comparing the new comparison reference Vref + Vripple-Vec with the feedback voltage Vfb, and (b), (c) and (d) in fig. 5 are the comparison conditions of the new comparison reference Vref + Vripple-Vec and the feedback voltage Vfb corresponding to three different duty ratios, respectively, and (a) in fig. 5 is a schematic diagram obtained by drawing (b), (c) and (d) in fig. 5 together.
To sum up, in order to increase the ramp wave generation speed, the ramp wave generation circuit generates a ramp wave voltage irrelevant to the working duty ratio of a switching device in a switching power supply based on a ramp wave reset technology, and because the ramp wave is always aligned with the working period Tsw and the working period does not change along with the duty ratio, an error amplifier is not needed to adjust the slope of the ramp wave when the duty ratio changes, so that the response speed of a system is increased; meanwhile, the error compensation module is used for generating a direct current voltage as a compensation voltage, and subtracting the compensation voltage from the ramp voltage to obtain a final ramp voltage; in addition, in order to improve the generation precision of the ramp wave, a mode of charging a capacitor by using a current related to the difference value between the output voltage of the switching power supply and a reference voltage as a charging current to generate the ramp wave voltage is proposed, and the error amplifier 204 is short virtually, so that Vfb is equal to Vref in the stable state, and Vfb is equal to Vref + Vtple-Vec in the stable state, so that Vtple is equal to Vec in the stable state, and the error introduced by the ramp wave is compensated, thereby ensuring that the speed and the precision can be compatible.
Although the embodiments show specific structures of the ramp voltage generation module and the error compensation module, those skilled in the art should understand that other structures capable of achieving the same effect can be applied to the present invention, and those skilled in the art can make various other specific modifications and combinations according to the technical teaching disclosed in the present invention without departing from the spirit of the present invention, and the modifications and combinations are still within the scope of the present invention.
Claims (10)
1. A ramp wave injection circuit giving consideration to both precision and speed is characterized by comprising a ramp wave voltage generation module and an error compensation module;
the ramp voltage generation module comprises a capacitor and a charging current generation unit, and the charging current generation unit is used for generating charging current related to the difference value of the output voltage of the switching power supply and the reference voltage; the ramp voltage generation module charges the capacitor by using the charging current to generate ramp voltage with a linearly rising voltage value, resets under the control of a first control signal, and controls the voltage value of the ramp voltage to be reset to zero only when the first control signal is changed from a first state to a second state;
the error compensation module is used for generating a compensation voltage proportional to the reference voltage, and the ramp injection circuit subtracts the compensation voltage from the voltage on the capacitor to obtain a final ramp voltage.
2. The circuit of claim 1, wherein the ramp voltage generation module further comprises a timing control unit and a logic control unit, the timing control unit is configured to generate a pulse signal according to the first control signal, the pulse signal is enabled only when the first control signal transitions from a first state to a second state, and the pulse signal is disabled otherwise;
the logic control unit comprises a first switch and a second switch; the first connecting end of the capacitor is grounded, and the second connecting end of the capacitor is connected with the current source after passing through the first switch on one hand and is grounded after passing through the second switch on the other hand; the first switch and the second switch are controlled by the pulse signal, the first switch is controlled to be switched off and the second switch is controlled to be switched on when the pulse signal is effective, and the first switch is controlled to be switched on and the second switch is controlled to be switched off when the pulse signal is ineffective; and the second connecting end of the capacitor outputs the ramp voltage.
3. The ramp injection circuit with both precision and speed as claimed in claim 2, wherein the timing control unit comprises a not gate and an and gate, wherein the input end of the not gate is connected to the first input end of the and gate and the first control signal, and the output end of the not gate is connected to the second input end of the and gate; the output end of the AND gate generates the pulse signal.
4. The circuit of any one of claims 1 to 3, wherein the charging current generating unit includes an error amplifier and a transconductance amplifier, two input terminals of the error amplifier are respectively connected to the sampled value of the output voltage of the switching power supply and the reference voltage, an output terminal of the error amplifier is connected to an input terminal of the transconductance amplifier, and an output terminal of the transconductance amplifier outputs the charging current.
5. The ramp wave injection circuit with both precision and speed as claimed in claim 4, wherein the transconductance amplifier comprises a first amplifier, a first NMOS transistor, a first PMOS transistor, a second PMOS transistor and a first resistor, a positive input terminal of the first amplifier is connected to an output terminal of the error amplifier, a negative input terminal of the first amplifier is connected to a source of the first NMOS transistor and grounded through the first resistor, and an output terminal of the first amplifier is connected to a gate of the first NMOS transistor; the grid electrode of the second PMOS tube is connected with the grid electrode and the drain electrode of the first PMOS tube and the drain electrode of the first NMOS tube, the source electrode of the second PMOS tube is connected with the source electrode of the first PMOS tube and is connected with a power supply, and the drain electrode of the second PMOS tube outputs the charging current.
6. The precision and speed compatible ramp injection circuit according to claim 1 or 5, wherein the error compensation module comprises a second amplifier, a second resistor, a third resistor, a fourth resistor and a fifth resistor, the second resistor and the third resistor are connected in series and in parallel between the reference voltage and the ground, and the series point of the second resistor and the third resistor is connected with the positive input end of the second amplifier; the fourth resistor and the fifth resistor are connected in series and in parallel between the output end of the second amplifier and the ground, and the series point of the fourth resistor and the fifth resistor is connected with the negative input end of the second amplifier; the output of the second amplifier generates the compensation voltage.
7. The switching power supply uses a signal obtained by superposing a reference voltage with a ramp voltage as a comparison reference and is used for comparing with a feedback voltage of an output voltage of the switching power supply, and generates a pulse width modulation signal according to a comparison result to control the working duty ratio of a switching device in the switching power supply;
the error compensation method of the switching power supply is characterized by comprising the following steps:
generating a charging current related to a difference value between a feedback voltage and a reference voltage of the output voltage of the switching power supply, enabling the charging current to charge a capacitor to enable the voltage on the capacitor to rise, and taking the voltage on the capacitor as the ramp voltage;
secondly, a switching device in the switching power supply comprises an upper power tube and a lower power tube which are connected in series and in parallel between a power supply and the ground, a signal of a series point of the upper power tube and the lower power tube is taken as a first control signal, and the voltage value of the ramp voltage is reset to zero only when the first control signal is changed from a low level to a high level, so that the ramp voltage is unrelated to the working duty ratio of the switching device in the switching power supply;
and thirdly, taking a signal obtained by superposing the reference voltage on the ramp voltage and subtracting a compensation voltage proportional to the reference voltage as a final comparison reference for comparison with a feedback voltage of the output voltage of the switching power supply, so that the comparison reference is constant, and the error caused by the ramp voltage is eliminated.
8. The error compensation method of claim 7, wherein the structure for generating the ramp voltage in the first step comprises a timing control unit and a logic control unit;
the time sequence control unit is used for generating a pulse signal according to the first control signal, the pulse signal is effective only when the first control signal is changed from a low level to a high level, and otherwise, the pulse signal is ineffective;
the logic control unit comprises a first switch and a second switch, wherein a first connecting end of the capacitor is grounded, and a second connecting end of the capacitor is connected with the charging current after passing through the first switch on one hand and is grounded after passing through the second switch on the other hand; the first switch and the second switch are controlled by the pulse signal, the first switch is controlled to be switched off and the second switch is controlled to be switched on when the pulse signal is effective, the first switch is controlled to be switched on and the second switch is controlled to be switched off when the pulse signal is ineffective, and the second connecting end of the capacitor outputs the ramp voltage.
9. The method according to claim 8, wherein the feedback voltage of the output voltage of the switching power supply and the reference voltage are input into an error amplifier to obtain an error voltage, and the error voltage is converted into a current signal by a transconductance amplifier to obtain the charging current.
10. The error compensation method of claim 9, wherein the error compensation method is performed when the switching power supply is in a standby mode
Directly using the reference voltage as the compensation voltage, wherein gmIs the transconductance of said transconductance amplifier, VddIs the voltage value, T, of the power supplyswIs the duty cycle of the switching power supply, C is the capacitance value of the capacitor, VrefIs the voltage value of the reference voltage.
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| CN117118206A (en) * | 2023-10-08 | 2023-11-24 | 深圳市微源半导体股份有限公司 | Current generating circuit, switching converter and switching power supply |
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