CN113098538A - Device for power supply time sequence abnormity and control method thereof - Google Patents

Device for power supply time sequence abnormity and control method thereof Download PDF

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Publication number
CN113098538A
CN113098538A CN202110241417.7A CN202110241417A CN113098538A CN 113098538 A CN113098538 A CN 113098538A CN 202110241417 A CN202110241417 A CN 202110241417A CN 113098538 A CN113098538 A CN 113098538A
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China
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power supply
processing unit
conversion processing
input
reset module
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CN202110241417.7A
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CN113098538B (en
Inventor
任侃侃
史剑锋
燕官锋
张志龙
成传湘
梁广军
白洁
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HEBEI JINGHE ELECTRONIC TECHNOLOGY CO LTD
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HEBEI JINGHE ELECTRONIC TECHNOLOGY CO LTD
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06Receivers
    • H04B1/16Circuits
    • H04B1/1607Supply circuits

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Transceivers (AREA)

Abstract

The invention relates to the technical field of signal time sequence, in particular to a device for power supply time sequence abnormity and a control method thereof. The invention effectively solves the problem that the down-conversion processing unit is unlocked due to the external power supply time sequence in the radio frequency module.

Description

Device for power supply time sequence abnormity and control method thereof
Technical Field
The invention relates to the technical field of signal time sequence, in particular to a device for power supply time sequence abnormity and a control method thereof.
Background
At present, a radio frequency module used by a receiver is based on the principle that a radio frequency input signal sequentially passes through a power divider, an amplifier, a filter, a down-conversion processing unit and an intermediate frequency amplifier to output an intermediate frequency signal, wherein the down-conversion processing unit is provided with a power input and a power input respectively and enters the down-conversion processing unit through a reference unit. In the practical application of the technology, when the external power supply is powered on frequently or has an uncertain time sequence, the down-conversion processing unit is unlocked when the external power supply is powered on frequently or the power supply is stepped, so that the radio frequency output in the whole radio frequency module is abnormal, and the receiver cannot work normally.
Disclosure of Invention
The invention aims to ensure the normal work of the radio frequency module under the conditions of frequent power-on of an external power supply time sequence and power supply steps.
In order to achieve the purpose, the invention provides the following technical scheme:
a device for power supply timing anomaly, comprising: the device comprises an input power supply (1), a reset module (2), a power switch (3), a radio frequency signal input (5), a power divider (6), an amplifier (7), a filter (8), a down-conversion processing unit (4), an intermediate frequency amplifier (10), a reference unit (9) and an intermediate frequency signal output (11); the radio frequency signal input device comprises an input power supply (1), a power switch (3), a reset module (2) and a reference unit (9), wherein the input power supply (1) is electrically connected with the power switch (3), the reset module (2) and the reference unit (9), a radio frequency signal input (5) sequentially passes through a power divider (6), an amplifier (7), a filter (8), a down-conversion processing unit (4) and an intermediate frequency amplifier (10) to an intermediate frequency signal output (11), the reference unit (9) and the power switch (3) are electrically connected with the down-conversion processing unit (4) respectively, and the reset.
The technical scheme of the invention is further improved as follows: the power switch (3) is respectively connected with the input power supply (1) at an in position, the reset module (2) at an on position and the down-conversion processing unit (4) at an out position.
The technical scheme of the invention is further improved as follows: the voltage of the input power supply (1) is 3.3V.
The technical scheme of the invention is further improved as follows: the input voltage of the reset module (2) is 3.3V.
The technical scheme of the invention is further improved as follows: the voltage of the out bit of the power switch (3) which is input to the down-conversion processing unit (4) is 3.3V.
The technical scheme of the invention is further improved as follows: the Reset module (2) is a Reset chip.
A method for controlling power supply time sequence abnormity comprises the following steps:
step 1: powering up a control system: the reset module (2) detects external voltage, when the external voltage is detected to be larger than the threshold voltage of the reset module (2), the reset module (2) generates a reset signal, meanwhile, the reference unit (9) generates a reference signal to the down-conversion processing unit (4), and the amplifier (7) and the intermediate frequency amplifier (10) start to work;
step 2: after the ON end of the power switch (3) receives the reset signal, the power switch (3) is conducted, 3.3V voltage is output to the down-conversion processing unit (4), and the down-conversion processing unit (4) starts to work at the moment;
and step 3: the down-conversion processing unit (4) is normally powered on, and after receiving the signal output by the reference unit (9), a phase-locked loop in the down-conversion processing unit (4) locks a local oscillator signal to enable the frequency mixer to work;
and 4, step 4: when a radio frequency signal (5) is input, the radio frequency signal is subjected to power division through a power divider (6), amplified and filtered through an amplifier (7) and a filter (8), then converted into an intermediate frequency signal through a down-conversion processing unit (4), and amplified through an intermediate frequency amplifier (11), and the intermediate frequency signal is output (11) to a user.
The technical scheme of the invention is further improved as follows: in the step 1: the threshold voltage of the reset module (2) is 140ms-460 ms.
Compared with the prior art, the device for power supply time sequence abnormity and the control method thereof have the following beneficial effects:
1. the invention provides a device for power supply time sequence abnormity and a control method thereof, which are integrated in a smaller space and have low cost, and the adaptability of a product to an external power supply is improved in design, so that the competitiveness of the product is enhanced.
2. The invention provides a device for power supply time sequence abnormity and a control method thereof, which effectively solve the problem that a down-conversion processing unit is unlocked due to external power supply time sequence in a radio frequency module.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a diagram of a power supply timing abnormality apparatus and a control method thereof according to the present invention.
Reference numerals: 1-input power; 2-a reset module; 3-a power switch; 4-a down-conversion processing unit; 5-radio frequency signal input; 6-power divider; 7-an amplifier; 8-a filter; 9-a reference cell; 10-an intermediate frequency amplifier; and 11, outputting the intermediate frequency signal.
Detailed Description
The technical solution of the present invention will be clearly and completely described by the following detailed description. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
As shown in fig. 1, the apparatus for power supply timing abnormality includes: the device comprises an input power supply (1), a reset module (2), a power switch (3), a radio frequency signal input (5), a power divider (6), an amplifier (7), a filter (8), a down-conversion processing unit (4), an intermediate frequency amplifier (10), a reference unit (9) and an intermediate frequency signal output (11); the radio frequency signal input device comprises an input power supply (1), a power switch (3), a reset module (2) and a reference unit (9), wherein the input power supply (1) is electrically connected with the power switch (3), the reset module (2) and the reference unit (9), a radio frequency signal input (5) sequentially passes through a power divider (6), an amplifier (7), a filter (8), a down-conversion processing unit (4) and an intermediate frequency amplifier (10) to an intermediate frequency signal output (11), the reference unit (9) and the power switch (3) are electrically connected with the down-conversion processing unit (4) respectively, and the reset.
Preferably: the power switch (3) is respectively connected with the input power supply (1) at an in position, the reset module (2) at an on position and the down-conversion processing unit (4) at an out position.
Preferably: the voltage of the input power supply (1) is 3.3V.
Preferably: the input voltage of the reset module (2) is 3.3V.
Preferably: the voltage of the out bit of the power switch (3) which is input to the down-conversion processing unit (4) is 3.3V.
Preferably: the Reset module (2) is a Reset chip; the Reset chip in this embodiment is any one of CAT809 series, MAX809 series, UM809 series, and IMP811 series.
A method for controlling power supply time sequence abnormity comprises the following steps:
step 1: powering up a control system: the reset module (2) detects external voltage, when the external voltage is detected to be larger than the threshold voltage of the reset module (2), the reset module (2) generates a reset signal, meanwhile, the reference unit (9) generates a reference signal to the down-conversion processing unit (4), and the amplifier (7) and the intermediate frequency amplifier (10) start to work;
step 2: after the ON end of the power switch (3) receives the reset signal, the power switch (3) is conducted, 3.3V voltage is output to the down-conversion processing unit (4), and the down-conversion processing unit (4) starts to work at the moment;
and step 3: the down-conversion processing unit (4) is normally powered on, and after receiving the signal output by the reference unit (9), a phase-locked loop in the down-conversion processing unit (4) locks a local oscillator signal to enable the frequency mixer to work;
and 4, step 4: when a radio frequency signal (5) is input, the radio frequency signal is subjected to power division through a power divider (6), amplified and filtered through an amplifier (7) and a filter (8), then converted into an intermediate frequency signal through a down-conversion processing unit (4), and amplified through an intermediate frequency amplifier (11), and the intermediate frequency signal is output (11) to a user.
Preferably: in the step 1: the threshold voltage of the reset module (2) is 140ms-460 ms.
In this embodiment, the timing requirement of the down-conversion processing unit (4) is that the reference unit (9) is fed first, and then the down-conversion processing unit (4) is powered on; therefore, the timing problem of the down-conversion processing unit (4) is solved by combining the reset module (2) and the power switch (3). By adopting the reset module (2) with the threshold voltage of 2.63V and the power switch (3) with high effective enable, when the power voltage is reduced to be below 2.63V, the reset module (2) can generate a reset signal, output a low level and disconnect the power switch (3); when the power supply voltage rises to be more than 2.63V, the low level of the reset signal is kept for at least 140ms, and then the reset signal is released, namely the high level is restored, so that the power supply switch (3) is opened; when the 3.3V voltage of the power switch (3) is output and the 3.3V voltage of the power switch (3) is input, the delay time is about 280 ms; the direct current internal resistance of the power switch (3) is 16m omega, and the current of the down-conversion processing unit (4) is about 100mA, so that the power switch (3) cannot generate voltage drop; the method delays the time by about 460ms, and cannot influence the 90S positioning time of the whole machine.
The above-mentioned embodiments are merely illustrative of the preferred embodiments of the present invention, and do not limit the scope of the present invention, and various modifications and improvements of the technical solution of the present invention by those skilled in the art should fall within the protection scope defined by the claims of the present invention without departing from the spirit of the present invention.

Claims (8)

1. A device for power supply timing anomaly, comprising: the device comprises an input power supply (1), a reset module (2), a power switch (3), a radio frequency signal input (5), a power divider (6), an amplifier (7), a filter (8), a down-conversion processing unit (4), an intermediate frequency amplifier (10), a reference unit (9) and an intermediate frequency signal output (11); the radio frequency signal input device comprises an input power supply (1), a power switch (3), a reset module (2) and a reference unit (9), wherein the input power supply (1) is electrically connected with the power switch (3), the reset module (2) and the reference unit (9), a radio frequency signal input (5) sequentially passes through a power divider (6), an amplifier (7), a filter (8), a down-conversion processing unit (4) and an intermediate frequency amplifier (10) to an intermediate frequency signal output (11), the reference unit (9) and the power switch (3) are electrically connected with the down-conversion processing unit (4) respectively, and the reset.
2. A device for power supply timing exception according to claim 1 wherein: the power switch (3) is respectively connected with the input power supply (1) at an in position, the reset module (2) at an on position and the down-conversion processing unit (4) at an out position.
3. A device for power supply timing exception according to claim 1 wherein: the voltage of the input power supply (1) is 3.3V.
4. A device for power supply timing exception according to claim 1 wherein: the input voltage of the reset module (2) is 3.3V.
5. A device for power supply timing exception according to claim 1 wherein: the voltage of the out bit of the power switch (3) which is input to the down-conversion processing unit (4) is 3.3V.
6. A device for power supply timing exception according to claim 1 wherein: the Reset module (2) is a Reset chip.
7. A method for controlling power supply time sequence abnormity is characterized by comprising the following steps:
step 1: powering up a control system: the reset module (2) detects external voltage, when the external voltage is detected to be larger than the threshold voltage of the reset module (2), the reset module (2) generates a reset signal, meanwhile, the reference unit (9) generates a reference signal to the down-conversion processing unit (4), and the amplifier (7) and the intermediate frequency amplifier (10) start to work;
step 2: after the ON end of the power switch (3) receives the reset signal, the power switch (3) is conducted, 3.3V voltage is output to the down-conversion processing unit (4), and the down-conversion processing unit (4) starts to work at the moment;
and step 3: the down-conversion processing unit (4) is normally powered on, and after receiving the signal output by the reference unit (9), a phase-locked loop in the down-conversion processing unit (4) locks a local oscillator signal to enable the frequency mixer to work;
and 4, step 4: when a radio frequency signal (5) is input, the radio frequency signal is subjected to power division through a power divider (6), amplified and filtered through an amplifier (7) and a filter (8), then converted into an intermediate frequency signal through a down-conversion processing unit (4), and amplified through an intermediate frequency amplifier (11), and the intermediate frequency signal is output (11) to a user.
8. The power supply timing abnormality control method according to claim 7, characterized in that in said step 1: the threshold voltage of the reset module (2) is 140ms-460 ms.
CN202110241417.7A 2021-03-04 2021-03-04 Device for power supply time sequence abnormity and control method thereof Active CN113098538B (en)

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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102035264A (en) * 2009-09-28 2011-04-27 瑞萨电子株式会社 Semiconductor device and radio communication device
US20110134337A1 (en) * 2008-08-11 2011-06-09 Yasunari Takiguchi Receiver apparatus, receivng method, and program
CN202182943U (en) * 2011-08-15 2012-04-04 河北晶禾电子技术有限公司 Compatible dual-path dual-system four-frequency-point satellite navigation positioning and orientating receiver
US20130029617A1 (en) * 2010-04-09 2013-01-31 Huawei Device Co., Ltd. Voltage driving apparatus for power amplifier, power amplifying system, power supply device and communication device
CN103117762A (en) * 2012-12-17 2013-05-22 青岛力宇仓储机械设备有限公司 Double-channel receiving front-end circuit
CN203554427U (en) * 2013-11-21 2014-04-16 武汉大学 Multi-frequency receiver radio frequency front-end device
CN209105156U (en) * 2018-11-26 2019-07-12 北京遥测技术研究所 A kind of RF Receiving Device

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110134337A1 (en) * 2008-08-11 2011-06-09 Yasunari Takiguchi Receiver apparatus, receivng method, and program
CN102035264A (en) * 2009-09-28 2011-04-27 瑞萨电子株式会社 Semiconductor device and radio communication device
US20130029617A1 (en) * 2010-04-09 2013-01-31 Huawei Device Co., Ltd. Voltage driving apparatus for power amplifier, power amplifying system, power supply device and communication device
CN202182943U (en) * 2011-08-15 2012-04-04 河北晶禾电子技术有限公司 Compatible dual-path dual-system four-frequency-point satellite navigation positioning and orientating receiver
CN103117762A (en) * 2012-12-17 2013-05-22 青岛力宇仓储机械设备有限公司 Double-channel receiving front-end circuit
CN203554427U (en) * 2013-11-21 2014-04-16 武汉大学 Multi-frequency receiver radio frequency front-end device
CN209105156U (en) * 2018-11-26 2019-07-12 北京遥测技术研究所 A kind of RF Receiving Device

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