CN113096609B

CN113096609B - Control chip applied to dynamic update rate and related driving method

Info

Publication number: CN113096609B
Application number: CN202010021413.3A
Authority: CN
Inventors: 陈立昂
Original assignee: Realtek Semiconductor Corp
Current assignee: Realtek Semiconductor Corp
Priority date: 2020-01-09
Filing date: 2020-01-09
Publication date: 2022-06-07
Anticipated expiration: 2040-01-09
Also published as: CN113096609A

Abstract

The invention discloses a control chip applied to dynamic update rate and a related driving method. The storage unit is used for storing the preset vertical update rate of the display panel. The processor circuit is coupled to the storage unit and is used for providing a switching signal to the backlight driving chip so that the backlight driving chip enables the backlight module according to the switching signal, and the frequency of the switching signal is equal to the preset vertical update rate. If the processor circuit does not receive the vertical update start pulse beyond a preset frame time corresponding to a preset vertical update rate, the processor circuit increases the frequency of the switching signal.

Description

Control chip applied to dynamic update rate and related driving method

Technical Field

The present disclosure relates to a display system, and more particularly, to a control chip and a driving method for providing a uniform equivalent brightness at a dynamic update rate.

Background

Liquid crystal displays that support a dynamic Refresh Rate (VRR) often use a strobe backlight (strobe backlight) with high brightness but short duration to solve motion blur, and further turn the backlight on and off when the Refresh Rate is reduced to make the user feel the same equivalent brightness, however, turning the backlight on and off can not effectively solve the motion blur. In addition, the above-mentioned method needs to switch the duty cycle of the backlight module control signal at a high speed, but the control signal is usually difficult to be changed to the target waveform immediately based on the characteristics of charging and discharging of the capacitor in the circuit. Therefore, the backlight modules in the market cannot provide consistent equivalent brightness at a dynamic update rate.

Disclosure of Invention

The present disclosure provides a control chip for coupling a backlight driving chip and a display panel. The control chip comprises a storage unit and a processor circuit. The storage unit is used for storing the preset vertical update rate of the display panel. The processor circuit is coupled to the storage unit and is used for providing a switching signal to the backlight driving chip so that the backlight driving chip enables the backlight module according to the switching signal, and the frequency of the switching signal is equal to the preset vertical update rate. If the processor circuit does not receive the vertical update start pulse beyond a predetermined frame time corresponding to a predetermined vertical update rate, the processor circuit increases the frequency of the switching signal.

The present disclosure provides a display system, which includes a display panel, a backlight module and a backlight driving chip. The backlight driving chip is coupled to the backlight module. The control chip is coupled to the display panel and the backlight driving chip, and includes a storage unit and a processor circuit. The storage unit is used for storing the preset vertical update rate of the display panel. The processor circuit is coupled to the storage unit and is used for providing a switching signal to the backlight driving chip so that the backlight driving chip enables the backlight module according to the switching signal, and the frequency of the switching signal is equal to the preset vertical update rate. If the processor circuit does not receive the vertical update start pulse beyond a preset frame time corresponding to a preset vertical update rate, the processor circuit increases the frequency of the switching signal.

The present disclosure provides a driving method, which is suitable for a control chip. The control chip is used for being coupled with the display panel and the backlight driving chip. The driving method comprises the following procedures: providing a switching signal to the backlight driving chip to enable the backlight module according to the switching signal, wherein the frequency of the switching signal is equal to the preset vertical update rate of the display panel; judging whether a vertical update start pulse is not received in excess of a preset frame time corresponding to a preset vertical update rate; and if the vertical updating start pulse is not received within the preset frame time, increasing the frequency of the switching signal.

The control chip, the display system and the driving method can provide consistent equivalent brightness under the dynamic update rate.

Drawings

Fig. 1 is a simplified functional block diagram of a display device according to an embodiment of the present disclosure.

Fig. 2 is a simplified waveform diagram of a plurality of signals associated with a display device according to an embodiment of the disclosure.

Fig. 3 is a flowchart of a driving method according to an embodiment of the disclosure.

Fig. 4 is a simplified waveform diagram of a plurality of signals associated with a display device according to another embodiment of the disclosure.

Detailed Description

Embodiments of the present disclosure will be described below with reference to the accompanying drawings. In the drawings, the same reference numerals denote the same or similar components or method flows.

Fig. 1 is a simplified functional block diagram of a display device 100 according to an embodiment of the present disclosure. Fig. 2 is a simplified waveform diagram of a plurality of signals associated with the display device 100 according to an embodiment of the disclosure. Referring to fig. 1 and fig. 2, the display device 100 includes a control chip 110, a backlight driving chip 120, a backlight module 130, and a display panel 140. In the present embodiment, the display apparatus 100 supports a dynamic update rate, wherein the dynamic update rate means that the vertical update frequency of the display screen may be non-constant. For simplicity and ease of illustration, other components and connections in the display device 100 are not shown in fig. 1.

The control chip 110 is coupled to the backlight driving chip 120 and the display panel 140, and includes a processor circuit 112, an interface circuit 114, and a storage unit 116. The storage unit 116 stores a predetermined vertical update rate (e.g., 120Hz or 144Hz) of the display panel 140. In some embodiments, the predetermined vertical update rate is the highest vertical update rate supported by the display panel 140. The interface circuit 114 is used for receiving the display signal Ds from an external device (not shown), such as a separate display adapter or a central processing unit, and for analyzing the vertical synchronization signal Vsync and the data signal Da from the display signal Ds. The processor circuit 112 is coupled to the interface circuit 114 and the storage unit 116, and is configured to provide a Pulse Width Modulation (PWM) control signal Pm and a switching signal Sw to the backlight driving chip 120. The processor circuit 112 adjusts the waveforms of the PWM control signal Pm and the switch signal Sw according to the vertical synchronization signal Vsync and the predetermined vertical update rate of the display panel 140, and the detailed adjustment method will be described in the following paragraphs.

The processor circuit 112 is also used for optimizing the data signal Da, such as adjusting the image resolution and the image aspect ratio in the data signal Da. The display panel 140 includes a display driver 142 and a pixel matrix 144, and the display driver 142 is used for driving the pixel matrix 144 according to the optimized data signal Da' to display the image.

The backlight driving chip 120 is coupled to the backlight module 130 and is used for providing a driving current Idr to enable the backlight module 130. The backlight driving chip 120 determines whether to provide the driving current Idr according to the switching signal Sw, and determines the current magnitude of the driving current Idr according to the duty cycle of the PWM control signal Pm. In one embodiment, the duty cycle of the PWM control signal Pm is positively correlated to the current value of the driving current Idr. The duty cycle is a signal on (logic 1) time divided by a ratio (ratio) of the signal period.

In practice, the processor Circuit 112 may be implemented by a general purpose processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA), other Programmable logic devices (FPGA), or a combination of one or more of the above. The interface circuit 114 may be implemented with any receiving circuit that supports DisplayPort, HDMI, and/or DVI signal formats. Storage unit 116 may be a non-volatile memory, such as: Read-Only Memory (ROM), Flash Memory (Flash), or other suitable types of Memory, although the invention is not limited thereto. The display panel 140 may be implemented as a liquid crystal display panel. In some embodiments, the control chip 110 may be a scaling controller chip (Scaler IC).

Fig. 3 is a flow chart of a driving method 300 according to an embodiment of the disclosure. The control chip 110 can execute the driving method 300 to adaptively determine the switching frequency of the backlight module 130 according to the current frame vertical update rate. Referring to fig. 1 to fig. 3, in the process S302, when the processor circuit 112 receives the vertical update start pulse Ptv of the vertical synchronization signal Vsync, the processor circuit 112 provides the switching signal Sw to the backlight driving chip 120, where the frequency of the switching signal Sw is equal to the predetermined vertical update rate stored in the storage unit 116. In other words, the time length of the first stage S1 of each frame (i.e., one period of the switching signal Sw) is equal to the inverse of the predetermined vertical update rate. For example, when the preset vertical update rate is 120Hz, the first phase S1 is 8.33 microseconds.

As shown in fig. 2, when the switching signal Sw has a Logic High Level (e.g. High voltage), the backlight driving chip 120 outputs a driving current Idr to enable the backlight module 130. On the contrary, when the switching signal Sw has a Logic Low Level (e.g. Low voltage), the backlight driving chip 120 disables the backlight module 130. In the present embodiment, the switching signal Sw may have a smaller duty cycle to implement a stroboscopic Backlight (Strobe Backlight), for example, the duty cycle of the switching signal Sw is 10%, but the disclosure is not limited thereto.

In the process S304, the processor circuit 112 provides the PWM control signal Pm to the backlight driving chip 120 to control the current value of the driving current Idr according to the duty cycle of the PWM control signal Pm. In some embodiments, the processor circuit 112 determines the duty cycle of the PWM control signal Pm according to the brightness value set by a user through an additional input interface (not shown) so as to adjust the overall brightness of the backlight module 130.

In the process S306, the processor circuit 112 determines whether the vertical refresh start pulse Ptv is not received for a predetermined frame time corresponding to the predetermined vertical refresh rate. For example, when the preset vertical update rate is 120Hz, the preset frame time is 8.33 microseconds. In other words, in the present embodiment, the processor circuit 112 determines whether the vertical refresh start pulse Ptv has not been received for a period exceeding the first stage S1. If the vertical update start pulse Ptv is not received even after the predetermined frame time, the processor circuit 112 then executes the process S308 to adaptively adjust the switching frequency of the backlight module 130 according to the decrease of the vertical update rate. Otherwise, the processor circuit 112 may repeatedly execute the flow S302.

In the process S308, the processor circuit 112 may increase the frequency of the switching signal Sw, and may not change the duty cycle of the switching signal Sw. Therefore, if a frame has a second stage S2 after the first stage S1 due to the decrease of the vertical update rate, since the switching signal Sw has the same duty cycle (e.g., is maintained at 10%) in the first stage S1 and the second stage S2, the user can feel almost the same equivalent brightness in the first stage S1 and the second stage S2.

In some embodiments, the processor circuit 112 may not change the duty cycle of the PWM control signal Pm when the processor circuit 112 raises the frequency of the switching signal Sw.

In the process S310, the processor circuit 112 determines whether the vertical update start pulse Ptv is received after the frequency of the switching signal Sw is increased. If the vertical update start pulse Ptv is received after the frequency of the switching signal Sw is raised, the processor circuit 112 then executes the process S312. Otherwise, the processor circuit 112 may repeatedly execute the flow S310.

In the process S312, the processor circuit 112 switches the frequency of the switching signal Sw back to equal to the predetermined vertical update rate, i.e., the processor circuit 112 can cut off the current waveform of the switching signal Sw and then set the switching signal Sw back to the waveform in the first stage S1. Next, the processor circuit 112 may execute the process S302 again.

In some embodiments, the storage unit 116 stores a predetermined horizontal update rate of the display panel 140, wherein the predetermined horizontal update rate represents a predetermined update frequency of a row of pixels in the display panel 140. For example, assuming that the display panel 140 has a resolution of 2000 × 1144 (the resolution of the active region is 1920 × 1080) and a predetermined vertical update rate of 120Hz, the predetermined horizontal update rate of the display panel 140 can be calculated according to the following (formula 1). At this time, the frequency of the switching signal Sw is increased to be less than or equal to the preset horizontal update rate of the display panel 140.

Preset horizontal update rate 120 × 1144Hz (formula 1)

The higher the frequency of the switching signal Sw in the second stage S2, the less the portion of the switching signal Sw that is truncated in the last cycle of the second stage S2. Thus, the user can feel more uniform equivalent brightness in the first stage S1 and the second stage S2.

In practice, to achieve the vertical dynamic update rate, the horizontal update rate of the display panel 140 may be fixed, and the frame length may be extended by taking the time required for updating a row of pixels (i.e., the inverse of the predetermined horizontal update rate) as a unit. Accordingly, in some embodiments, the time interval between two consecutive vertical update start pulses Ptv (e.g., the first stage S1 of the N-1 th frame, or the first and second stages S1 and S2 of the N-th frame) is set to an integer multiple of the inverse of the preset horizontal update rate. In this way, if the frequency of the switching signal Sw is increased to the predetermined horizontal refresh rate in the second stage S2, the time interval between two consecutive vertical refresh start pulses Ptv is an integer multiple of the period of the switching signal Sw, so that the switching signal Sw is not blocked in the last period of the second stage S2.

Fig. 4 is a simplified waveform diagram of a plurality of signals associated with the display device 100 according to another embodiment of the disclosure. In the present embodiment, when the control chip 110 executes the process S308, the processor circuit 112 may switch the switching signal Sw from a square wave to an approximate triangular wave. Further, the processor circuit 112 may set the switching signal Sw to have a stepwise rising and then stepwise falling step waveform in the second stage S2 so that the waveform of the switching signal Sw approximates a triangle. Compared to the square wave, the triangle wave can be generated by using a circuit with a slower charging and discharging speed, so the design difficulty of the processor circuit 112 of the embodiment is lower. In addition, in the above-mentioned embodiment using the triangular wave to achieve the equivalent average brightness, the area ratio of the triangular wave itself and the rectangle 410 formed by the period thereof is the same as the duty ratio to be achieved. For example, the area of the rectangle 410 may be 10 times the area of the triangle wave itself to achieve a duty cycle of 10%.

In summary, the switching signal Sw provided by the control chip 110 may be a voltage signal capable of rapidly changing a waveform, and the duty cycle of the PWM control signal Pm does not need to be adjusted, and the backlight driving chip 120 only needs to simply determine whether to output the driving current Idr. Therefore, when the control chip 110 executes the driving method 300, the display device 100 avoids the problem that the waveform of the PWM control signal Pm cannot be changed rapidly, and thus can provide a uniform equivalent brightness at a dynamic update rate.

Certain terms are used throughout the description and following claims to refer to particular components. However, as one of ordinary skill in the art will appreciate, similar components may be referred to by different names. The specification and claims do not intend to distinguish between components that differ in name but not function. In the following description and in the claims, the terms "include" and "comprise" are used in an open-ended fashion, and thus should be interpreted to mean "include, but not limited to. Also, the term "coupled" as used herein includes any direct or indirect connection. Therefore, if the first element is coupled to the second element, it means that the first element can be directly connected to the second element through electrical connection or signal connection such as wireless transmission, optical transmission, etc., or indirectly connected to the second element through other elements or connection means. In addition, the process steps mentioned in the specification may be performed in any order, or may be performed simultaneously or partially simultaneously, unless otherwise specified.

As used herein, the description of "and/or" includes any combination of one or more of the items listed. In addition, any term in the singular encompasses the plural unless the specification specifically states otherwise.

It is only the preferred embodiment of the present disclosure that the equivalent changes and modifications made by the claims of the present disclosure should be covered by the scope of the present disclosure.

[ description of symbols ]

Display device

110

A processor circuit

Interface circuit

A storage unit

120

130

140

Display driver

A pixel matrix

Ds.. display signal

Vertical synchronization signal

Data signal of Da

Optimized data signal

Pm.. PWM control signal

Sw.. switching signal

Drive current

Vertical update start pulse

S1

S2

S302 to S312

A rectangle formed by a period of a triangular wave.

Claims

1. A control chip for coupling a backlight driving chip and a display panel, the control chip comprising:

a storage unit for storing a preset vertical update rate of the display panel; and

a processor circuit, coupled to the storage unit, for providing a switching signal to the backlight driver chip to enable a backlight module according to the switching signal, wherein a frequency of the switching signal is equal to the predetermined vertical refresh rate;

wherein the processor circuit increases the frequency of the switching signal if the processor circuit does not receive a vertical update start pulse for more than a predetermined frame time corresponding to the predetermined vertical update rate, wherein the processor circuit does not change the duty cycle of the switching signal when the processor circuit increases the frequency of the switching signal.

2. The control chip of claim 1, wherein the processor circuit is further configured to provide a control signal to the backlight driver chip, so that the backlight driver chip determines the brightness of the backlight module according to a duty cycle of the control signal, and when the processor circuit increases the frequency of the switching signal, the processor circuit does not change the duty cycle of the control signal.

3. The control chip of claim 1, wherein the processor circuit increases the frequency of the switching signal to a predetermined level update rate less than or equal to the display panel.

4. The control chip of claim 1, wherein the processor circuit sets the waveform of the switching signal to approximate a triangle if the processor circuit does not receive the vertical refresh start pulse beyond the predetermined frame time.

5. The control chip of claim 4, wherein the processor circuit sets the switching signal to have a staircase waveform approximating a triangle if the processor circuit does not receive the vertical refresh start pulse for more than the predetermined frame time.

6. The control chip of claim 1, wherein the processor circuit switches the frequency of the switching signal back to equal to the predetermined vertical refresh rate if the processor circuit receives the vertical refresh start pulse after increasing the frequency of the switching signal.

7. A driving method is suitable for a control chip, wherein the control chip is used for being coupled with a display panel and a backlight driving chip, and the driving method comprises the following steps:

providing a switching signal to the backlight driving chip to enable a backlight module according to the switching signal, wherein the frequency of the switching signal is equal to a preset vertical update rate of the display panel;

judging whether a vertical update start pulse is not received within a preset frame time corresponding to the preset vertical update rate; and

if the vertical update start pulse is not received after the preset frame time, the frequency of the switching signal is increased, wherein the working period of the switching signal is not changed when the frequency of the switching signal is increased.

8. The driving method according to claim 7, wherein the frequency of the switching signal is increased to be less than or equal to a predetermined horizontal refresh rate of the display panel.

9. The driving method according to claim 7, wherein if the vertical update start pulse is not received more than the predetermined frame time, the waveform of the switching signal is set to be approximately triangular.