CN113065306A - Semiconductor device sensitivity analysis method based on machine learning - Google Patents

Semiconductor device sensitivity analysis method based on machine learning Download PDF

Info

Publication number
CN113065306A
CN113065306A CN202110288543.8A CN202110288543A CN113065306A CN 113065306 A CN113065306 A CN 113065306A CN 202110288543 A CN202110288543 A CN 202110288543A CN 113065306 A CN113065306 A CN 113065306A
Authority
CN
China
Prior art keywords
semiconductor device
parameters
electrical performance
parameter
key
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202110288543.8A
Other languages
Chinese (zh)
Inventor
苏炳熏
杨展悌
叶甜春
罗军
赵杰
薛静
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Guangdong Greater Bay Area Institute of Integrated Circuit and System
Ruili Flat Core Microelectronics Guangzhou Co Ltd
Original Assignee
Aoxin Integrated Circuit Technology Guangdong Co ltd
Guangdong Greater Bay Area Institute of Integrated Circuit and System
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Aoxin Integrated Circuit Technology Guangdong Co ltd, Guangdong Greater Bay Area Institute of Integrated Circuit and System filed Critical Aoxin Integrated Circuit Technology Guangdong Co ltd
Priority to CN202110288543.8A priority Critical patent/CN113065306A/en
Publication of CN113065306A publication Critical patent/CN113065306A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/38Circuit design at the mixed level of analogue and digital signals
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N20/00Machine learning

Abstract

The invention discloses a semiconductor device sensitivity analysis method based on machine learning, which can realize automatic analysis of semiconductor device performance and improve analysis accuracy, and is realized based on a ring oscillator, and comprises the following steps: the method comprises the following steps of obtaining semiconductor device process parameters, obtaining semiconductor device electrical performance parameters, carrying out sensitivity analysis on the semiconductor device electrical performance, carrying out similarity inspection on key process parameters, and screening out important process variation parameters, wherein the ring oscillator comprises a switch, a semiconductor device combination, a delay circuit and an amplifier, the delay circuit and the amplifier are connected with the semiconductor device combination in parallel, the semiconductor device combination comprises a plurality of semiconductor devices which are connected in series, the delay circuit is connected with the input end of the amplifier, the output end of the amplifier is a signal output end, the delay circuit comprises a plurality of delay stages which are connected in series, and the method for obtaining the electrical performance parameters comprises: and acquiring the electrical performance parameters of the semiconductor device by controlling the ring oscillator.

Description

Semiconductor device sensitivity analysis method based on machine learning
Technical Field
The invention relates to the technical field of semiconductors, in particular to a semiconductor device sensitivity analysis method based on machine learning.
Background
A metal oxide semiconductor field effect transistor, abbreviated as a metal half field effect transistor, is a field effect transistor that can be widely applied to analog circuits and digital circuits, and can be classified into an N-channel type and a P-channel type, i.e., an N-type metal oxide semiconductor field effect transistor (NMOSFET) and a P-type metal oxide semiconductor field effect transistor (PMOSFET), according to the difference in channel polarity. The electrical performance of the NMOSFET or PMOSFET is closely related to the processing technology, whether the transistor processing is changed or not is judged through the processing technology parameters and the electrical performance parameters, and the processing technology and the overall performance of the device are improved through the processing technology change condition, so that the semiconductor transistor meets the requirements of miniaturization, high processing speed, stable performance and the like.
The existing method for analyzing the process variation of the semiconductor transistor is mainly manual judgment, the electrical performance parameters of the semiconductor transistor are manually collected, the process parameters are compared with the corresponding electrical performance parameters according to experience, and the process variation situation is determined according to the comparison result and the experience.
Disclosure of Invention
The invention provides a semiconductor device sensitivity analysis method based on machine learning, which can realize automatic analysis of a semiconductor device, can improve analysis accuracy and is beneficial to the improvement of the semiconductor device process and the efficiency of the device.
In order to achieve the purpose, the invention adopts the following technical scheme:
a semiconductor device sensitivity analysis method based on machine learning, the method is realized based on a ring oscillator, and is characterized in that the method comprises the following steps:
s1, acquiring process parameters of the semiconductor device;
s2, acquiring electrical performance parameters of the semiconductor device;
s3, carrying out sensitivity analysis on the electrical performance parameters of the semiconductor device:
s31, associating the electrical performance parameters with the corresponding process parameters to construct an association model;
s32, analyzing the sensitivity of each correlation model, and obtaining a sensitivity analysis result according to the correlation coefficient of the correlation model;
s33, sorting the process parameters according to the magnitude of the correlation coefficients based on the sensitivity analysis result;
s34, determining key process parameters according to the sorting result, and determining the process parameters with large correlation with the electrical performance parameters as the key process parameters;
s4, carrying out similarity test on the key process parameters by adopting a similarity method:
s41, performing cluster analysis on the key process parameters, and classifying the key process parameters with similar or same characteristics according to groups;
s42, the similarity method is that the classified key process parameters in the same group are compared with standard characteristic parameters in a pre-established database, and the relevance of the key process parameters and the standard characteristic parameters in each group is calculated according to a covariance formula;
s5, screening out important process variation parameters.
It is further characterized in that the method further comprises the steps of,
in S1, the process parameters include a distance from a source region to a drain region and a depth of the drain region of the semiconductor device;
in S2, acquiring the electrical performance parameters by adopting a semiconductor device electrical performance parameter acquisition method;
in S2, the electrical performance parameters include on-current, frequency, leakage current, voltage, resistance, capacitance, and delay time of the semiconductor device;
in step S31, covariance cov (IK) of the correlation model of the process parameters and the electrical property parameters is calculated according to the covariance formula1、IK2),
cov(IK1、IK2)=E[(IK1-k1)(IK2-k2)];
Wherein, IK1Indicating a key process parameter, IK2Representing a key electrical property parameter, k1Is the mean value, k, of a key process parameter2Is the mean value of the key electrical performance parameters.
Correlation coefficient corr (IK) of correlation model is calculated based on covariance1,IK2):
Figure BDA0002981443900000031
In step S42, the correlation between the key process parameters and the standard characteristic parameters in each group is calculated according to the covariance formula: calculating the covariance of the key process parameters and the standard characteristic parameters according to a covariance formulacov(IL1,IL2),
Figure BDA0002981443900000032
Wherein IL1Representing a key process parameter, IL2Represents a key electrical property parameter, u1Is the mean value of the key process parameter, u2Is the mean value of the key electrical performance parameters.
Calculating correlation coefficient corr (IL) of key process parameter and standard characteristic parameter based on covariance1,IL2),
Figure BDA0002981443900000033
The key process parameter matrix is as follows:
Figure BDA0002981443900000034
the method further comprises a step S6 of carrying out process optimization on the semiconductor device according to the process variation parameters;
the process optimization method comprises the steps of upgrading a process scheme and upgrading process materials;
the method further includes step S7, after the process of the semiconductor device is optimized, returning to step S2, and performing a next round of test on the results of the variation enhancement or variation reduction of the electrical performance of the semiconductor device and the process variation parameters.
The ring oscillator comprises a switch and is characterized by further comprising a semiconductor device combination, a delay circuit and an amplifier, wherein the delay circuit is connected with the semiconductor device combination in parallel, the semiconductor device combination comprises a plurality of semiconductor devices which are connected in series, the delay circuit is connected with the input end of the amplifier, and the output end of the amplifier is a signal output end; the switch is used for controlling the on-off of current, the delay circuit is used for reducing the frequency, and the amplifier is used for amplifying the differential signal output by the delay circuit and outputting the differential signal through the signal output end.
It is further characterized in that the method further comprises the steps of,
the delay circuit comprises a plurality of latches connected in series;
the ring oscillator is a differential ring oscillator;
the current is a bias current.
A semiconductor device electrical performance parameter obtaining method is achieved based on a ring oscillator, the ring oscillator comprises a semiconductor device and a switch, and the semiconductor device electrical performance parameter obtaining method is characterized in that the electrical performance parameter of the semiconductor device is obtained by controlling the ring oscillator.
It is further characterized in that the method further comprises the steps of,
the electrical performance parameters comprise conduction current, frequency, leakage current, voltage, resistance, capacitance and delay time of the semiconductor device, wherein the alternating current is the conduction current when the semiconductor device is in a conduction state, the leakage current is the current when the semiconductor device is in a turn-off state, and the delay time is the delay time determined by the delay circuit;
the switch is turned on, the semiconductor device is conducted, and the alternating current and the frequency are measured;
and the switch is turned off, the semiconductor device combination is turned off, and the leakage current is measured.
By adopting the structure of the invention, the following beneficial effects can be achieved: the sensitivity analysis method comprises the steps of associating a plurality of process parameters with corresponding electrical performance parameters, constructing an association model, carrying out sensitivity analysis on the association model, and determining key process parameters by calculating the change condition of the electrical performance parameters caused by the change of the plurality of process parameters, wherein the key process parameters are obtained according to the change of the plurality of process parameters and the electrical performance parameters, so that the performance of a semiconductor device is accurately reflected, and the accuracy of the process analysis of the semiconductor device is improved; the sensitivity analysis method adopts a similarity method to carry out similarity detection on the key process parameters, and further ensures that the key process parameters can accurately reflect the performance of the semiconductor device, thereby ensuring that important process variation parameters can be screened out, improving the analysis accuracy, and being beneficial to the improvement of the process of the semiconductor device and the improvement of the device efficiency.
Drawings
FIG. 1 is a circuit schematic of a ring oscillator circuit of the present invention;
FIG. 2 is a flow chart of a method for obtaining electrical performance parameters of a semiconductor device according to the present invention;
FIG. 3 is a flow chart of a method for sensitivity analysis of a semiconductor device according to the present invention;
FIG. 4 is a schematic sectional view of a front view of a semiconductor device to be tested;
FIG. 5a is a graph of the similarity metric of the present invention varying with the electrical performance Delay time Delay, leakage current IDDQ;
FIG. 5b is a graph of the Delay time Delay and the drain current IDDQ of the present invention varying with Depth.
Detailed Description
Referring to fig. 1, a ring oscillator includes a switch S, a semiconductor device assembly 1, a delay circuit 2 connected in parallel with the semiconductor device assembly 1, and an amplifier 3, where the semiconductor device assembly 1 includes a plurality of semiconductor devices Stage1, Stage2, and … … Stage N connected in series, where N is less than or equal to 100, the delay circuit 2 is connected to an input end of the amplifier 3, an output end of the amplifier 3 is a signal output end, and the delay circuit 2 includes a plurality of D1, D2, D3, D4, D1, D2, D3, and D4 connected in series, which are latches; the switch S is used for controlling the on/off of the current of the ring oscillator, when the ring oscillator is turned on, the voltage source inputs a bias current I to the input terminal of the ring oscillator, the delay circuit 2 is used for generating a differential signal to a next delay stage, and the amplifier 3 is used for amplifying the differential signal output by the delay circuit 2 and outputting the amplified differential signal through the signal output terminal output.
Referring to fig. 2, a method for obtaining electrical performance parameters of a semiconductor device by using the ring oscillator is implemented based on the ring oscillator, and the electrical performance parameters of the semiconductor device are obtained by controlling the ring oscillator: a1, when the switch S is opened, each semiconductor device in the semiconductor device combination 1 is conducted, and the conduction current and the frequency output by the semiconductor device combination 1 are measured; since the semiconductor devices are connected in series, the on-currents through the respective semiconductor devices are equal.
A2 and the switch S are turned off, each semiconductor device in the semiconductor device combination is turned off, and the leakage current of each semiconductor device is measured.
The electrical performance parameters of the semiconductor device comprise conduction current, frequency, leakage current, voltage, resistance, capacitance and delay time, wherein alternating current is the conduction current when the semiconductor device is in a conduction state, the leakage current is the current when the semiconductor device is in a turn-off state, and the delay time is determined by the delay circuit.
The switch S, the switching state of the semiconductor device and the output signal state of the signal output terminal are shown in the following table:
S 1 1 0 0
F/B 0 1 1 0
Output 0 1 0 0
in the truth table, the on state of the switch S is represented as "1", the off state of the switch is represented as "0", the on state of the semiconductor device is represented as "1", the off state of the semiconductor device is represented as "0", the output signal of the signal output end is represented as "1", the non-output signal of the signal output end is represented as "0", and the input end of the switch S is connected with the nand gate Q, so that when the switch S and the semiconductor device are simultaneously on, the signal output end has a signal output, and when one of the switch S and the semiconductor device is in the off state, the signal output end has no signal output, so that when the switch S is on (namely 1), the on current and the frequency of the semiconductor device are measured; when the switch S is turned off (namely 0), measuring the leakage current of the semiconductor device;
referring to fig. 3, a semiconductor device sensitivity analysis method based on machine learning, which is implemented based on the ring oscillator, includes:
s1, measuring and obtaining process parameters of the semiconductor device, see fig. 4, where the process parameters include the length, width, and thickness (but not limited to, length, thickness, and width) of the source region, the drain region, and the gate region (but not limited to, the gate region, the source region, and the drain region) of the semiconductor device, and in this embodiment, the process parameters are selected as follows: the distance from the source region to the drain region, the depth of the drain region; fig. 4 is a front view of a semiconductor device to be tested, which includes a silicon substrate 4, a gate region 5, a drain region 6, and source regions 7 distributed at two sides of the drain region 6, wherein the depth from the drain region 6 to the bottom end of the gate region 5 is D, and the distance from the source region 7 to the drain region 6 is P;
s2, obtaining the electrical performance parameters by adopting the method for obtaining the electrical performance parameters of the semiconductor device, wherein the electrical performance parameters comprise conduction current, frequency, leakage current, voltage, resistance, capacitance and delay time of the semiconductor device; the voltage, the resistance and the capacitance of the semiconductor device can be obtained by adopting the existing semiconductor device detection equipment;
s3, carrying out sensitivity analysis on the electrical performance of the semiconductor device:
s31, correlating the electrical performance parameters with the corresponding process parameters to construct a correlation model;
calculating the covariance cov (IK) of the correlation model of the process parameters and the electrical property parameters according to the covariance formula1、IK2),
cov(IK1、IK2)=E[(IK1-k1)(IK2-k2)];
Wherein, IK1Indicating a key process parameter, IK2Representing a key electrical property parameter, k1Is the mean value, k, of a key process parameter2Is the mean value of the key electrical performance parameters.
Correlation coefficient corr (IK) of correlation model is calculated based on covariance1,IK2):
Figure BDA0002981443900000071
S32, analyzing the sensitivity of each correlation model, and obtaining a sensitivity analysis result according to the correlation coefficient of the correlation model;
s33, sorting the process parameters according to the magnitude of the correlation coefficients based on the sensitivity analysis result;
s34, determining key process parameters according to the sequencing result: the correlation coefficient is large, which indicates that the process parameters are greatly influenced by the electrical performance parameters, so that the process parameters with large correlation with the electrical performance parameters are determined as key process parameters;
s4, carrying out similarity test on the key process parameters by adopting a similarity method in machine learning, wherein the similarity method comprises the following steps:
s41, based on the machine learning database, performing cluster analysis on the key process parameters, and classifying the key process parameters with similar or same characteristics according to groups;
s42, the similarity method is to compare the classified key process parameters in the same group with the standard characteristic parameters in the pre-established database, for example, compare the width of the gate region in the process parameters measured in the processing process with the width of the standard gate region in the database, and calculate the relevance between the key process parameters and the standard characteristic parameters in each group according to the covariance formula:
calculating the covariance of the key process parameters and the standard characteristic parameters according to a covariance formulacov(IL1,IL2),
Figure BDA0002981443900000072
Wherein IL1Representing a key process parameter, IL2Represents a key electrical property parameter, u1Is the mean value of the key process parameter, u2Is the mean value of the key electrical performance parameters.
Calculating correlation coefficient corr (IL) of key process parameter and standard characteristic parameter based on covariance1,IL2),
Figure BDA0002981443900000081
The matrix is as follows:
Figure BDA0002981443900000082
s5, screening important key process parameters according to the correlation coefficient, namely determining the important key process parameters according to the correlation between the key process parameters and the standard characteristic parameters, wherein the smaller the correlation is, the larger the difference between the key process parameters and the standard characteristic parameters is, the more important the key process parameters are, namely, the important process variation parameters are;
s6, carrying out process optimization on the semiconductor device according to the process variation parameters, wherein the process optimization method comprises process scheme upgrading and process material upgrading;
and S7, after the process of the semiconductor device is optimized, returning to S2, and carrying out the next round of test on the variation enhancement or variation reduction result of the electrical performance and the process variation parameters of the semiconductor device.
In the process of processing the semiconductor device shown in fig. 4, the thickness proxiimity of the NiSi layer and the Depth of the drain region on the two sides of the source region and the drain region of the semiconductor device are obtained, the semiconductor device shown in fig. 4 is connected in series in a ring oscillator, and the electrical performance parameters of the semiconductor device are measured: delay time and leakage current IDDQ, testing the process parameters of the semiconductor device by adopting the method, wherein the test results are shown in FIG. 5a and FIG. 5B, FIG. 5a and FIG. 5B are the process variation conditions of the process parameters NiSi layer thickness Proximity and drain region Depth Depth of the semiconductor device measured by adopting the method of the invention, in FIG. 5a, the horizontal axis represents the NiSi layer thickness Proximity, the vertical axis represents the Delay time Delay and the leakage current IDDQ, the curve A represents the variation condition of the Delay time Delay along with the NiSi layer thickness Proximity, the curve B represents the variation condition of the leakage current IDDQ along with the NiSi layer thickness Proximity, and the round dots represent the Delay time Delay or the square points represent the leakage current IDDQ; in fig. 5B, the horizontal axis represents the Depth of the drain region, the vertical axis represents the leakage current IDDQ and the Delay time Delay, the curve a represents the variation of the Delay time Delay of the electrical performance parameter with the Depth of the drain region, and the curve B represents the variation of the leakage current IDDQ with the Depth of the drain region, as can be seen from fig. 5a and 5B, the closer the dot is to the curve a or the closer the square is to the curve B, the greater the correlation between the process parameter and the electrical performance parameter is, thereby facilitating the determination of the key process parameter, and the thickness proxiimity of the NiSi layer is increased, the Delay time Delay is decreased therewith, and the leakage IDDQ is increased therewith; the Depth of the drain region is increased, the Delay time Delay is increased, the leakage current IDDQ is reduced, the fact that the electrical performance parameters of the semiconductor device are related to the process parameters of the semiconductor device is shown, the process parameters can change due to the change of the process parameters, the accuracy of the process parameter variation detection of the variation parameters in the engineering parameters can be improved to 98% through the sensitivity method, the key process parameters can be accurately obtained, the accuracy of process analysis of the semiconductor device is improved, and the further improvement of the semiconductor processing technology is facilitated.
According to the method, the semiconductor devices to be measured are connected in series in the ring oscillator, the ring oscillator is connected with the delay circuit, and the delay circuit has a frequency reduction effect, so that delay is performed through the delay circuit, each semiconductor device in the semiconductor device combination is ensured to be in a conducting or turning-off state, the output frequency of the semiconductor device combination is reduced, and the electrical parameters of each semiconductor device in the semiconductor device combination can be conveniently measured; the ring oscillator is connected with an amplifier which can amplify the delay signal and the voltage signal, thereby ensuring the accuracy of the electrical performance parameter extraction of the semiconductor device.
In the method for acquiring the electrical performance parameters of the semiconductor device, the measurement and extraction of the electrical performance parameters of the semiconductor device are realized by controlling the ring oscillator, compared with the existing manual detection and extraction mode, the mode is simple and quick, the detection and acquisition efficiency of the electrical performance parameters is effectively improved, the subjective activity influence, the detection omission risk and the false detection risk are reduced, and the accuracy of parameter acquisition is improved, so that the method is favorable for improving the accuracy of the process analysis of the semiconductor device.
The above is only a preferred embodiment of the present application, and the present invention is not limited to the above embodiments. It is to be understood that other modifications and variations directly derivable or suggested by those skilled in the art without departing from the spirit and concept of the present invention are to be considered as included within the scope of the present invention.

Claims (10)

1. A semiconductor device sensitivity analysis method based on machine learning, the method is realized based on a ring oscillator, and is characterized in that the method comprises the following steps:
s1, acquiring process parameters of the semiconductor device;
s2, acquiring electrical performance parameters of the semiconductor device;
s3, carrying out sensitivity analysis on the electrical performance parameters of the semiconductor device:
s31, associating the electrical performance parameters with the corresponding process parameters to construct an association model;
s32, analyzing the sensitivity of each correlation model, and obtaining a sensitivity analysis result according to the correlation coefficient of the correlation model;
s33, sorting the process parameters according to the magnitude of the correlation coefficients based on the sensitivity analysis result;
s34, determining key process parameters according to the sorting result, and determining the process parameters with large correlation with the electrical performance parameters as the key process parameters;
s4, carrying out similarity test on the key process parameters by adopting a similarity method:
s41, performing cluster analysis on the key process parameters, and classifying the key process parameters with similar or same characteristics according to groups;
s42, the similarity method is that the classified key process parameters in the same group are compared with standard characteristic parameters in a pre-established database, and the relevance of the key process parameters and the standard characteristic parameters in each group is calculated according to a covariance formula;
s5, screening out important process variation parameters.
2. The sensitivity analysis method of claim 1, wherein the process parameters comprise the width of the gate region of the semiconductor device, the angle of the top angle, the thickness of the NiSi layer on both sides of the source region and the drain region, the depth of the source region and the drain region, the thickness of the space charge region on both sides of the gate region, the length of the gate region, the thickness of the High-K insulating layer and the height of the gate region.
3. The sensitivity analysis method according to claim 1, wherein the electrical performance parameters are obtained by a semiconductor device electrical performance parameter obtaining method, and the electrical performance parameters include conduction current, frequency, leakage current, voltage, resistance, capacitance, and delay time of the semiconductor device.
4. The sensitivity analysis method of claim 1, wherein in step S31, a covariance cov (IK) of the correlation model of the process parameter and the electrical property parameter is calculated according to a covariance formula1、IK2),
cov(IK1、IK2)=E[(IK1-k1)(IK2-k2)];
Wherein, IK1Indicating a key process parameter, IK2Representing a key electrical property parameter, k1Is the mean value, k, of a key process parameter2Is the mean value of the key electrical performance parameters.
Correlation coefficient corr (IK) of correlation model is calculated based on covariance1,IK2):
Figure FDA0002981443890000021
In step S42, the correlation between the key process parameters and the standard characteristic parameters in each group is calculated according to the covariance formula: calculating the covariance cov of the key process parameter and the normalized feature parameter according to the covariance formula (IL)1,IL2),
Figure FDA0002981443890000022
Wherein IL1Representing a key process parameter, IL2Represents a key electrical property parameter, u1Is the mean value of the key process parameter, u2Is the mean value of the key electrical performance parameters.
Calculating correlation coefficient corr (IL) of key process parameter and standard characteristic parameter based on covariance1,IL2),
Figure FDA0002981443890000023
5. The sensitivity analysis method of claim 1, further comprising step S7, performing process optimization on the semiconductor device according to the process variation parameters, wherein the process optimization method includes process scheme upgrade and process material upgrade.
6. The sensitivity analysis method of claim 1, further comprising step S8, returning to step S2 after optimizing the process of the semiconductor device, and performing a next test on the result of the enhancement or reduction of the variation of the electrical performance of the semiconductor device and the process variation parameter.
7. A ring oscillator, which is applied to the sensitivity analysis method of claim 1 and comprises a switch, wherein the ring oscillator further comprises a semiconductor device assembly, a delay circuit connected in parallel with the semiconductor device assembly, and an amplifier, the semiconductor device assembly comprises a plurality of semiconductor devices connected in series, the delay circuit is connected with an input end of the amplifier, and an output end of the amplifier is a signal output end.
8. The ring oscillator of claim 7, wherein the delay circuit comprises a plurality of latches connected in series.
9. An electrical performance parameter acquisition method, which is implemented based on the ring oscillator of claim 7 or 8, wherein the ring oscillator comprises the semiconductor device and a switch, and is characterized in that the electrical performance parameter of the semiconductor device is acquired by controlling the ring oscillator; the switch is turned on, the semiconductor device is conducted, and the alternating current and the frequency are measured; and the switch is turned off, the semiconductor device combination is turned off, and the leakage current is measured.
10. The method according to claim 9, wherein the electrical performance parameters include on-current, frequency, leakage current, voltage, resistance, capacitance, and delay time of the semiconductor device, the ac current is on-current when the semiconductor device is in an on state, the leakage current is current when the semiconductor device is in an off state, and the delay time is delay time determined by the delay circuit.
CN202110288543.8A 2021-03-18 2021-03-18 Semiconductor device sensitivity analysis method based on machine learning Pending CN113065306A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202110288543.8A CN113065306A (en) 2021-03-18 2021-03-18 Semiconductor device sensitivity analysis method based on machine learning

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202110288543.8A CN113065306A (en) 2021-03-18 2021-03-18 Semiconductor device sensitivity analysis method based on machine learning

Publications (1)

Publication Number Publication Date
CN113065306A true CN113065306A (en) 2021-07-02

Family

ID=76561166

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202110288543.8A Pending CN113065306A (en) 2021-03-18 2021-03-18 Semiconductor device sensitivity analysis method based on machine learning

Country Status (1)

Country Link
CN (1) CN113065306A (en)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080262771A1 (en) * 2005-11-01 2008-10-23 Isemicon, Inc. Statistic Analysis of Fault Detection and Classification in Semiconductor Manufacturing
US20110040548A1 (en) * 2009-08-13 2011-02-17 Sun Microsystems, Inc. Physics-based mosfet model for variational modeling
CN102637215A (en) * 2011-02-10 2012-08-15 上海宏力半导体制造有限公司 Modeling method of semiconductor device
CN109933946A (en) * 2019-03-29 2019-06-25 上海华力集成电路制造有限公司 A kind of analysis method of semiconductor devices
CN109948283A (en) * 2019-03-29 2019-06-28 上海华力集成电路制造有限公司 A kind of analysis method of semiconductor devices
CN111126575A (en) * 2020-01-09 2020-05-08 同济大学 Gas sensor array mixed gas detection method and device based on machine learning

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080262771A1 (en) * 2005-11-01 2008-10-23 Isemicon, Inc. Statistic Analysis of Fault Detection and Classification in Semiconductor Manufacturing
US20110040548A1 (en) * 2009-08-13 2011-02-17 Sun Microsystems, Inc. Physics-based mosfet model for variational modeling
CN102637215A (en) * 2011-02-10 2012-08-15 上海宏力半导体制造有限公司 Modeling method of semiconductor device
CN109933946A (en) * 2019-03-29 2019-06-25 上海华力集成电路制造有限公司 A kind of analysis method of semiconductor devices
CN109948283A (en) * 2019-03-29 2019-06-28 上海华力集成电路制造有限公司 A kind of analysis method of semiconductor devices
CN111126575A (en) * 2020-01-09 2020-05-08 同济大学 Gas sensor array mixed gas detection method and device based on machine learning

Similar Documents

Publication Publication Date Title
Croon et al. An easy-to-use mismatch model for the MOS transistor
US6795800B1 (en) Simplified method for extracting model parameter sets and method for statistically simulating integrated circuit using the same
US8451047B2 (en) Circuit used for indicating process corner and extreme temperature
CN107636656B (en) GaN device process parameter statistical analysis method based on large-signal equivalent circuit model
CN110763972B (en) Method for measuring threshold voltage of MOSFET
EP1145281A2 (en) Modelling electrical characteristics of thin film transistors
CN112733477B (en) GaN HEMT modeling method based on error function precision compensation
CN113065306A (en) Semiconductor device sensitivity analysis method based on machine learning
Siligaris et al. High-frequency and noise performances of 65-nm MOSFET at liquid nitrogen temperature
Ji et al. A New Mobility Extraction Technique Based on Simultaneous Ultrafast $ I_ {d} $–$ V_ {g} $ and $ C_ {\rm cg} $–$ V_ {g} $ Measurements in MOSFETs
CN109308395B (en) Wafer-level space measurement parameter anomaly identification method based on LOF-KNN algorithm
CN104716065B (en) Capacitance-voltage characteristic correction method for metal oxide semiconductor field-effect transistor
CN101650755A (en) Modeling method of typical MOS transistor noise model
Tang et al. RTN induced frequency shift measurements using a ring oscillator based circuit
Aldridge et al. High performance SiGe HBT performance variability learning by utilizing neural networks and technology computer aided design
Vandemaele et al. The properties, effect and extraction of localized defect profiles from degraded FET characteristics
Bughio et al. Physics-based modeling of FinFET RF variability under Shorted-and Independent-Gates bias
Saxena et al. Impact of layout at advanced technology nodes on the performance and variation of digital and analog figures of merit
CN104698279B (en) The series resistance assay method of FET capacitor voltage characteristic test circuit
CN117388662A (en) Method for extracting parameters of tunneling field effect transistor
JP2002353440A (en) Method and device for simulating characteristics of semiconductor element
Kuntman On the modeling of electron devices: Concept, accuracy criterion with application examples, importance in EE education
Kim et al. Accuracy analysis of extraction methods for effective channel length in deep-submicron MOSFETs
Tanaka et al. Novel Statistical Modeling and Parameter Extraction Methodology of Cutoff Frequency for RF-MOSFETs
CN115408974A (en) Method for improving efficiency of field effect transistor

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
TA01 Transfer of patent application right
TA01 Transfer of patent application right

Effective date of registration: 20220921

Address after: 510000 building a, No. 136, Kaiyuan Avenue, Huangpu Development Zone, Guangzhou, Guangdong

Applicant after: Guangdong Dawan District integrated circuit and System Application Research Institute

Applicant after: Ruili flat core Microelectronics (Guangzhou) Co.,Ltd.

Address before: 510535 building a, 136 Kaiyuan Avenue, Guangzhou Development Zone, Guangdong Province

Applicant before: Guangdong Dawan District integrated circuit and System Application Research Institute

Applicant before: AoXin integrated circuit technology (Guangdong) Co.,Ltd.