Disclosure of Invention
The invention provides a semiconductor device sensitivity analysis method based on machine learning, which can realize automatic analysis of a semiconductor device, can improve analysis accuracy and is beneficial to the improvement of the semiconductor device process and the efficiency of the device.
In order to achieve the purpose, the invention adopts the following technical scheme:
a semiconductor device sensitivity analysis method based on machine learning, the method is realized based on a ring oscillator, and is characterized in that the method comprises the following steps:
s1, acquiring process parameters of the semiconductor device;
s2, acquiring electrical performance parameters of the semiconductor device;
s3, carrying out sensitivity analysis on the electrical performance parameters of the semiconductor device:
s31, associating the electrical performance parameters with the corresponding process parameters to construct an association model;
s32, analyzing the sensitivity of each correlation model, and obtaining a sensitivity analysis result according to the correlation coefficient of the correlation model;
s33, sorting the process parameters according to the magnitude of the correlation coefficients based on the sensitivity analysis result;
s34, determining key process parameters according to the sorting result, and determining the process parameters with large correlation with the electrical performance parameters as the key process parameters;
s4, carrying out similarity test on the key process parameters by adopting a similarity method:
s41, performing cluster analysis on the key process parameters, and classifying the key process parameters with similar or same characteristics according to groups;
s42, the similarity method is that the classified key process parameters in the same group are compared with standard characteristic parameters in a pre-established database, and the relevance of the key process parameters and the standard characteristic parameters in each group is calculated according to a covariance formula;
s5, screening out important process variation parameters.
It is further characterized in that the method further comprises the steps of,
in S1, the process parameters include a distance from a source region to a drain region and a depth of the drain region of the semiconductor device;
in S2, acquiring the electrical performance parameters by adopting a semiconductor device electrical performance parameter acquisition method;
in S2, the electrical performance parameters include on-current, frequency, leakage current, voltage, resistance, capacitance, and delay time of the semiconductor device;
in step S31, covariance cov (IK) of the correlation model of the process parameters and the electrical property parameters is calculated according to the covariance formula1、IK2),
cov(IK1、IK2)=E[(IK1-k1)(IK2-k2)];
Wherein, IK1Indicating a key process parameter, IK2Representing a key electrical property parameter, k1Is the mean value, k, of a key process parameter2Is the mean value of the key electrical performance parameters.
Correlation coefficient corr (IK) of correlation model is calculated based on covariance1,IK2):
In step S42, the correlation between the key process parameters and the standard characteristic parameters in each group is calculated according to the covariance formula: calculating the covariance of the key process parameters and the standard characteristic parameters according to a covariance formulacov(IL1,IL2),
Wherein IL1Representing a key process parameter, IL2Represents a key electrical property parameter, u1Is the mean value of the key process parameter, u2Is the mean value of the key electrical performance parameters.
Calculating correlation coefficient corr (IL) of key process parameter and standard characteristic parameter based on covariance1,IL2),
The key process parameter matrix is as follows:
the method further comprises a step S6 of carrying out process optimization on the semiconductor device according to the process variation parameters;
the process optimization method comprises the steps of upgrading a process scheme and upgrading process materials;
the method further includes step S7, after the process of the semiconductor device is optimized, returning to step S2, and performing a next round of test on the results of the variation enhancement or variation reduction of the electrical performance of the semiconductor device and the process variation parameters.
The ring oscillator comprises a switch and is characterized by further comprising a semiconductor device combination, a delay circuit and an amplifier, wherein the delay circuit is connected with the semiconductor device combination in parallel, the semiconductor device combination comprises a plurality of semiconductor devices which are connected in series, the delay circuit is connected with the input end of the amplifier, and the output end of the amplifier is a signal output end; the switch is used for controlling the on-off of current, the delay circuit is used for reducing the frequency, and the amplifier is used for amplifying the differential signal output by the delay circuit and outputting the differential signal through the signal output end.
It is further characterized in that the method further comprises the steps of,
the delay circuit comprises a plurality of latches connected in series;
the ring oscillator is a differential ring oscillator;
the current is a bias current.
A semiconductor device electrical performance parameter obtaining method is achieved based on a ring oscillator, the ring oscillator comprises a semiconductor device and a switch, and the semiconductor device electrical performance parameter obtaining method is characterized in that the electrical performance parameter of the semiconductor device is obtained by controlling the ring oscillator.
It is further characterized in that the method further comprises the steps of,
the electrical performance parameters comprise conduction current, frequency, leakage current, voltage, resistance, capacitance and delay time of the semiconductor device, wherein the alternating current is the conduction current when the semiconductor device is in a conduction state, the leakage current is the current when the semiconductor device is in a turn-off state, and the delay time is the delay time determined by the delay circuit;
the switch is turned on, the semiconductor device is conducted, and the alternating current and the frequency are measured;
and the switch is turned off, the semiconductor device combination is turned off, and the leakage current is measured.
By adopting the structure of the invention, the following beneficial effects can be achieved: the sensitivity analysis method comprises the steps of associating a plurality of process parameters with corresponding electrical performance parameters, constructing an association model, carrying out sensitivity analysis on the association model, and determining key process parameters by calculating the change condition of the electrical performance parameters caused by the change of the plurality of process parameters, wherein the key process parameters are obtained according to the change of the plurality of process parameters and the electrical performance parameters, so that the performance of a semiconductor device is accurately reflected, and the accuracy of the process analysis of the semiconductor device is improved; the sensitivity analysis method adopts a similarity method to carry out similarity detection on the key process parameters, and further ensures that the key process parameters can accurately reflect the performance of the semiconductor device, thereby ensuring that important process variation parameters can be screened out, improving the analysis accuracy, and being beneficial to the improvement of the process of the semiconductor device and the improvement of the device efficiency.
Detailed Description
Referring to fig. 1, a ring oscillator includes a switch S, a semiconductor device assembly 1, a delay circuit 2 connected in parallel with the semiconductor device assembly 1, and an amplifier 3, where the semiconductor device assembly 1 includes a plurality of semiconductor devices Stage1, Stage2, and … … Stage N connected in series, where N is less than or equal to 100, the delay circuit 2 is connected to an input end of the amplifier 3, an output end of the amplifier 3 is a signal output end, and the delay circuit 2 includes a plurality of D1, D2, D3, D4, D1, D2, D3, and D4 connected in series, which are latches; the switch S is used for controlling the on/off of the current of the ring oscillator, when the ring oscillator is turned on, the voltage source inputs a bias current I to the input terminal of the ring oscillator, the delay circuit 2 is used for generating a differential signal to a next delay stage, and the amplifier 3 is used for amplifying the differential signal output by the delay circuit 2 and outputting the amplified differential signal through the signal output terminal output.
Referring to fig. 2, a method for obtaining electrical performance parameters of a semiconductor device by using the ring oscillator is implemented based on the ring oscillator, and the electrical performance parameters of the semiconductor device are obtained by controlling the ring oscillator: a1, when the switch S is opened, each semiconductor device in the semiconductor device combination 1 is conducted, and the conduction current and the frequency output by the semiconductor device combination 1 are measured; since the semiconductor devices are connected in series, the on-currents through the respective semiconductor devices are equal.
A2 and the switch S are turned off, each semiconductor device in the semiconductor device combination is turned off, and the leakage current of each semiconductor device is measured.
The electrical performance parameters of the semiconductor device comprise conduction current, frequency, leakage current, voltage, resistance, capacitance and delay time, wherein alternating current is the conduction current when the semiconductor device is in a conduction state, the leakage current is the current when the semiconductor device is in a turn-off state, and the delay time is determined by the delay circuit.
The switch S, the switching state of the semiconductor device and the output signal state of the signal output terminal are shown in the following table:
S
|
1
|
1
|
0
|
0
|
F/B
|
0
|
1
|
1
|
0
|
Output
|
0
|
1
|
0
|
0 |
in the truth table, the on state of the switch S is represented as "1", the off state of the switch is represented as "0", the on state of the semiconductor device is represented as "1", the off state of the semiconductor device is represented as "0", the output signal of the signal output end is represented as "1", the non-output signal of the signal output end is represented as "0", and the input end of the switch S is connected with the nand gate Q, so that when the switch S and the semiconductor device are simultaneously on, the signal output end has a signal output, and when one of the switch S and the semiconductor device is in the off state, the signal output end has no signal output, so that when the switch S is on (namely 1), the on current and the frequency of the semiconductor device are measured; when the switch S is turned off (namely 0), measuring the leakage current of the semiconductor device;
referring to fig. 3, a semiconductor device sensitivity analysis method based on machine learning, which is implemented based on the ring oscillator, includes:
s1, measuring and obtaining process parameters of the semiconductor device, see fig. 4, where the process parameters include the length, width, and thickness (but not limited to, length, thickness, and width) of the source region, the drain region, and the gate region (but not limited to, the gate region, the source region, and the drain region) of the semiconductor device, and in this embodiment, the process parameters are selected as follows: the distance from the source region to the drain region, the depth of the drain region; fig. 4 is a front view of a semiconductor device to be tested, which includes a silicon substrate 4, a gate region 5, a drain region 6, and source regions 7 distributed at two sides of the drain region 6, wherein the depth from the drain region 6 to the bottom end of the gate region 5 is D, and the distance from the source region 7 to the drain region 6 is P;
s2, obtaining the electrical performance parameters by adopting the method for obtaining the electrical performance parameters of the semiconductor device, wherein the electrical performance parameters comprise conduction current, frequency, leakage current, voltage, resistance, capacitance and delay time of the semiconductor device; the voltage, the resistance and the capacitance of the semiconductor device can be obtained by adopting the existing semiconductor device detection equipment;
s3, carrying out sensitivity analysis on the electrical performance of the semiconductor device:
s31, correlating the electrical performance parameters with the corresponding process parameters to construct a correlation model;
calculating the covariance cov (IK) of the correlation model of the process parameters and the electrical property parameters according to the covariance formula1、IK2),
cov(IK1、IK2)=E[(IK1-k1)(IK2-k2)];
Wherein, IK1Indicating a key process parameter, IK2Representing a key electrical property parameter, k1Is the mean value, k, of a key process parameter2Is the mean value of the key electrical performance parameters.
Correlation coefficient corr (IK) of correlation model is calculated based on covariance1,IK2):
S32, analyzing the sensitivity of each correlation model, and obtaining a sensitivity analysis result according to the correlation coefficient of the correlation model;
s33, sorting the process parameters according to the magnitude of the correlation coefficients based on the sensitivity analysis result;
s34, determining key process parameters according to the sequencing result: the correlation coefficient is large, which indicates that the process parameters are greatly influenced by the electrical performance parameters, so that the process parameters with large correlation with the electrical performance parameters are determined as key process parameters;
s4, carrying out similarity test on the key process parameters by adopting a similarity method in machine learning, wherein the similarity method comprises the following steps:
s41, based on the machine learning database, performing cluster analysis on the key process parameters, and classifying the key process parameters with similar or same characteristics according to groups;
s42, the similarity method is to compare the classified key process parameters in the same group with the standard characteristic parameters in the pre-established database, for example, compare the width of the gate region in the process parameters measured in the processing process with the width of the standard gate region in the database, and calculate the relevance between the key process parameters and the standard characteristic parameters in each group according to the covariance formula:
calculating the covariance of the key process parameters and the standard characteristic parameters according to a covariance formula
cov(IL
1,IL
2),
Wherein IL1Representing a key process parameter, IL2Represents a key electrical property parameter, u1Is the mean value of the key process parameter, u2Is the mean value of the key electrical performance parameters.
Calculating correlation coefficient corr (IL) of key process parameter and standard characteristic parameter based on covariance1,IL2),
The matrix is as follows:
s5, screening important key process parameters according to the correlation coefficient, namely determining the important key process parameters according to the correlation between the key process parameters and the standard characteristic parameters, wherein the smaller the correlation is, the larger the difference between the key process parameters and the standard characteristic parameters is, the more important the key process parameters are, namely, the important process variation parameters are;
s6, carrying out process optimization on the semiconductor device according to the process variation parameters, wherein the process optimization method comprises process scheme upgrading and process material upgrading;
and S7, after the process of the semiconductor device is optimized, returning to S2, and carrying out the next round of test on the variation enhancement or variation reduction result of the electrical performance and the process variation parameters of the semiconductor device.
In the process of processing the semiconductor device shown in fig. 4, the thickness proxiimity of the NiSi layer and the Depth of the drain region on the two sides of the source region and the drain region of the semiconductor device are obtained, the semiconductor device shown in fig. 4 is connected in series in a ring oscillator, and the electrical performance parameters of the semiconductor device are measured: delay time and leakage current IDDQ, testing the process parameters of the semiconductor device by adopting the method, wherein the test results are shown in FIG. 5a and FIG. 5B, FIG. 5a and FIG. 5B are the process variation conditions of the process parameters NiSi layer thickness Proximity and drain region Depth Depth of the semiconductor device measured by adopting the method of the invention, in FIG. 5a, the horizontal axis represents the NiSi layer thickness Proximity, the vertical axis represents the Delay time Delay and the leakage current IDDQ, the curve A represents the variation condition of the Delay time Delay along with the NiSi layer thickness Proximity, the curve B represents the variation condition of the leakage current IDDQ along with the NiSi layer thickness Proximity, and the round dots represent the Delay time Delay or the square points represent the leakage current IDDQ; in fig. 5B, the horizontal axis represents the Depth of the drain region, the vertical axis represents the leakage current IDDQ and the Delay time Delay, the curve a represents the variation of the Delay time Delay of the electrical performance parameter with the Depth of the drain region, and the curve B represents the variation of the leakage current IDDQ with the Depth of the drain region, as can be seen from fig. 5a and 5B, the closer the dot is to the curve a or the closer the square is to the curve B, the greater the correlation between the process parameter and the electrical performance parameter is, thereby facilitating the determination of the key process parameter, and the thickness proxiimity of the NiSi layer is increased, the Delay time Delay is decreased therewith, and the leakage IDDQ is increased therewith; the Depth of the drain region is increased, the Delay time Delay is increased, the leakage current IDDQ is reduced, the fact that the electrical performance parameters of the semiconductor device are related to the process parameters of the semiconductor device is shown, the process parameters can change due to the change of the process parameters, the accuracy of the process parameter variation detection of the variation parameters in the engineering parameters can be improved to 98% through the sensitivity method, the key process parameters can be accurately obtained, the accuracy of process analysis of the semiconductor device is improved, and the further improvement of the semiconductor processing technology is facilitated.
According to the method, the semiconductor devices to be measured are connected in series in the ring oscillator, the ring oscillator is connected with the delay circuit, and the delay circuit has a frequency reduction effect, so that delay is performed through the delay circuit, each semiconductor device in the semiconductor device combination is ensured to be in a conducting or turning-off state, the output frequency of the semiconductor device combination is reduced, and the electrical parameters of each semiconductor device in the semiconductor device combination can be conveniently measured; the ring oscillator is connected with an amplifier which can amplify the delay signal and the voltage signal, thereby ensuring the accuracy of the electrical performance parameter extraction of the semiconductor device.
In the method for acquiring the electrical performance parameters of the semiconductor device, the measurement and extraction of the electrical performance parameters of the semiconductor device are realized by controlling the ring oscillator, compared with the existing manual detection and extraction mode, the mode is simple and quick, the detection and acquisition efficiency of the electrical performance parameters is effectively improved, the subjective activity influence, the detection omission risk and the false detection risk are reduced, and the accuracy of parameter acquisition is improved, so that the method is favorable for improving the accuracy of the process analysis of the semiconductor device.
The above is only a preferred embodiment of the present application, and the present invention is not limited to the above embodiments. It is to be understood that other modifications and variations directly derivable or suggested by those skilled in the art without departing from the spirit and concept of the present invention are to be considered as included within the scope of the present invention.