CN113065173A - Encryption method and device for protecting processor embedded algorithm and storage medium - Google Patents
Encryption method and device for protecting processor embedded algorithm and storage medium Download PDFInfo
- Publication number
- CN113065173A CN113065173A CN202110435629.9A CN202110435629A CN113065173A CN 113065173 A CN113065173 A CN 113065173A CN 202110435629 A CN202110435629 A CN 202110435629A CN 113065173 A CN113065173 A CN 113065173A
- Authority
- CN
- China
- Prior art keywords
- chip
- encryption
- internal
- oscillation frequency
- program
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 29
- 230000010355 oscillation Effects 0.000 claims abstract description 45
- 238000012795 verification Methods 0.000 claims abstract description 28
- 238000012545 processing Methods 0.000 claims abstract description 13
- 230000002159 abnormal effect Effects 0.000 claims abstract description 12
- 238000005259 measurement Methods 0.000 claims description 6
- 239000013078 crystal Substances 0.000 claims description 4
- 239000010453 quartz Substances 0.000 claims description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 3
- 230000008569 process Effects 0.000 claims description 2
- 230000007246 mechanism Effects 0.000 abstract description 9
- 230000004888 barrier function Effects 0.000 description 3
- 230000006870 function Effects 0.000 description 3
- 238000013475 authorization Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
- G06F21/72—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in cryptographic circuits
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/50—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
- G06F21/57—Certifying or maintaining trusted computer platforms, e.g. secure boots or power-downs, version controls, system software checks, secure updates or assessing vulnerabilities
- G06F21/575—Secure boot
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
- G06F21/75—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation
Abstract
The invention discloses an encryption method, a device and a storage medium for protecting an embedded algorithm of a processor, wherein the method specifically comprises the following steps: measuring internal RC oscillation frequencies of a plurality of chips with the same model, taking the internal RC oscillation frequencies as preset information of the chips with the same model, and storing the preset information in a specific position in an external storage chip FLASH; writing the measured RC oscillation frequency inside the chip into an encryption program of the corresponding chip after encryption processing to generate verification information; comparing the checking information with preset information, and entering an abnormal execution program if the checking is wrong; if the verification is correct, measuring the internal RC oscillation frequency of the chip, comparing the internal RC oscillation frequency with preset information, and entering a normal execution state if the internal RC oscillation frequency is within an error range; otherwise, entering an abnormal execution program. Aiming at the chip without the preset ID, the invention replaces the preset ID with the frequency discreteness of the RC oscillator as a judgment basis, and has double-layer decoding obstacles, high safety, simple processing mechanism, low cost and stronger applicability.
Description
Technical Field
The invention belongs to the technical field of computers, and relates to an encryption method, an encryption device and a storage medium for protecting an embedded algorithm of a processor.
Background
Within the key technologies of wireless charging devices, there are many problems to be solved, including how to ensure impedance matching between various components, how to accurately measure voltage and current in complicated conditions, and the like. These problems all require some sort of algorithmic assistance from the processor.
Currently, most wireless charging hardware devices have cost, key algorithm data are stored in an external FLASH, the data are exposed outside, and no protection mechanism exists in the aspect of algorithms built in a memory; experienced plagiarisms can obtain key algorithms by means of reading the internal storage space of the processor, performing decompilation and the like, or directly dismantle the storage chip and install the storage chip on own equipment, and the algorithm runs illegally, so that high algorithm development cost is avoided.
The existing part of protection mechanisms only can be used for protecting processors with unique IDs, but a plurality of middle and low-end processors in the market have no preset unique ID function of a plurality of MCU chips due to reasons such as production cost and the like. Still other protection mechanisms have complex processing mechanisms and high hardware cost.
Disclosure of Invention
In order to solve the problems, the invention provides an encryption method, an encryption device and a storage medium for protecting an embedded algorithm of a processor, aiming at a chip without a preset ID, a frequency discreteness of an RC oscillator replaces the preset ID to be used as a judgment basis, double-layer deciphering barriers are arranged, the safety is high, the processing mechanism is simple, the cost is low, the applicability is stronger, the protection problem of the embedded algorithm of the processor is solved, and the embedded algorithm of the processor is prevented from being imitated by a third party.
The technical scheme adopted by the invention is that the encryption method for protecting the embedded algorithm of the processor specifically comprises the following steps:
s1, measuring internal RC oscillation frequencies of a plurality of chips with the same model, obtaining an average value of all frequency values and setting an error range to cover the internal RC oscillation frequencies of the plurality of chips, and storing the average value and the error range as preset information of the chips with the same model in a specific position in an external storage chip FLASH; writing the measured RC oscillation frequency inside the chip into an encryption program of the corresponding chip after encryption processing to generate verification information;
s2, after the chip is powered on, the chip enters an encryption program through a bootstrap program, verification information is compared with preset information, and if the verification is correct, the step S3 is carried out; if the check is wrong, entering an abnormal execution program;
s3, measuring the internal RC oscillation frequency of the chip, and entering a normal execution state if the measured internal RC oscillation frequency is compared with preset information and is within an error range; otherwise, entering an abnormal execution program.
Further, step S2 further includes: if the step S2 checks the error, it is determined whether the system is powered on for the first time, i.e., whether the system is powered on after the program is programmed for the last time; if the chip is electrified for the first time, measuring the internal RC oscillation frequency of the chip, writing the internal RC oscillation frequency into an encryption program through encryption processing, generating and storing verification information, setting a first electrifying mark, and entering a normal execution state; and if the power is not powered on for the first time, entering an abnormal execution program.
Further, the internal RC oscillation frequency of the measurement chip is: after resetting, a certain timer of the chip is started, and the RC oscillation frequency in the chip is measured.
Further, the counting pulse of the timer comes from an external quartz crystal oscillator.
Further, the error between the measured value of the RC oscillation frequency in the chip and the average value in the preset information is within 1%.
Further, in step S2, the generating of the corresponding verification information specifically includes: and reading the measured RC oscillation frequency by an encryption program, generating verification information through an encryption algorithm, and dispersedly storing the verification information into different Flash ROM storage units.
Further, the mode of entering the abnormal execution program is as follows: deleting the control program code by an IAP programming mode or randomly rewriting 1-2K bytes in the control program code, so that the normal working state can not be carried out, and the program enters a dead-cycle state.
Further, the encryption process is MD5 or SHA.
An encryption device for protecting an embedded algorithm of a processor realizes encryption by adopting the method.
A computer storage medium having stored therein at least one program instruction which is loaded and executed by a processor to implement a method as described above.
The invention has the beneficial effects that:
the invention is provided with double-layer decoding barriers, which can effectively prevent the internal algorithm of the processor memory from being stolen under the condition of no manufacturer authorization; only after the authorization of a manufacturer, the hardware of the whole equipment can normally work through the authentication of a specific algorithm between the processor and other protection chips. Aiming at the chip without the preset ID, the invention uses the frequency discreteness of the RC oscillator to replace the preset ID as a judgment basis, improves the safety of the control program code in the chip, does not need an additional circuit, can be completed only by utilizing the hardware characteristic in the processor, has low cost and is easy to realize.
The invention does not depend on the preset ID, can cover the middle-low end processor chip without providing the preset ID and the high-grade chip with the preset ID, is suitable for the high, middle and low end chips on the market, has stronger applicability, is widely suitable for common electronic products, protects the intellectual property rights of hardware manufacturers, and has important market value.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a diagram of cryptographic component connectivity according to an embodiment of the present invention.
Fig. 2 is a flowchart illustrating an encryption method according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
For general-purpose processing devices including ST microprocessor, the inside of the general-purpose processing device is provided with a unique serial number device ID, or called device ID, ST device is 96-bit unique equipment identifier, and the ST device is built in the chip when the chip is shipped. According to the unique ID serial number, the encryption protection of the algorithm code can be realized by combining the related encryption algorithm and an external memory chip. An unauthorized hardware processing/storage module, even if it obtains the serial number of the chip, cannot guarantee the normal operation of the hardware because of the lack of the related algorithm. However, many middle and low-grade MCU chips do not have a unique chip ID number function due to production cost, etc., and it is difficult to achieve protection by this method. The existing partial protection mechanism is suitable for chips programmed on line such as FPGA and the like, the processing mechanism is complex, the hardware cost is high, and the partial protection mechanism is suitable for equipment with high cost; it is difficult to widely apply.
The embodiment of the application discloses an encryption method for protecting an embedded algorithm of a processor, which is specifically carried out according to the following steps as shown in fig. 1-2:
s1, measuring the internal low-speed RC oscillation frequency of 10-15 chips of the same model, taking the average value of all frequency values and setting an error range, taking the average value and the error range as preset information of the chip of the model, and storing the preset information in a specific position in an external storage chip FLASH; the measured low-speed RC oscillation frequency inside the chip is encrypted and written into an encryption program of the corresponding chip to generate verification information;
measuring the internal RC oscillation frequency of the chip: starting a certain timer of the chip after resetting, and measuring the frequency of a low-speed RC oscillator in the chip; counting pulses of the timer come from an external quartz crystal oscillator, the precision and the stability are high, and the frequency measurement error is controllable. Considering that the frequency of the output signal of the RC oscillator is greatly influenced by the ambient temperature, the influence of temperature variation, crystal frequency error and the like on the measurement result should be considered. For example, if the nominal frequency of the internal low-speed RC oscillator of an STM 8S-series MCU chip is 128KHz ± 12.5%, and the frequency of the internal RC oscillator of a chip is 0x1D4EC (i.e., 120044 Hz) as measured by the timer TIM, the 0x1D4EC is encrypted and written into the encryption program of the corresponding chip, thereby generating the verification information.
The generating of the corresponding verification information specifically includes: the encryption program reads the measured RC oscillation frequency, generates verification information through a certain encryption algorithm (which can be but is not limited to MD5 or SHA and the like), and then dispersedly stores the verification information into different Flash ROM storage units; in order to prevent a thief from reading original information of the ID number of the chip in a certain mode, the original code of the ID number cannot be directly stored in the code.
S2, after the chip is powered on, the chip enters an encryption program through a bootstrap program, verification information is compared with preset information, if the verification information is within an error range, the verification is correct, and the step S3 is carried out; if the error is checked, the abnormal execution program or step S4 is entered;
and S3, measuring the internal RC oscillation frequency of the chip, if the measured internal RC oscillation frequency is compared with preset information and is within an error range, entering a normal execution state, indicating that the hardware equipment is a genuine module which is delivered from a factory, and executing a subsequent user program. Otherwise, entering IAP programming random rewriting program codes or randomly rewriting 1-2K bytes in control program codes, so that the normal working state can not be carried out, closing the interruption and entering a dead-cycle state.
S4, if the step S2 checks the error, it is judged whether to power on for the first time, that is, whether the system is started after the program is programmed for the last time; if the processor is powered on for the first time, the operator is considered as a legal owner of the processor, the internal RC oscillation frequency of the chip is measured, the internal RC oscillation frequency is written into an encryption program through encryption processing, verification information is generated and stored, a first power-on mark is set, and the processor enters a normal execution state; if the power is not powered on for the first time, the operation is considered to be illegal, IAP programming is carried out, program codes are randomly rewritten, and the interruption is closed to enter a dead loop state. The operation can avoid the problem of judgment errors caused by the fact that the verification information is forgotten to be written.
The embodiment of the invention is provided with double layers of decoding obstacles, wherein firstly, the verification information of the step S2 is compared with the preset information, and the program is not normally executed if the verification information is not in the error range; and secondly, measuring the RC oscillation frequency of the chip, comparing the RC oscillation frequency with preset information, and entering an abnormal execution program if the RC oscillation frequency is not within an error range. The illegal operation is the complete copy of software and hardware, namely an illegal person successfully imitates the hardware and copies the software to break the first-layer barrier; however, in the embodiment of the present invention, the preset information is of the genuine device, and is not illegal for operation, the measured RC oscillation frequency of the illegal device and the RC oscillation frequency of the hardware device have differences, and compared with the preset information, the probability that the measured RC oscillation frequency is not within the error range is very high. This means that a batch of devices operated illegally has a probability of not operating normally, and the probability depends on the error range, so that the difficulty and cost of decoding are increased, and the embedded algorithm of the processor is effectively protected.
A large number of experimental statistics show that after the MCU chip is started for 60 seconds (the purpose of measurement after power-on delay for a certain time is to wait for the internal temperature of the MCU chip to be stable, namely to reduce the influence of the environmental temperature on the result as much as possible), the error between the frequency measurement value of the same chip and the nominal frequency of the same chip is within 1%, and the frequency errors of different chips in different environments can be slightly different and can be determined through multiple experiments. The principle of determining the frequency error range is that the same chip ensures that the data measured after each power-on reset is within the error allowable range, so the allowable error is not too small; on the other hand, the possibility of the same frequency of different chips is as small as possible, so the allowable range of frequency error cannot be too large. Therefore, as long as the internal RC oscillation frequency measured after power-on is compared with the preset information, the error is within 1%, the internal RC oscillation frequency is considered to be legal, and otherwise the internal RC oscillation frequency is considered to be illegal.
The invention is not limited to ST processors, other processor type modules, power supply modules, etc. can be used for hardware protection by the method. The existing Physical Unclonable Function (PUF) needs to design a special circuit, is relatively complex and has higher cost; the RC oscillator does not need an additional circuit, can be completed only by utilizing the hardware characteristic in the processor, and has low cost and easy realization.
The encryption method for protecting the embedded algorithm of the processor, which is disclosed by the embodiment of the invention, can be stored in a computer readable storage medium if the encryption method is realized in the form of a software functional module and is sold or used as an independent product. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the encryption method for protecting the processor embedded algorithm according to the embodiment of the present invention. And the aforementioned storage medium includes: various media capable of storing program codes, such as a U disk, a removable hard disk, a ROM, a RAM, a magnetic disk, or an optical disk.
The above description is only for the preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention shall fall within the protection scope of the present invention.
Claims (10)
1. An encryption method for protecting an embedded algorithm of a processor is characterized by comprising the following steps:
s1, measuring internal RC oscillation frequencies of a plurality of chips with the same model, obtaining an average value of all frequency values and setting an error range to cover the internal RC oscillation frequencies of the plurality of chips, and storing the average value and the error range as preset information of the chips with the same model in a specific position in an external storage chip FLASH; writing the measured RC oscillation frequency inside the chip into an encryption program of the corresponding chip after encryption processing to generate verification information;
s2, after the chip is powered on, the chip enters an encryption program through a bootstrap program, verification information is compared with preset information, and if the verification is correct, the step S3 is carried out; if the check is wrong, entering an abnormal execution program;
s3, measuring the internal RC oscillation frequency of the chip, and entering a normal execution state if the measured internal RC oscillation frequency is compared with preset information and is within an error range; otherwise, entering an abnormal execution program.
2. The encryption method for protecting an embedded algorithm in a processor according to claim 1, wherein said step S2 further comprises: if the step S2 checks the error, judging whether to power on for the first time; if the chip is electrified for the first time, measuring the internal RC oscillation frequency of the chip, writing the internal RC oscillation frequency into an encryption program through encryption processing, generating and storing verification information, setting a first electrifying mark, and entering a normal execution state; and if the power is not powered on for the first time, entering an abnormal execution program.
3. The encryption method for protecting an embedded algorithm of a processor according to claim 1, wherein an internal RC oscillation frequency of the measurement chip is: after resetting, a certain timer of the chip is started, and the RC oscillation frequency in the chip is measured.
4. The encryption method for protecting an algorithm embedded in a processor of claim 3, wherein the counting pulse of said timer is from an external quartz crystal oscillator.
5. The encryption method according to claim 1, wherein the error between the measured value of the RC oscillation frequency inside the chip and the average value in the preset information is within 1%.
6. The encryption method for protecting an embedded algorithm of a processor according to claim 1, wherein in the step S2, the generating of the corresponding verification information specifically includes: and reading the measured internal RC oscillation frequency by an encryption program, generating verification information through an encryption algorithm, and dispersedly storing the verification information into different Flash ROM storage units.
7. The encryption method for protecting an embedded algorithm in a processor according to claim 1, wherein said entering into the abnormal execution procedure is performed by: deleting the control program code by an IAP programming mode or randomly rewriting 1-2K bytes in the control program code, so that the normal working state can not be carried out, and the program enters a dead-cycle state.
8. The encryption method for protecting an in-line algorithm of a processor as claimed in claim 6, wherein said encryption process is MD5 or SHA.
9. A cryptographic device for protecting an algorithm embedded in a processor, characterized in that the encryption is implemented using the method according to any one of claims 1-8.
10. A computer storage medium having stored therein at least one program instruction which is loaded and executed by a processor to implement the method of any one of claims 1 to 8.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110435629.9A CN113065173A (en) | 2021-04-22 | 2021-04-22 | Encryption method and device for protecting processor embedded algorithm and storage medium |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110435629.9A CN113065173A (en) | 2021-04-22 | 2021-04-22 | Encryption method and device for protecting processor embedded algorithm and storage medium |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN113065173A true CN113065173A (en) | 2021-07-02 |
Family
ID=76567380
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110435629.9A Pending CN113065173A (en) | 2021-04-22 | 2021-04-22 | Encryption method and device for protecting processor embedded algorithm and storage medium |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN113065173A (en) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1378998A1 (en) * | 2002-07-05 | 2004-01-07 | Stmicroelectronics SA | Method of operating a microcontroller chip having an internal RC oscillator, and microcontroller chip embodying the method |
| CN103220150A (en) * | 2013-04-08 | 2013-07-24 | 浪潮集团有限公司 | Tax check card based on FPGA (field programmable gate array) |
| CN104657682A (en) * | 2013-11-21 | 2015-05-27 | 恩智浦有限公司 | Electronic tamper detection |
| CN106443421A (en) * | 2016-09-06 | 2017-02-22 | 芯海科技（深圳）股份有限公司 | Automatic clock frequency measurement and calibration system and method |
| CN106919857A (en) * | 2015-12-28 | 2017-07-04 | 上海新微技术研发中心有限公司 | Chip, and starting protection device and method of chip |
-
2021
- 2021-04-22 CN CN202110435629.9A patent/CN113065173A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1378998A1 (en) * | 2002-07-05 | 2004-01-07 | Stmicroelectronics SA | Method of operating a microcontroller chip having an internal RC oscillator, and microcontroller chip embodying the method |
| CN103220150A (en) * | 2013-04-08 | 2013-07-24 | 浪潮集团有限公司 | Tax check card based on FPGA (field programmable gate array) |
| CN104657682A (en) * | 2013-11-21 | 2015-05-27 | 恩智浦有限公司 | Electronic tamper detection |
| CN106919857A (en) * | 2015-12-28 | 2017-07-04 | 上海新微技术研发中心有限公司 | Chip, and starting protection device and method of chip |
| CN106443421A (en) * | 2016-09-06 | 2017-02-22 | 芯海科技（深圳）股份有限公司 | Automatic clock frequency measurement and calibration system and method |
Non-Patent Citations (1)
| Title |
|---|
| 潘永雄等: "单片机控制程序加密策略探索与应用", 《计算机工程与设计》 * |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US10129037B2 (en) | System and method for authenticating and enabling functioning of a manufactured electronic device | |
| US10762210B2 (en) | Firmware protection and validation | |
| US8184812B2 (en) | Secure computing device with monotonic counter and method therefor | |
| JP6373888B2 (en) | Information processing apparatus and control method | |
| JP4521269B2 (en) | Method and device used for security of electronic devices such as cell phones | |
| US8060748B2 (en) | Secure end-of-life handling of electronic devices | |
| CN110990084B (en) | Chip secure starting method and device, storage medium and terminal | |
| WO2008071572A1 (en) | Virtual secure on-chip one time programming | |
| TW201500960A (en) | Detection of secure variable alteration in a computing device equipped with unified extensible firmware interface (UEFI)-compliant firmware | |
| JP6518798B2 (en) | Device and method for managing secure integrated circuit conditions | |
| JP6622360B2 (en) | Information processing device | |
| JP2004051056A (en) | Electronic controller for automobile | |
| CN113065173A (en) | Encryption method and device for protecting processor embedded algorithm and storage medium | |
| EP3091468A1 (en) | Integrated circuit access | |
| EP1435558A1 (en) | On-device random number generator | |
| TWI467408B (en) | Embedded devices and control methods thereof | |
| US20200401690A1 (en) | Techniques for authenticating and sanitizing semiconductor devices | |
| CN115292761A (en) | Security chip data protection method, security chip and storage medium | |
| JP4978241B2 (en) | Secure device, its secure device, electronic device | |
| CN114186283A (en) | Recording modification indications for electronic device components | |
| CN117708896A (en) | Method for protecting firmware data of embedded device and embedded device | |
| CN117708897A (en) | Method for protecting firmware data of embedded device and embedded device | |
| CN117472465A (en) | System-on-chip secure starting method and device, electronic equipment and storage medium | |
| Abrahamsson | Security Enhanced Firmware Update Procedures in Embedded Systems | |
| CN112015582A (en) | Self-correcting memory system and method for providing error correction to memory content |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20210702 |