CN113064743A - Annular buffer area reading and writing method and device - Google Patents
Annular buffer area reading and writing method and device Download PDFInfo
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- CN113064743A CN113064743A CN202110405995.XA CN202110405995A CN113064743A CN 113064743 A CN113064743 A CN 113064743A CN 202110405995 A CN202110405995 A CN 202110405995A CN 113064743 A CN113064743 A CN 113064743A
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
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- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
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Abstract
The application discloses a method and a device for reading and writing a ring buffer area, wherein the method comprises the following steps: acquiring the length N of a ring buffer, wherein the length of the ring buffer is N, N elements in the ring buffer are identified, and the address intervals between adjacent elements of the ring buffer are the same; dividing the ring buffer into M groups, wherein address intervals between adjacent elements in each of the M groups are the same; m groups are respectively used as sub-ring buffer areas of the ring buffer area, each group is a sub-ring buffer area, and the number of the sub-ring buffer areas is M; one or more of the M sub-ring buffers are read or written. Through the method and the device, the problem that the read-write efficiency is low due to the fact that the annular buffer area in the prior art can only be used by one user for one operation at a time is solved, and the read-write efficiency of the annular buffer area is improved to a certain extent.
Description
Technical Field
The application relates to the field of software, in particular to a method and a device for reading and writing a ring buffer.
Background
In programs (e.g., communication programs), ring buffers are often used as data structures to store data sent and received in communications. The ring buffer is a first-in-first-out circular buffer that provides the communication program with mutually exclusive access to the buffer.
The ring buffer typically has a read pointer and a write pointer. The read pointer points to data readable in the ring buffer and the write pointer points to a writable buffer in the ring buffer. Data reading and writing of the buffer can be realized by moving the read pointer and the write pointer. In the usual case, a read user of the ring buffer will only influence the read pointer, whereas a write user will only influence the write pointer. If only one reading user and one writing user exist, the correctness of the data can be ensured without adding a mutual exclusion protection mechanism. If multiple read-write users access the ring buffer, a mutual exclusion protection mechanism must be added to ensure that multiple users access the ring buffer mutually.
That is, for the read operation or the write operation of the ring buffer, there is at most one user to perform, which reduces the efficiency of reading and writing data to some extent.
Disclosure of Invention
The embodiment of the application provides a method and a device for reading and writing a ring buffer area, which are used for at least solving the problem that the reading and writing efficiency is low because the ring buffer area in the prior art can only have one user for one operation at a time.
According to an aspect of the present application, there is provided a ring buffer read-write method, including: acquiring the length N of a ring buffer, wherein the length of the ring buffer is N, N marks that N elements exist in the ring buffer, and the address intervals between adjacent elements of the ring buffer are the same; dividing the ring buffer into M groups, wherein address intervals between adjacent elements in each of the M groups are the same; the M groups are respectively used as sub-ring buffer areas of the ring buffer area, each group is a sub-ring buffer area, and the number of the sub-ring buffer areas is M; and performing a read operation or a write operation on one or more of the M sub-ring buffers.
Further, reading one or more of the M sub-ring buffers comprises: in the case of performing a write operation on the ring buffer, performing a read operation from a plurality of sub-ring buffers of the M sub-ring buffers; or, the writing one or more of the M sub ring buffers comprises: and in the case of reading the ring buffer, writing from a plurality of sub-ring buffers of the M sub-ring buffers.
Further, N is greater than or equal to M, N and M are both positive integers, and N is divisible by M.
Further, the address spacing between adjacent elements in each of the sub-ring buffers is the same.
Further, the address of the p-th element of the ring buffer is: (i × p + offset)% N, where i is an address interval between adjacent elements of the ring buffer, offset is an address of the 0 th element, N is a length of the ring buffer,% is modulo; the address of the p-th element of each sub-ring buffer is: (j × p + m)% N, where j is the address spacing between adjacent elements of the sub-ring buffers and m is the address of the 0 th element of each sub-ring buffer, where j is greater than i.
According to another aspect of the present application, there is also provided a ring buffer read/write apparatus, including: an obtaining module, configured to obtain a length N of a ring buffer, where the length N of the ring buffer indicates that N elements are in the ring buffer, and address intervals between adjacent elements of the ring buffer are the same; a dividing module, configured to divide the ring buffers into M groups, where address intervals between adjacent elements in each of the M groups are the same, the M groups are respectively used as sub-ring buffers of the ring buffers, each group is a sub-ring buffer, and the number of the sub-ring buffers is M; and the read-write module is used for performing read operation or write operation on one or more of the M sub-ring buffers.
Further, the read-write module is configured to, in a case of performing a write operation on the ring buffer, perform a read operation from multiple sub-ring buffers in the M sub-ring buffers; or, the read-write module is configured to perform a write operation from multiple sub-ring buffers of the M sub-ring buffers under the condition of performing a read operation on the ring buffer.
Further, N is greater than or equal to M, N and M are both positive integers, and N is divisible by M.
Further, the address spacing between adjacent elements in each of the sub-ring buffers is the same.
Further, the address of the p-th element of the ring buffer is: (i × p + offset)% N, where i is an address interval between adjacent elements of the ring buffer, offset is an address of the 0 th element, N is a length of the ring buffer,% is modulo; the address of the p-th element of each sub-ring buffer is: (j × p + m)% N, where j is the address spacing between adjacent elements of the sub-ring buffers and m is the address of the 0 th element of each sub-ring buffer, where j is greater than i.
In the embodiment of the application, the length N of a ring buffer is obtained, where the length N of the ring buffer indicates that N elements are in the ring buffer, and address intervals between adjacent elements of the ring buffer are the same; dividing the ring buffer into M groups, wherein address intervals between adjacent elements in each of the M groups are the same; the M groups are respectively used as sub-ring buffer areas of the ring buffer area, each group is a sub-ring buffer area, and the number of the sub-ring buffer areas is M; and performing a read operation or a write operation on one or more of the M sub-ring buffers. Through the method and the device, the problem that the read-write efficiency is low due to the fact that the annular buffer area in the prior art can only be used by one user for one operation at a time is solved, and the read-write efficiency of the annular buffer area is improved to a certain extent.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this application, illustrate embodiments of the application and, together with the description, serve to explain the application and are not intended to limit the application. In the drawings:
FIG. 1 is a flowchart of a method for reading from and writing to a ring buffer according to an embodiment of the present application.
Detailed Description
It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict. The present application will be described in detail below with reference to the embodiments with reference to the attached drawings.
It should be noted that the steps illustrated in the flowcharts of the figures may be performed in a computer system such as a set of computer-executable instructions and that, although a logical order is illustrated in the flowcharts, in some cases, the steps illustrated or described may be performed in an order different than presented herein.
In this embodiment, a method for reading and writing a ring buffer is provided, and fig. 1 is a flowchart of a method for reading and writing a ring buffer according to an embodiment of the present application, and as shown in fig. 1, the flowchart includes the following steps:
step S102, obtaining the length N of a ring buffer area, wherein the length of the ring buffer area is N, N elements in the ring buffer area are marked, and the address intervals between adjacent elements of the ring buffer area are the same;
step S104, dividing the ring buffer into M groups, wherein the address intervals between adjacent elements in each of the M groups are the same; m groups are respectively used as sub-ring buffer areas of the ring buffer area, each group is a sub-ring buffer area, and the number of the sub-ring buffer areas is M;
and step S106, performing reading operation or writing operation on one or more of the M sub-ring buffers.
In the ring buffer, if only one reading user and one writing user exist, the correctness of the data can be ensured without adding a mutual exclusion protection mechanism. If multiple read-write users access the ring buffer, a mutual exclusion protection mechanism must be added to ensure that multiple users access the ring buffer mutually. Therefore, it is not possible to concurrently read operations in one ring buffer, and similarly, it is also possible to concurrently write operations, which results in inefficient reading and writing. Through the steps, one ring buffer is divided into a plurality of sub-ring buffers, and when reading is carried out, only one user is required to carry out the reading operation or the writing operation in one sub-ring buffer, so that for the ring buffer, due to the division of the sub-ring buffer, M reading operations can be concurrently carried out, or M writing operations can be concurrently carried out, and the reading and writing efficiency is greatly improved compared with that for dividing the sub-ring buffer. Through the steps, the problem that the read-write efficiency is low because the annular buffer area in the prior art can only be used by one user for one operation at a time is solved, and the read-write efficiency of the annular buffer area is improved to a certain extent.
For one ring buffer, read and write operations can be performed simultaneously. For convenience of description, the ring buffer is hereinafter referred to as a parent ring, and the sub-ring buffer is hereinafter referred to as a sub-ring. If a parent ring is regarded as a ring buffer to perform a write operation, and if a data read operation is required, the data are distributed in different child rings exactly, and each child ring can be regarded as an independent ring buffer. I.e., in the case of a write operation to a ring buffer, a read operation is performed from a plurality of the M sub-ring buffers.
Similarly, when a parent ring is regarded as a ring buffer for read operation, if data needs to be written, if only one data needs to be written, the parent ring can be regarded as a ring buffer for writing data. If more than one write data is needed, each sub-ring can be considered as a separate ring buffer for writing. I.e., in the case of a read operation to a ring buffer, a write operation is performed from a plurality of the M sub-ring buffers.
The processing mode can be regarded as data fan-in and data fan-out, one father ring writes data, and a plurality of son rings read the data, so that the data fan-out is realized, and the data broadcast can be constructed. Data is written into a plurality of child rings, and data is read from a parent ring, so that data fanin is realized, and data summarization can be constructed.
In the above two embodiments, the mutual exclusion mechanism for writing data or reading data in the parent ring may be omitted, and as another embodiment, the data may be read in multiple child rings, or written in multiple child rings, but the mutual exclusion mechanism is maintained in the same child ring, that is, only one operation is available for reading data in the same child ring at the same time, and only one operation is available for writing data in the same child ring.
For faster data processing, after a ring cache (called a parent ring and the same below) is cut into a plurality of ring caches (called subrings and the same below) through homomorphic addressing, the subrings can be addressed without locks; the addressing between the parent ring and the child ring can also be done in a lockless manner. Because addressing is lockless, ring-to-ring reads and writes do not affect each other. Such lock-free buffering may improve the i/o throughput of the ring buffer.
As another optional implementation, when the amount of data to be written simultaneously exceeds the number of the child rings, at least one child ring is selected from the plurality of child rings to be divided, and each selected child ring is divided into a plurality of child rings (grandchild rings) respectively. When the sub-ring is selected, the sub-ring with the least amount of stored data may be selected for division.
There are many ways to divide the sub-ring, for example, several sub-rings with the same capacity (i.e. the same length) in the average division of the parent ring can be divided, i.e. N is greater than or equal to M, N and M are both positive integers, and N can be evenly divided by M. Or, each subring may have a different length, or after several subrings are divided, the remaining part of the father ring still reads and writes according to the data reading and writing manner of the father ring.
As a preferred embodiment, the address spacing between adjacent elements in each sub-ring buffer is the same. For example, the address of the p-th element of the ring buffer is: (i × p + offset)% N, where i is the address interval between adjacent elements of the ring buffer, offset is the address of the 0 th element, N is the length of the ring buffer,% is modulo; the address of the p-th element of each sub-ring buffer is: (j × p + m)% N, where j is the address spacing between adjacent elements of the sub-ring buffers, and m is the address of the 0 th element of each sub-ring buffer, where j is greater than i.
In this case, the addressing modes of the parent ring and the child ring are consistent, and the same program can be adopted, so that the programming is simplified. Before reading and writing data, addressing is needed, and the same set of addressing program can simplify the function of developing read-write data.
The mode can be applied to IC design, and the read-write end of a father ring or a plurality of son rings is used as the i/o end of the cache, so that multi-end cache can be realized. The reading and writing among the i/o ends can be realized without mutual influence. Dynamic allocation of peers may also be supported through appropriate ring resource management. Because the parent ring and the child ring have the same addressing method, the addressing logic circuit can be multiplexed and simplified to some extent.
In this embodiment, there is also provided an electronic device comprising a memory in which a computer program is stored and a processor arranged to run the computer program to perform the method in the above embodiments.
These computer programs may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks, and corresponding steps may be implemented by different modules.
The programs described above may be run on a processor or may also be stored in memory (or referred to as computer-readable media), which includes both non-transitory and non-transitory, removable and non-removable media, that implement information storage by any method or technology. The information may be computer readable instructions, data structures, modules of a program, or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), Read Only Memory (ROM), Electrically Erasable Programmable Read Only Memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), Digital Versatile Discs (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices, or any other non-transmission medium that can be used to store information that can be accessed by a computing device. As defined herein, a computer readable medium does not include a transitory computer readable medium such as a modulated data signal and a carrier wave.
The electronic device may further include a device or system formed by software modules, where the modules in the device or system correspond to the steps in the above embodiments, and have already been described, and are not described herein again. For example, in this embodiment, the apparatus or system formed by the software modules may be referred to as a ring buffer read/write apparatus, and includes: the device comprises an acquisition module, a storage module and a processing module, wherein the acquisition module is used for acquiring the length N of a ring buffer, the length of the ring buffer is N, N elements are marked in the ring buffer, and the address intervals between adjacent elements of the ring buffer are the same; the device comprises a dividing module, a storage module and a processing module, wherein the dividing module is used for dividing the ring buffer into M groups, the address intervals between adjacent elements in each of the M groups are the same, the M groups are respectively used as sub-ring buffers of the ring buffer, each group is a sub-ring buffer, and the number of the sub-ring buffers is M; and the read-write module is used for performing read operation or write operation on one or more of the M sub-ring buffers.
As another preferred embodiment, the address spacing between adjacent elements in each sub-ring buffer is the same. In the apparatus, an addressing module may be further included, the addressing module being configured to address the parent ring and the child ring according to a calculation of the addresses of the elements: the address of the p-th element of the ring buffer is: (i × p + offset)% N, where i is the address interval between adjacent elements of the ring buffer, offset is the address of the 0 th element, N is the length of the ring buffer,% is modulo; the address of the p-th element of each sub-ring buffer is: (j × p + m)% N, where j is the address spacing between adjacent elements of the sub-ring buffers, and m is the address of the 0 th element of each sub-ring buffer, where j is greater than i.
After the addressing module performs addressing, as a preferred embodiment, the read-write module is configured to perform read operation from multiple sub-ring buffers of the M sub-ring buffers in the case of performing write operation on the ring buffer; or, the read-write module is configured to perform a write operation from multiple sub-ring buffers of the M sub-ring buffers under the condition of performing a read operation on the ring buffer.
The following description is made in connection with an example of a split ring buffer used in communication software. This example may be used in communication software as well as in other software.
The looping mechanism of the continuous memory space with the length N (wherein N is a positive integer, the same holds below) is that a random address addr (wherein addr > -0) is subjected to modulo operation on N, and the obtained values are circularly distributed in a closed interval of [0, N-1 ]. Addressing with this value will make the memory spaces join end to form a ring. In particular, modulo N can be simplified by bitanding N-1 when N is a non-negative integer power of 2. The general case is discussed in this example, and as to this special case, the general case is included.
Addressing method
In a circular buffer of length N, the address spacing of adjacent elements is 1. Assuming that an element with an address of offset is taken as the 0 th element, the address of the p-th element is: (1 × p + offset)% N, where% is modulo, the same as below.
For a circular buffer of length N, the elements are cut into M groups (where N, M are all positive integers, N > ═ M, N divisible by M) the next iteration, so that any 1 element belongs to and only belongs to 1 group. It can be seen that each group is N/M in length.
Since N/M is a positive integer, any group obtained by splitting is known to be a ring according to the above ring formation mechanism. Let the ith element of the mth group (where 0< ═ M-1, the same applies below) be denoted as E _ M _ i, and the slicing method is as follows:
E_0_0,E_1_0,...,E_M-1_0,E_0_1,E_1_1,...,E_M-1_1,...,E_0_N/M-1,E_1_N/M-1,...,E_M-1_N/M-1
for any mth group, the adjacent element spacing is M, and the 0 th element address is M. Then the addressing method for the p-th element is: (M × p + M)% N, it can be seen that, according to the above-mentioned splitting method, the ring buffer with length N (referred to as parent ring) can be split into M ring buffers with length N/M (referred to as child rings), and any 2 child rings do not intersect. Comparing the equations (0.1) and (1.1), it can be seen that for any element of any child ring, there is a homomorphic addressing mode with the parent ring element.
Because the father ring and the son ring have homomorphic addressing modes, the father ring or any son ring can be addressed by only one set of program, and the program design is simplified.
After segmentation, the sub-rings can be addressed in parallel; concurrent addressing between the parent ring and the child ring can also be realized in a locking or unlocking mode. In the concurrent process, reading and writing between the rings are not affected mutually. The implementation of read-write separation can improve the i/o throughput rate of the ring buffer.
Several topological applications can be built. Such as: the data fan-out can be realized by writing in 1 father ring and reading in a plurality of son rings. Multiple child ring writes, 1 parent ring reads, data merging can be achieved.
The above are merely examples of the present application and are not intended to limit the present application. Various modifications and changes may occur to those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the scope of the claims of the present application.
Claims (10)
1. A method for reading and writing a ring buffer area is characterized by comprising the following steps:
acquiring the length N of a ring buffer, wherein the length of the ring buffer is N, N marks that N elements exist in the ring buffer, and the address intervals between adjacent elements of the ring buffer are the same;
dividing the ring buffer into M groups, wherein address intervals between adjacent elements in each of the M groups are the same; the M groups are respectively used as sub-ring buffer areas of the ring buffer area, each group is a sub-ring buffer area, and the number of the sub-ring buffer areas is M;
and performing a read operation or a write operation on one or more of the M sub-ring buffers.
2. The method of claim 1,
reading one or more of the M sub-ring buffers comprises: in the case of performing a write operation on the ring buffer, performing a read operation from a plurality of sub-ring buffers of the M sub-ring buffers; alternatively, the first and second electrodes may be,
writing to one or more of the M sub-ring buffers comprises: and in the case of reading the ring buffer, writing from a plurality of sub-ring buffers of the M sub-ring buffers.
3. The method according to claim 1 or 2,
the N is larger than or equal to the M, both the N and the M are positive integers, and the N can be evenly divided by the M.
4. The method of claim 3, wherein the address spacing between adjacent elements in each of the sub-ring buffers is the same.
5. The method of claim 4,
the address of the p-th element of the ring buffer is: (i × p + offset)% N, where i is an address interval between adjacent elements of the ring buffer, offset is an address of the 0 th element, N is a length of the ring buffer,% is modulo;
the address of the p-th element of each sub-ring buffer is: (j × p + m)% N, where j is the address spacing between adjacent elements of the sub-ring buffers and m is the address of the 0 th element of each sub-ring buffer, where j is greater than i.
6. A ring buffer read/write apparatus, comprising:
an obtaining module, configured to obtain a length N of a ring buffer, where the length N of the ring buffer indicates that N elements are in the ring buffer, and address intervals between adjacent elements of the ring buffer are the same;
a dividing module, configured to divide the ring buffers into M groups, where address intervals between adjacent elements in each of the M groups are the same, the M groups are respectively used as sub-ring buffers of the ring buffers, each group is a sub-ring buffer, and the number of the sub-ring buffers is M;
and the read-write module is used for performing read operation or write operation on one or more of the M sub-ring buffers.
7. The apparatus of claim 6,
the read-write module is used for reading from a plurality of sub-ring buffers in the M sub-ring buffers under the condition of writing to the ring buffer; alternatively, the first and second electrodes may be,
the read-write module is configured to perform write operation from multiple sub-ring buffers in the M sub-ring buffers under the condition that read operation is performed on the ring buffer.
8. The apparatus according to claim 6 or 7,
the N is larger than or equal to the M, both the N and the M are positive integers, and the N can be evenly divided by the M.
9. The apparatus of claim 8, wherein the address spacing between adjacent elements in each of the sub-ring buffers is the same.
10. The apparatus of claim 9,
the address of the p-th element of the ring buffer is: (i × p + offset)% N, where i is an address interval between adjacent elements of the ring buffer, offset is an address of the 0 th element, N is a length of the ring buffer,% is modulo;
the address of the p-th element of each sub-ring buffer is: (j × p + m)% N, where j is the address spacing between adjacent elements of the sub-ring buffers and m is the address of the 0 th element of each sub-ring buffer, where j is greater than i.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN117407148A (en) * | 2022-07-08 | 2024-01-16 | 华为技术有限公司 | Data writing method, data reading device, electronic equipment and storage medium |
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| CN106790599A (en) * | 2016-12-29 | 2017-05-31 | 中国人民解放军国防科学技术大学 | It is a kind of based on multinuclear without lock buffer circle symbiosis virtual machine communication method |
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