CN113053775B - Wafer temperature controller, wafer temperature controller system, wafer temperature control method and plasma processing device - Google Patents
Wafer temperature controller, wafer temperature controller system, wafer temperature control method and plasma processing device Download PDFInfo
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- CN113053775B CN113053775B CN201911377075.0A CN201911377075A CN113053775B CN 113053775 B CN113053775 B CN 113053775B CN 201911377075 A CN201911377075 A CN 201911377075A CN 113053775 B CN113053775 B CN 113053775B
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- 238000000034 method Methods 0.000 title claims abstract description 24
- 238000012545 processing Methods 0.000 title claims abstract description 14
- 238000001816 cooling Methods 0.000 claims abstract description 179
- 230000001276 controlling effect Effects 0.000 claims description 34
- 238000001514 detection method Methods 0.000 claims description 25
- 238000002955 isolation Methods 0.000 claims description 20
- 230000001105 regulatory effect Effects 0.000 claims description 9
- 238000006243 chemical reaction Methods 0.000 claims description 8
- 238000003860 storage Methods 0.000 claims description 5
- 238000009529 body temperature measurement Methods 0.000 claims description 4
- 230000005540 biological transmission Effects 0.000 claims description 3
- 238000009826 distribution Methods 0.000 abstract description 7
- 239000004065 semiconductor Substances 0.000 abstract description 4
- 230000000694 effects Effects 0.000 abstract description 3
- 239000007789 gas Substances 0.000 description 165
- 239000000306 component Substances 0.000 description 8
- 238000010586 diagram Methods 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 239000001307 helium Substances 0.000 description 3
- 229910052734 helium Inorganic materials 0.000 description 3
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 3
- 238000001020 plasma etching Methods 0.000 description 2
- 230000004044 response Effects 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000008094 contradictory effect Effects 0.000 description 1
- 239000000110 cooling liquid Substances 0.000 description 1
- 239000008358 core component Substances 0.000 description 1
- 238000000354 decomposition reaction Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 description 1
- 238000012797 qualification Methods 0.000 description 1
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- 239000000725 suspension Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67098—Apparatus for thermal treatment
- H01L21/67109—Apparatus for thermal treatment mainly by convection
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32715—Workpiece holder
- H01J37/32724—Temperature
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6831—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
- H01L21/6833—Details of electrostatic chucks
Abstract
The invention is applicable to the technical field of semiconductors and discloses a wafer temperature controller, a wafer temperature control system, a wafer temperature control method and a plasma processing device. Wherein, wafer temperature control system includes: the base is used for bearing an electrostatic chuck, and at least two first cooling areas capable of independently controlling temperature are arranged in the base; the electrostatic chuck comprises a bearing surface for bearing a wafer, wherein at least two second gas cooling areas capable of independently controlling temperature are arranged on the bearing surface; the first cooling region and the second gas cooling region do not completely coincide in a direction perpendicular to the electrostatic chuck surface. The invention can realize the effect of uniform wafer temperature distribution.
Description
Technical Field
The present invention relates to the field of semiconductor technologies, and in particular, to a wafer temperature controller, a wafer temperature controller system, a wafer temperature control method, and a wafer temperature control method.
Background
In the semiconductor device manufacturing process, controlling the temperature stability and uniformity of the wafer is an important technique because the radial temperature uniformity of the wafer and the circumferential temperature uniformity of the wafer directly affect the uniformity of the wafer etching rate and thus the quality of the chips.
In the prior art, control of wafer temperature is achieved using an electrostatic chuck, which is one of the core components in a plasma etch chamber. The prior art also provides an electric heater between the electrostatic chuck and the base, but there are a number of problems associated with the electric heater:
1) The response time of the electric heater is slow, and crosstalk phenomenon exists between different temperature areas;
2) A radio frequency filter is needed to avoid leakage of radio frequency current;
3) When the temperature of the same wafer ring in different angle orientations needs to be controlled, a plurality of electric heaters are required to be additionally arranged so as to realize the purpose of compensating the temperature asymmetry of the wafer in the rotating direction.
With the increasing requirement of wafer processing precision, the number of independent temperature control areas on the electrostatic chuck is required to be increased, and the electric heater has the problems, so that the multi-area temperature control faces a larger technical problem.
Disclosure of Invention
The first objective of the present invention is to provide a wafer temperature control system, which is aimed at solving the technical problems that the wafer temperature control system in the related art cannot respond to the wafer temperature change quickly and can realize accurate temperature adjustment of different parts of the wafer.
In order to achieve the above purpose, the invention provides the following scheme: a wafer temperature control system, comprising: the base is used for bearing an electrostatic chuck, and at least two first cooling areas capable of independently controlling temperature are arranged in the base;
the electrostatic chuck comprises a bearing surface for bearing a wafer, wherein at least two second gas cooling areas capable of independently controlling temperature are arranged on the bearing surface;
the first cooling region and the second gas cooling region do not completely coincide in a direction perpendicular to the electrostatic chuck surface.
Further, the wafer temperature control system forms a number of independently temperature controllable cooling zones on the wafer that is greater than a sum of the number of first cooling zones and the number of second gas cooling zones.
Further, a plurality of isolation belts are arranged on the bearing surface, and each isolation belt comprises an annular isolation belt arranged in the circumferential direction and/or a strip-shaped isolation belt arranged in the radial direction.
Further, the wafer temperature control system further includes:
a gas supply assembly, the gas supply assembly comprising:
a plurality of gas delivery pipes for delivering gas to each of the second gas cooling regions,
a plurality of pressure control components for regulating and controlling the pressure of the gas conveyed on each gas conveying pipe;
temperature measurement subassembly, temperature measurement subassembly includes:
the temperature measuring sensors are arranged corresponding to the second gas cooling areas;
and the controller is connected with each temperature measuring sensor and each pressure control component.
Further, the gas supply assembly further comprises:
a main pipe connected to each of the gas delivery pipes for supplying gas to each of the gas delivery pipes,
the first switch control valves are arranged on the air delivery pipes and used for controlling the on-off of the air delivery pipes respectively.
Further, the gas supply assembly further comprises: the exhaust pipes are connected with the gas transmission pipes;
the exhaust pipe includes:
a first branch pipe connected with the gas pipe, a second switch control valve arranged on the first branch pipe,
and the second branch pipe is connected with the first branch pipe in parallel, and a flow limiting hole is arranged on the second branch pipe.
Further, the first switch control valve is located between the pressure control part and the second gas cooling area, and the portion where the gas delivery pipe is connected to the gas discharge pipe is located between the first switch control valve and the pressure control part.
Further, the gas supply assembly further comprises:
and the third switch control valve is arranged on the main pipeline and used for controlling the on-off of the main pipeline.
Further, the base is embedded with a cooling pipeline.
A second object of the present invention is to provide a wafer temperature control method, comprising the steps of: acquiring temperature detection information of a plurality of parts of a wafer, wherein at least two pieces of temperature detection information are part temperature detection information corresponding to different angle orientations of the same ring of the wafer;
analyzing and evaluating each temperature detection information;
and sending pressure adjustment information for adjusting the gas input pressure of the second gas cooling cavity on the electrostatic chuck according to each temperature detection information.
Further, the step of transmitting pressure adjustment information for adjusting the gas input pressure of the second gas cooling region on the electrostatic chuck based on each of the temperature detection information includes:
judging whether the temperature detection information of one part of the wafer is lower or higher than the temperature of other parts according to the temperature detection information;
if the temperature is lower than the temperature of other parts of the wafer, the sent pressure regulating information is used for controlling and reducing the gas input pressure of a second gas cooling area corresponding to the part of the wafer;
and if the temperature is higher than the temperature of other parts of the wafer, sending the pressure adjustment information to be used for controlling and increasing the gas input pressure of the second gas cooling cavity corresponding to the part of the wafer.
A third object of the present invention is to provide a wafer temperature controller, including: the wafer temperature control system comprises a memory, a processor and a wafer temperature control program which is stored in the memory and can run on the processor, wherein the wafer temperature control program realizes the steps of the wafer temperature control method when being executed by the processor.
A fourth object of the present invention is to provide a computer readable storage medium having a wafer temperature control program stored thereon, which when executed by a processor, implements the steps of the wafer temperature control method described above.
A fifth object of the present invention is to provide a plasma processing apparatus, which includes a vacuum reaction chamber and the above wafer temperature control system, wherein the wafer temperature control system is disposed in the vacuum reaction chamber.
The wafer temperature control system carries the electrostatic chuck through the base, at least two first cooling areas capable of independently controlling temperature are arranged in the base, the wafer is carried through the electrostatic chuck, and at least two second gas cooling areas capable of independently controlling temperature are arranged on the electrostatic chuck, so that the temperature of the electrostatic chuck is adjusted through the first cooling areas in the base, the temperature of the wafer is indirectly adjusted, and the temperature of the wafer is directly adjusted through the second gas cooling areas on the electrostatic chuck, and the wafer temperature change can be responded quickly. In addition, the first cooling area and the second gas cooling area are not completely overlapped in the direction perpendicular to the surface of the electrostatic chuck, so that a plurality of cooling areas can be obtained through superposition, and the purpose of accurately controlling the temperature change of the wafer is achieved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to the structures shown in these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic cross-sectional view of an assembled wafer, electrostatic chuck, pedestal, and isolation belt of a wafer temperature control system according to an embodiment of the present invention;
FIG. 2 is a schematic illustration of the connection of a second gas cooling zone to a gas supply assembly provided in an embodiment of the present invention;
FIG. 3 is a schematic view of a first cooling area according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a second gas cooling zone provided by an embodiment of the present invention;
FIG. 5 is a schematic diagram of an embodiment of a second gas cooling region on an electrostatic chuck and a first cooling region within a susceptor provided by an embodiment of the present invention;
FIG. 6 is a schematic diagram of another embodiment of a second gas cooling region on an electrostatic chuck and a first cooling region within a susceptor provided by an embodiment of the present invention;
fig. 7 is a schematic structural diagram of a plasma processing apparatus according to an embodiment of the present invention.
Reference numerals:
10. an electrostatic chuck; 11. a second gas cooling zone; 12. a separator; 20. a base; 21. a first cooling zone; 30. a wafer; 31. a third cooling zone;
40. a temperature measuring assembly; 41. a temperature sensor;
50. a gas supply assembly; 51. a main pipe; 52. an exhaust pipe; 53. a gas pipe; 54. a first switch control valve; 55. a second switch control valve; 56. a third switch control valve; 57. a flow restricting orifice; 58. a pressure control part;
60. a vacuum reaction chamber; 70. an ionizer.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
It should be noted that all directional indicators (such as up, down, left, right, front, and rear … …) in the embodiments of the present invention are merely used to explain the relative positional relationship, movement, etc. between the components in a particular posture (as shown in the drawings), and if the particular posture is changed, the directional indicator is changed accordingly.
It will also be understood that when an element is referred to as being "mounted" or "disposed" on another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present.
Furthermore, the description of "first," "second," etc. in this disclosure is for descriptive purposes only and is not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In addition, the technical solutions of the embodiments may be combined with each other, but it is necessary to base that the technical solutions can be realized by those skilled in the art, and when the technical solutions are contradictory or cannot be realized, the combination of the technical solutions should be considered to be absent and not within the scope of protection claimed in the present invention.
As shown in fig. 1 to 7, a wafer temperature control system according to an embodiment of the present invention includes a base 20 for carrying an electrostatic chuck 10, wherein at least two first cooling areas 21 capable of controlling temperature independently are disposed inside the base 20; the electrostatic chuck 10 comprises a bearing surface for bearing a wafer 30, and at least two second gas cooling areas 11 capable of independently controlling temperature are arranged on the bearing surface; the first cooling region 21 and the second gas cooling region 11 do not completely coincide in a direction perpendicular to the surface of the electrostatic chuck 10. In this way, the temperature of the wafer 30 is indirectly controlled by the first cooling region 21, and the temperature of the wafer 30 is directly controlled by the second gas cooling region 11, so that the purpose of quickly responding to the temperature change of the wafer 30 can be achieved. And the first cooling area 21 and the second gas cooling area 11 do not completely coincide in the direction perpendicular to the surface of the electrostatic chuck 10, that is, the purpose of regulating and controlling the temperature change of the wafer 30 is achieved through a plurality of cooling areas.
With the development of semiconductor processes, the size of the wafer 30 is larger and larger, which requires the size of the electrostatic chuck 10 supporting the wafer 30 to be larger and larger, and one of the constraints of the electrostatic chuck 10 in the processing process is that the temperature is difficult to be uniform. In order to realize uniform control of the temperature on the surface of the whole electrostatic chuck 10 or controllable setting to different temperature gradients, the electrostatic chuck 10 can be controlled in a partitioning manner and divided into a plurality of second gas cooling areas 11, meanwhile, a first cooling area 21 is arranged in the base 20, the second gas cooling areas 11 are combined with the first cooling area 21, and the plurality of first cooling areas 21 and the plurality of second gas cooling areas 11 are not completely overlapped in the direction perpendicular to the electrostatic chuck 10, so that one first cooling area 21 corresponds to two or more second gas cooling areas 11, or one second gas cooling area 21 corresponds to two or more first cooling areas 11, therefore, the number of cooling areas capable of independently controlling the temperature is increased, and the control of the temperature of the wafer 30 can be better realized. The second gas cooling area 11 effectively ensures the uniformity of the temperature of each part of the wafer 30 while the electrostatic chuck 10 is rapidly heated, thereby facilitating the progress of the plasma processing process and improving the processing qualification rate of the wafer 30.
Specifically, the shape of the second gas cooling region 11 may be any geometric shape, and fine adjustment of the shape of the second gas cooling region 11 is not difficult. The shape of the second gas cooling area 11 can be flexibly adjusted according to actual requirements in specific applications, so as to realize fine adjustment of temperature distribution control of the wafer 30. So long as the edge of the electrostatic chuck 10 is guaranteed to be rounded. Similarly, the shape of the first cooling region 21 may be any geometric shape.
The number of cooling areas capable of independently controlling temperature is greater than the sum of the number of the first cooling areas 21 and the number of the second gas cooling areas 11, so that the wafer temperature control system can form a plurality of cooling areas capable of independently controlling temperature, and accurate control of the temperature of the wafer 30 is achieved.
In one embodiment of the present invention, a plurality of isolation belts 12 are disposed on the bearing surface, the isolation belts 12 include annular isolation belts disposed circumferentially and strip-shaped isolation belts disposed radially, and the isolation belts 12 are used for spacing the bearing surface of the electrostatic chuck 10 to form the second gas cooling area 11 with independent temperature control. In another embodiment of the present invention, the isolation belt 12 is an annular isolation belt arranged circumferentially, and in a specific application, the isolation belt 12 may also be an isolation belt arranged radially. The isolation belt 12 is arranged on the top of the electrostatic chuck 10, and the roughness of the isolation belt 12 can be adjusted according to the actual gas leakage rate of the second gas cooling area 11. The flatter the surface of the separator 12, the lower the leakage rate of the gas and vice versa.
As shown in fig. 4, the plurality of second gas cooling areas 11 include a circular cooling area recessed along a central axis of the electrostatic chuck 10 and a plurality of cooling area groups radially and sequentially spaced apart from the circular cooling area along the electrostatic chuck 10, each cooling area group including at least two arc-shaped cooling areas spaced apart along a horizontal circumferential direction. By adopting the distribution mode, the temperature of different annular areas of the wafer 30 and the temperature of different azimuth angles of the same annular ring of the wafer 30 can be controlled conveniently. Of course, in a specific application, the plurality of second gas cooling areas 11 may also be a plurality of rectangular cooling areas arranged in a row and sequentially arranged from one side of the electrostatic chuck 10 toward the electrostatic chuck 10 along the radial direction of the electrostatic chuck 10; alternatively, the plurality of second gas cooling regions 11 may be a plurality of array cooling regions distributed on the electrostatic chuck 10 in rows and columns.
As shown in fig. 3, the base 20 is embedded with a plurality of cooling pipes for forming the first cooling area 21 at intervals. The cooling ducts in the base 20 are made of aluminum and are used to control the temperature of the first cooling zone 21, as an embodiment of the invention, the base 20 comprises two or more separate annular heat exchange zones arranged from the centre to the periphery. The first cooling region 21 in the susceptor 20 can control the temperature distribution in the radial direction of the electrostatic chuck 10, and indirectly control the temperature of different regions of the wafer 30. In another embodiment of the present invention, the first cooling area 21 in the base 20 may be configured as a fan-shaped independent control area or an independent control area with a combination of a ring shape and an arc shape, and the specific design may refer to the arrangement of the second gas cooling area 21 on the electrostatic chuck 10 shown in fig. 4.
As an implementation of this example, referring to fig. 5, the second gas cooling zone 11 includes a gas cooling zone group consisting of 1 first circular gas cooling zone and 4 arc-shaped gas cooling zones disposed along the periphery of the first circular gas cooling zone. In this embodiment, the distances from the center axis of the electrostatic chuck 10 to the 4 arc-shaped gas cooling areas are the same, i.e., the 4 arc-shaped gas cooling areas are located on the same annular area centered on the center of the electrostatic chuck 10. The number of the first cooling areas 21 in the susceptor 20 is 2, including 1 second circular cooling area and 1 annular cooling area disposed along the periphery of the second circular cooling area, and the second gas cooling area 11 and the first cooling area 21 group in the susceptor 20 together constitute 9 wafer 30 temperature control areas. According to fig. 5, two circles formed by solid lines are two first cooling areas 21 on the base 20, a small circle formed by broken lines and an area formed along a radial extension line of the small circle represent a second gas cooling area 21 on the electrostatic chuck 10, and since the first cooling area 11 and the second gas cooling area 21 do not completely overlap in a direction perpendicular to the bearing surface, after the electrostatic chuck 10 and the base 20 are overlapped, a third cooling area 31 capable of controlling temperature relatively independently appears, and temperature adjustment of the third cooling area 31 is achieved by cooperation of the first cooling area 21 and the second gas cooling area 11. Such as when the third cooling zone 31 needs to be lowered by 2 c, this can be achieved by lowering the first cooling zone 21 and the second gas cooling zone 11 by 1 c, respectively. To maximize the number of temperature regulated areas on the wafer 30.
As another implementation of the present example, referring to the broken line in fig. 6, the second gas cooling region 11 includes a gas cooling region group consisting of 1 first circular gas cooling region and 12 arc-shaped gas cooling regions disposed along the periphery of the first circular gas cooling region. The number of first cooling zones 21 in the susceptor 20 is 3, including 1 second circular cooling zone and 2 annular cooling zones disposed along the periphery of the second circular cooling zone, and the second gas cooling zone 11 and the first cooling zone 21 in the susceptor 20 together constitute 25 wafer 30 temperature control zones. In the embodiment shown in fig. 6, after the superposition of 13 second gas cooling zones 21 on the electrostatic chuck 10 and 3 first cooling zones 11 on the susceptor 20, 25 zones with relatively independent temperature control are formed. The number of areas where the wafer temperature control system independently adjusts the temperature is increased.
In order to more effectively control the temperature of the wafer 30 during the plasma etching process, in this embodiment, a gas with better thermal conductivity, i.e. helium, is filled in the second gas cooling region 11 between the electrostatic chuck 10 and the wafer 30, so as to realize rapid response to control the temperature change of the wafer 30. Helium is an inert gas which exists in the form of atoms rather than molecules, does not generate decomposition collision in plasma, and has good stability. In this embodiment, a cooling liquid is introduced into the cooling pipe embedded in the base 20, so as to control the temperature of the first cooling area 21. The embodiment of the invention uses the second gas cooling area 11 and the first cooling area 21 which are divided into a plurality of areas to maintain the temperature distribution of the wafer 30, can bring good temperature distribution uniformity and solves the problem of uneven etching of the wafer 30.
The wafer temperature control system further includes a temperature measuring assembly 40, a gas supply assembly 50 and a controller (not shown), wherein the gas supply assembly 50 includes a plurality of gas pipes 53 for delivering gas to the second gas cooling areas 11 and a plurality of pressure control components 58 for controlling the pressure of the gas delivered on the gas pipes 53, the temperature measuring assembly 40 includes a plurality of temperature measuring sensors 41 disposed corresponding to the second gas cooling areas 11, and each temperature measuring sensor 41 and each pressure control component 58 are connected to the controller (not shown).
The temperature measuring assembly 40 and the pressure control member 58 may be connected to the controller by wires or by wireless communication. Specifically, in the embodiment of the present invention, by disposing the temperature measuring sensors 41 in the plurality of second gas cooling areas 11, the temperature of the wafer 30 is detected in real time, and the pressure control unit 58 is controlled by a controller (not shown) to increase or decrease the pressure in the corresponding second gas cooling area 11, the higher the pressure is, the stronger the thermal conductivity of helium gas is, the more obvious the cooling effect on the wafer 30 portion corresponding to the second gas cooling area 11 is, so that the temperature of each portion of the wafer 30 is uniform, and the etching rate of the whole wafer 30 is adjusted to be uniform.
In this embodiment, the number of the gas delivery pipes 53 is the same as the number of the second gas cooling areas 11, and each gas delivery pipe 53 is used for delivering gas to each second gas cooling area 11. Of course, in a specific application, the number of the air delivery pipes 53 may be different from the number of the second air cooling areas 11, and each air delivery pipe 53 and each second air cooling area 11 may not be in a one-to-one correspondence, for example, the air may be delivered to one second air cooling area 11 through two air delivery pipes 53 at the same time.
In this embodiment, the number of the pressure control parts 58 is the same as the number of the gas delivery pipes 53, and the pressure control parts 58 are used for respectively controlling the pressure of the gas delivered on each gas delivery pipe 53 one by one. Of course, in a specific application, the number of the air delivery pipes 53 may be different from the number of the pressure control components 58, and each air delivery pipe 53 and each pressure control component 58 may not be in a one-to-one correspondence, for example, the pressure of the air delivered on two air delivery pipes 53 may be regulated and controlled by one pressure control component 58.
The temperature adjustment method of the wafer 30 is as follows: when the temperature of a certain part of the wafer 30 needs to be increased, the pressure in the second gas cooling area 11 is reduced to reduce the thermal conductivity of the gas in the second gas cooling area 11, so that the temperature of the wafer 30 is increased; when the temperature of a certain portion of the wafer 30 needs to be reduced, the pressure in the second gas cooling area 11 is increased to increase the thermal conductivity of the gas in the second gas cooling area 11, so that the temperature of the wafer 30 is reduced.
In particular applications, it is most often desirable to have a uniform surface temperature of the wafer 30, and to adjust the temperature-offset region of the wafer 30 to be close to the temperature of the other regions. But in a few cases it is also desirable to deliberately maintain a temperature differential between the different radial regions to compensate for other factors, such as the higher radius concentration that occurs at the polar edge region of the wafer 30, and the higher temperature that is required to compensate for the different processing effects at the edge of the wafer 30 than at the central region of the wafer 30.
The gas supply assembly 50 further includes a main pipe 51 connected to each gas pipe 53 for supplying gas to each gas pipe 53, and a plurality of first switch control valves 54 disposed on each gas pipe 53 for controlling on/off of each gas pipe 53, respectively.
In this embodiment, the number of the air delivery pipes 53 is the same as the number of the first switch control valves 54, and each air delivery pipe 53 is connected to a main pipe 51 for supplying air to each air delivery pipe 53 and a plurality of first switch control valves 54 respectively disposed on each air delivery pipe 53 one by one for respectively controlling on/off of each air delivery pipe 53. Of course, in a specific application, the number of the air pipes 53 may be different from the number of the first switch control valves 54, and each air pipe 53 and each first switch control valve 54 may not be in a one-to-one correspondence relationship, for example, one first switch control valve 54 may be used to control opening or closing of two air pipes 53 at the same time, or two first switch control valves 54 may be provided to control opening or closing of one air pipe 53.
The first on-off control valve 54 is a gas valve, which can be controlled manually or by a pressure control member 58. The main pipe 51 is provided with a first switch control valve 54, and the gas supply of each second gas cooling area 11 on the electrostatic chuck 10 can be independently controlled by opening or closing the first switch control valve 54, so as to achieve the purpose of independent temperature control.
The gas supply assembly 50 further includes a plurality of exhaust pipes 52 connected to the gas delivery pipes 53, the exhaust pipes 52 including a first branch pipe and a second branch pipe connected in parallel with the first branch pipe, the first branch pipe being provided with a second switch control valve 55, and the second branch pipe being provided with a flow restriction hole 57.
In this embodiment, the number of the exhaust pipes 52 is the same as the number of the gas delivery pipes 53, and the gas supply assembly 50 further includes the same number of the exhaust pipes 52 as the gas delivery pipes 53 and each of which is connected to each of the gas delivery pipes 53, however, in a specific application, the number of the gas delivery pipes 53 may also be in a non-one-to-one correspondence with the number of the exhaust pipes 52, for example, the gas in the second gas cooling area 11 may also be exhausted by providing two exhaust pipes 52.
The second on-off control valve 55 provided on the exhaust pipe 52 is for exhausting the gas in each second gas cooling region 11, and the restriction hole 57 is for keeping the second gas cooling region 11 in an equilibrium state. During operation of the wafer temperature control system, the flow restriction orifice 57 is in an open state and the second on-off control valve 55 is in a closed state, allowing gas to leak to the pump port at a leak rate, thereby stabilizing the pressure of each second gas cooling region 11 and maintaining the pressure balance of the second gas cooling region 11. When it is necessary to evacuate the gas in a certain second gas cooling area 11, the second on-off control valve 55 is opened, so that the gas in the second gas cooling area 11 can be evacuated faster.
Wherein the first on-off control valve 54 is located between the pressure control part 58 and the second gas cooling area 11, and the portion of the gas delivery pipe 53 connected to the gas discharge pipe 52 is located between the first on-off control valve 54 and the pressure control part 58. The pressure control unit 58 can control and regulate the pressure value of each second gas cooling region 11. The first on-off control valve 54 as the last on-off control device needs to be provided between the pressure control part 58 and each of the second gas cooling areas 11. In order to discharge the gas in the second gas cooling area 11 at the fastest rate, when the gas is not required to be continuously supplied into a certain second gas cooling area 11, the pressure control unit 58 adjusts the gas flowing into the gas pipe 53, and opens the second on-off control valve 55 to discharge the gas.
Wherein, the gas supply assembly 50 further comprises a third switch control valve 56 arranged on the main pipe 51 for controlling the on-off of the main pipe 51. The third on-off control valve 56 is a gas control master switch of the wafer temperature control system, and the third on-off control valve 56 is closed, and the gas supply to all the second gas cooling areas 11 is stopped. The third switch control valve 56 is designed to facilitate the operation of the whole wafer temperature control system, achieve the purpose of rapidly controlling the gas filling or suspension, and facilitate the maintenance of the subsequent equipment.
The embodiment of the invention also provides a wafer temperature control method, which comprises the following steps:
acquiring temperature detection information of a plurality of parts of the wafer 30, wherein at least two pieces of temperature detection information are part temperature detection information corresponding to different angle orientations of the same ring of the wafer 30;
analyzing and evaluating each temperature detection information;
based on each temperature detection information, pressure adjustment information for adjusting the gas input pressure of the second gas cooling region 11 on the electrostatic chuck 10 is transmitted.
According to the wafer temperature control method provided by the embodiment, the temperature distribution of the wafer 30 can be accurately regulated in real time by acquiring the temperature detection information of a plurality of parts of the wafer 30 and correspondingly regulating the pressure filled in the second gas cooling area 11, so as to control the etching rate of the wafer 30.
Wherein the step of transmitting pressure adjustment information for adjusting the gas input pressure of the second gas cooling zone 11 on the electrostatic chuck 10 based on the respective temperature detection information includes:
judging whether the temperature detection information of one part of the wafer 30 is lower or higher than the temperature of other parts according to the temperature detection information;
if the temperature is lower than the temperature of other parts of the wafer 30, the sent pressure adjustment information is used for controlling to reduce the gas input pressure of the second gas cooling area 11 corresponding to the part of the wafer;
if the temperature is higher than the temperature of the other part of the wafer 30, the sent pressure adjustment information is used for controlling and increasing the gas input pressure of the second gas cooling area 11 corresponding to the part of the wafer.
The embodiment of the invention also provides a wafer temperature controller, which comprises: the wafer temperature control method comprises the steps of a memory, a processor, and a wafer temperature control program stored on the memory and capable of running on the processor, wherein the wafer temperature control program is executed by the processor to realize the wafer temperature control method.
The embodiment of the invention also provides a computer readable storage medium, wherein the computer readable storage medium stores a wafer temperature control program, and the wafer temperature control program realizes the steps of the wafer temperature control method when being executed by a processor.
The embodiment of the invention further provides a plasma processing apparatus, which comprises a vacuum reaction chamber 60 and a wafer temperature control system, wherein the wafer temperature control system is arranged in the vacuum reaction chamber 60. In the plasma etching process, processing is required under vacuum. The wafer 30 is subjected to plasma rf from the top of the wafer 30 by an ionizer 70 disposed within the vacuum reaction chamber 60.
The foregoing description is only of the preferred embodiments of the present invention and is not intended to limit the scope of the invention, and all equivalent structural changes made by the description of the present invention and the accompanying drawings or direct/indirect application in other related technical fields are included in the scope of the invention.
Claims (13)
1. A wafer temperature control system, characterized by: comprising the following steps:
the base is used for bearing an electrostatic chuck, and at least two first cooling areas capable of independently controlling temperature are arranged in the base;
the electrostatic chuck comprises a bearing surface for bearing a wafer, wherein at least two second gas cooling areas capable of independently controlling temperature are arranged on the bearing surface;
the first cooling areas and the second gas cooling areas are not completely overlapped in the direction perpendicular to the surface of the electrostatic chuck, so that one first cooling area corresponds to at least two second gas cooling areas or one second gas cooling area corresponds to at least two first cooling areas, and the number of cooling areas capable of independently controlling temperature formed on a wafer by the wafer temperature control system is larger than the sum of the number of the first cooling areas and the number of the second gas cooling areas.
2. The wafer temperature control system of claim 1, wherein: the bearing surface is provided with a plurality of isolation belts, and each isolation belt comprises an annular isolation belt arranged in the circumferential direction and/or a strip-shaped isolation belt arranged in the radial direction.
3. The wafer temperature control system according to any one of claims 1 to 2, wherein: the wafer temperature control system further comprises:
a gas supply assembly, the gas supply assembly comprising:
a plurality of gas delivery pipes for delivering gas to each of the second gas cooling regions,
a plurality of pressure control components for regulating and controlling the pressure of the gas conveyed on each gas conveying pipe;
temperature measurement subassembly, temperature measurement subassembly includes:
the temperature measuring sensors are arranged corresponding to the second gas cooling areas;
and the controller is connected with each temperature measuring sensor and each pressure control component.
4. The wafer temperature control system of claim 3, wherein: the gas supply assembly further comprises:
a main pipe connected to each of the gas delivery pipes for supplying gas to each of the gas delivery pipes,
the first switch control valves are arranged on the air delivery pipes and used for controlling the on-off of the air delivery pipes respectively.
5. The wafer temperature control system of claim 4, wherein: the gas supply assembly further comprises: the exhaust pipes are connected with the gas transmission pipes;
the exhaust pipe includes:
a first branch pipe connected with the gas pipe, a second switch control valve arranged on the first branch pipe,
and the second branch pipe is connected with the first branch pipe in parallel, and a flow limiting hole is arranged on the second branch pipe.
6. The wafer temperature control system of claim 5, wherein: the first switch control valve is positioned between the pressure control component and the second gas cooling area, and the position where the gas transmission pipe is connected with the gas exhaust pipe is positioned between the first switch control valve and the pressure control component.
7. The wafer temperature control system of claim 4, wherein: the gas supply assembly further comprises:
and the third switch control valve is arranged on the main pipeline and used for controlling the on-off of the main pipeline.
8. The wafer temperature control system of claim 1, wherein: and a cooling pipeline is embedded in the base.
9. A wafer temperature control method applied to the wafer temperature control system according to any one of claims 1 to 8, comprising the steps of: acquiring temperature detection information of a plurality of parts of a wafer, wherein at least two pieces of temperature detection information are part temperature detection information corresponding to different angle orientations of the same ring of the wafer;
analyzing and evaluating each temperature detection information;
and sending pressure adjustment information for adjusting the gas input pressure of the second gas cooling cavity on the electrostatic chuck according to each temperature detection information.
10. The wafer temperature control method of claim 9, wherein the step of transmitting pressure adjustment information for adjusting the gas input pressure of the second gas cooling zone on the electrostatic chuck based on each of the temperature detection information comprises:
judging whether the temperature detection information of one part of the wafer is lower or higher than the temperature of other parts according to the temperature detection information;
if the temperature is lower than the temperature of other parts of the wafer, the sent pressure regulating information is used for controlling and reducing the gas input pressure of a second gas cooling area corresponding to the part of the wafer;
and if the temperature is higher than the temperature of other parts of the wafer, sending the pressure adjustment information to be used for controlling and increasing the gas input pressure of the second gas cooling cavity corresponding to the part of the wafer.
11. A wafer temperature controller, the wafer temperature controller comprising: memory, a processor and a wafer temperature control program stored on the memory and executable on the processor, which when executed by the processor, implements the steps of the wafer temperature control method according to any one of claims 9 to 10.
12. A computer readable storage medium, characterized in that the computer readable storage medium has stored thereon a wafer temperature control program, which when executed by a processor, implements the steps of the wafer temperature control method according to any one of claims 9 to 10.
13. A plasma processing apparatus, characterized in that: the plasma processing apparatus comprises a vacuum reaction chamber and the wafer temperature control system as claimed in claims 1 to 8, wherein the wafer temperature control system is arranged in the vacuum reaction chamber.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201911377075.0A CN113053775B (en) | 2019-12-27 | 2019-12-27 | Wafer temperature controller, wafer temperature controller system, wafer temperature control method and plasma processing device |
| TW109140110A TWI795692B (en) | 2019-12-27 | 2020-11-17 | Wafer temperature controller, wafer temperature control system, wafer temperature control method, computer readable recording medium, and plasma processing apparatus |
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| CN201911377075.0A CN113053775B (en) | 2019-12-27 | 2019-12-27 | Wafer temperature controller, wafer temperature controller system, wafer temperature control method and plasma processing device |
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| CN113584577A (en) * | 2021-08-04 | 2021-11-02 | 中电化合物半导体有限公司 | Silicon carbide crystallization interface control structure, growth equipment and preparation method |
| CN114121584B (en) * | 2021-11-22 | 2024-04-16 | 北京北方华创微电子装备有限公司 | Bottom electrode assembly, semiconductor processing equipment and bottom electrode condensation prevention method |
| CN115237036B (en) * | 2022-09-22 | 2023-01-10 | 之江实验室 | Full-digitalization management device for wafer-level processor system |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20030024364A (en) * | 2001-09-18 | 2003-03-26 | 주성엔지니어링(주) | Electrostatic chuck |
| CN101044601A (en) * | 2004-08-06 | 2007-09-26 | 东京毅力科创株式会社 | Method and system for substrate temperature profile control |
| CN101512307A (en) * | 2006-09-11 | 2009-08-19 | 朗姆研究公司 | In-situ wafer temperature measurement and control |
| CN104282611A (en) * | 2013-07-09 | 2015-01-14 | 中微半导体设备(上海)有限公司 | Plasma processing cavity and static chuck thereof |
| CN104377155A (en) * | 2013-08-14 | 2015-02-25 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Electrostatic chuck and plasma processing equipment |
| TW201705351A (en) * | 2015-07-28 | 2017-02-01 | 華亞科技股份有限公司 | Electrostatic chuck and temperature-control method for the same |
| CN108695222A (en) * | 2017-03-29 | 2018-10-23 | Toto株式会社 | Electrostatic chuck |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100541447B1 (en) * | 2003-07-23 | 2006-01-11 | 삼성전자주식회사 | Electrostatic chuck for wafer |
| JP5032269B2 (en) * | 2007-11-02 | 2012-09-26 | 東京エレクトロン株式会社 | Temperature adjusting apparatus and temperature adjusting method for substrate to be processed, and plasma processing apparatus including the same |
| JP5863582B2 (en) * | 2012-07-02 | 2016-02-16 | 東京エレクトロン株式会社 | Plasma processing apparatus and temperature control method |
| US10079165B2 (en) * | 2014-05-20 | 2018-09-18 | Applied Materials, Inc. | Electrostatic chuck with independent zone cooling and reduced crosstalk |
| US11848177B2 (en) * | 2018-02-23 | 2023-12-19 | Lam Research Corporation | Multi-plate electrostatic chucks with ceramic baseplates |
-
2019
- 2019-12-27 CN CN201911377075.0A patent/CN113053775B/en active Active
-
2020
- 2020-11-17 TW TW109140110A patent/TWI795692B/en active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20030024364A (en) * | 2001-09-18 | 2003-03-26 | 주성엔지니어링(주) | Electrostatic chuck |
| CN101044601A (en) * | 2004-08-06 | 2007-09-26 | 东京毅力科创株式会社 | Method and system for substrate temperature profile control |
| CN101512307A (en) * | 2006-09-11 | 2009-08-19 | 朗姆研究公司 | In-situ wafer temperature measurement and control |
| CN104282611A (en) * | 2013-07-09 | 2015-01-14 | 中微半导体设备(上海)有限公司 | Plasma processing cavity and static chuck thereof |
| CN104377155A (en) * | 2013-08-14 | 2015-02-25 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Electrostatic chuck and plasma processing equipment |
| TW201705351A (en) * | 2015-07-28 | 2017-02-01 | 華亞科技股份有限公司 | Electrostatic chuck and temperature-control method for the same |
| CN108695222A (en) * | 2017-03-29 | 2018-10-23 | Toto株式会社 | Electrostatic chuck |
Also Published As
| Publication number | Publication date |
|---|---|
| TWI795692B (en) | 2023-03-11 |
| TW202125692A (en) | 2021-07-01 |
| CN113053775A (en) | 2021-06-29 |
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