CN113037507B - Intelligent network card system with error detection function and error detection method - Google Patents
Intelligent network card system with error detection function and error detection method Download PDFInfo
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- CN113037507B CN113037507B CN202110257923.5A CN202110257923A CN113037507B CN 113037507 B CN113037507 B CN 113037507B CN 202110257923 A CN202110257923 A CN 202110257923A CN 113037507 B CN113037507 B CN 113037507B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/02—Details
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/08—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
- H04L43/0823—Errors, e.g. transmission errors
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Abstract
The invention provides an intelligent network card system with an error detection function, which comprises a processing chip and a complex programmable logic device. The processing chip includes a parity detection module, a system error detection module, a modified memory detection module and a first communication module. The complex programmable logic device comprises a receiving module, an error storage module and a second communication module. The processing chip is used for transmitting error information when detecting a parity error information, a system error information and a correction memory error information respectively. The complex programmable logic device receives and stores the error information, transmits the error information to a baseboard management controller of a host system, and clears the error information when the intelligent network card system is operated and restarted independently until the intelligent network card system can operate normally.
Description
Technical Field
The present invention relates to a system and a method, and more particularly, to an intelligent network card system with error detection function and an error detection method.
Background
The network card is a necessary device for the access network to perform communication, and is matched with a Central Processing Unit (CPU) on a mainboard to complete the Processing of each layer in the whole network protocol. With the development of science and technology, the smart card is also gradually popularized. Generally, compared to the conventional network card, the smart network card not only can transmit and receive data, but also has high performance and programmable computing capability. However, if a Parity Error (PERR), a System Error (SERR), or a modified Memory Error (Multi Bit ECC Memory Error) occurs in a System chip on the smart card, the System chip may fail, and the smart card may not operate normally. Thus, there is room for improvement in the prior art.
Disclosure of Invention
In view of the problems in the prior art, the smart card cannot operate normally due to parity error, system error or corrected memory error. The present invention is directed to an intelligent network card system with error detection function, which is used to solve at least one problem in the prior art.
The present invention provides an intelligent network card system with error detection function, which is externally connected to a host system and comprises a processing chip and a complex programmable logic device. The processing chip includes a parity detection module, a system error detection module, a modified memory detection module and a first communication module. The parity detection module is used for detecting parity error information of the processing chip. The system error detection module is used for detecting system error information of the processing chip. The modified memory detection module is used for detecting a modified memory error message of the processing chip. The first communication module is electrically connected to the parity detection module, the system error detection module and the modified memory detection module, and is used for transmitting at least one of the parity error information, the system error information and the modified memory detection module when detecting at least one of the parity error information, the system error information and the modified memory detection module.
The complex programmable logic device is electrically connected with the processing chip and comprises a receiving module, an error storage module and a second communication module. The receiving module is electrically connected to the first communication module for receiving at least one of the parity error message, the system error message and the modified memory detection module. The error storage module is electrically connected to the receiving module and includes a parity storage unit, a systematic error storage unit and a modified memory storage unit. The parity storage unit is used for storing parity error information. The system error storage unit is used for storing system error information. The modified memory storage unit is used for storing modified memory error information. The second communication module is electrically connected to the error storage module for transmitting at least one of the parity error message, the system error message and the modified memory detection module to a baseboard management controller of the host system.
After the baseboard management controller receives and stores at least one of the parity error information, the system error information and the modified memory detection module, a clearing signal is transmitted, so that after the intelligent network card system is operated and restarted independently, the error storage module clears at least one of the parity error information, the system error information and the modified memory detection module, and the intelligent network card system operates normally.
Optionally, the first communication module is electrically connected to the receiving module through a serial general input/output interface.
Optionally, the second communication module is an I2C module.
Optionally, the second communication module is electrically connected to the bmc of the host system by using a power management bus.
Based on the same inventive concept, the present invention further provides an error detection method implemented by using the above-mentioned intelligent network card system with an error detection function, and comprising the following steps: detecting at least one of the parity error message, the systematic error message and the modified memory error message by using a parity detection module, a systematic error detection module and a modified memory detection module; transmitting at least one of the parity error message, the system error message and the modified memory error message by using the first communication module; receiving at least one of the parity error message, the systematic error message and the modified memory error message by a receiving module; storing at least one of the parity error message, the system error message and the modified memory error message by using an error storage module; transmitting at least one of the parity error message, the system error message and the modified memory error message to a baseboard management controller by using a second communication module; the intelligent network card system is independently restarted; the error storage module is used to receive the erasure signal and erase at least one of the parity error message, the system error message and the modified memory detection module.
In view of the above, the intelligent network card system with error detection function and the error detection method provided by the present invention utilize the parity detection module, the system error detection module and the modified memory detection module to detect the parity error information, the system error information and the modified memory error information of the processing chip respectively, utilize the parity storage unit, the system error storage unit and the modified memory storage unit to store the parity error information, the system error information and the modified memory error information respectively, compared with the prior art, the present invention can record the parity error information, the system error information and the modified memory error information which can cause the failure of the processing chip to normally operate normally, and can transmit the error information to the substrate management controller of the host system and can be restarted independently relative to the host system, the error information is cleared by the error storage module until the parity check module, the system error detection module and the modified memory detection module do not detect the error information, and the intelligent network card system with the error detection function can normally operate.
Drawings
Fig. 1 is a block diagram of an intelligent network card system with error detection function according to an embodiment of the present invention;
fig. 2 is a flowchart of an error detection method according to an embodiment of the invention.
Reference numerals:
1-intelligent network card system with error detection function;
11-processing the chip;
111-parity detection module;
112-system error detection module;
113-a modified memory detection module;
114-a first communication module;
12-complex programmable logic devices;
121-a receiving module;
122-error storage module;
1221-parity storage unit;
1222-a system error storage unit;
1223-modifying memory storage units;
123-a second communication module;
2-a host system;
21-baseboard management controller.
Detailed Description
The following describes in more detail embodiments of the present invention with reference to the schematic drawings. Advantages and features of the present invention will become apparent from the following description and from the claims. It is to be noted that the drawings are in a very simplified form and are not to scale, which is intended merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.
Referring to fig. 1 and fig. 2, in which fig. 1 is a block diagram of an intelligent network card system with an error detection function according to an embodiment of the present invention; fig. 2 is a flowchart of an error detection method according to an embodiment of the present invention. As shown in the figure, an error detection method is implemented by using an intelligent network card system 1 with an error detection function, and includes steps S101 to S108.
The smart card system 1 with error detection function is externally connected to a host system 2, and includes a processing chip 11 and a Complex Programmable Logic Device (CPLD) 12.
The processing chip 11 includes a parity detection module 111, a system error detection module 112, a modified memory detection module 113 and a first communication module 114. The processing Chip 11 is a System on a Chip (SoC).
The complex programmable logic device 12 is electrically connected to the processing chip 11 and includes a receiving module 121, an error storage module 122 and a second communication module 123. The error storage module 122 includes a parity storage unit 1221, a systematic error storage unit 1222, and a modified memory storage unit 1223.
Step S101: the parity detection module, the system error detection module and the modified memory detection module detect whether the parity error message, the system error message or the modified memory error message.
The Parity detection module 111 is used for detecting a Parity Error (PERR) message of the processing chip 11. The System Error detection module 112 is used to detect a System Error (SERR) information of the processing chip 11. The modified Memory detection module 113 is used to detect a modified Memory Error (Multi Bit ECC Memory Error) information of the processing chip 11. The parity error message, the systematic error message, and the modified memory error message may be collectively referred to as error messages, and if any one of the parity error message, the systematic error message, and the modified memory error message is generated by the processing chip 11, the processing chip 11 may malfunction and fail to operate normally. In practice, the processing chip 11 may also generate at least two of the parity error information, the system error information, and the modified memory error information.
Therefore, the parity detection module 111, the system error detection module 112 and the modified memory detection module 113 detect whether any of the parity error message, the system error message and the modified memory error message is generated by the processing chip 11. When the parity detection module 111, the system error detection module 112 and the modified memory detection module 113 detect at least one of the parity error message, the system error message and the modified memory error message, the step S102 is proceeded.
Step S102: the first communication module is used to transmit the error message.
The first communication module 114 is electrically connected to the parity detection module 111, the system error detection module 112 and the modified memory detection module 113 for receiving and transmitting at least one of the parity error message, the system error message and the modified memory error message.
For example, when only the parity detection module 111 detects the parity error message, and the systematic error detection module 112 and the modified memory detection module 113 do not detect the systematic error message and the modified memory error message, the first communication module 114 only transmits the parity error message. When the parity detection module 111 and the systematic error detection module 112 detect the parity error message and the systematic error message, respectively, and the modified memory detection module 113 does not detect the modified memory error message, the first communication module 114 will transmit the parity error message and the systematic error message.
Step S103: the receiving module is used to receive the error message.
The receiving module 121 of the complex programmable logic device 12 is electrically connected to the first communication module 114 for receiving the error message. As described above, the first communication module 114 sends out what kind of error message, and the receiving module 121 receives what kind of error message. In practice, the first communication module 114 can be electrically connected to the receiving module 121 by using a Serial General Purpose Input/Output (SGPIO) interface, but not limited thereto.
Step S104: the error information is stored by an error storage module.
The error storage module 122 of the complex programmable logic device 12 is electrically connected to the receiving module 121 for storing the error information, and includes a parity storage unit 1221, a systematic error storage unit 1222, and a modified memory storage unit 1223. As described above, the receiving module 121 receives which error message, and the error storing module 122 stores which error message. Parity storage unit 1221 stores parity error information, systematic error storage unit 1222 stores systematic error information, and modified memory storage unit 1223 stores modified memory error information.
Step S105: the second communication module is used to transmit the error information to the baseboard management controller.
The second communication module 123 of the complex programmable logic device 12 is electrically connected to the error storage module 122 for transmitting the error information to a Baseboard Management Controller (BMC) 21 of the host system 2. As described above, the error storage module 122 stores what kind of error information, and the second communication module 123 transmits what kind of error information.
Step S106: and storing the error information by using a baseboard management controller and transmitting a clearing signal.
The bmc 21 stores the error information and knows that the smart card system 1 with error detection function is in an abnormal state, and generates and transmits a clear signal. The bmc 21 stores the error information and provides a user to observe and know the status of the smart card system 1 with error detection function and the type of error information causing the abnormal status from the host system 2.
Step S107: and the intelligent network card system is independently restarted.
Because the intelligent network card system 1 with the error detection function is externally connected to the host system 2, the intelligent network card system 1 with the error detection function is operated to be restarted independently compared with the host system 2. It should be noted that the smart card system 1 with the error detection function is restarted independently, and will not affect the host system 2, so that the host system 2 can still operate normally.
Step S108: the error storage module is used to receive the clearing signal and clear the error information.
The error information is cleared when the error storage module 122 of the complex programmable logic device 12 receives the clear signal.
The step S108 is followed by the step S101, at which the parity detection module 111, the system error detection module 112 and the modified memory detection module 113 are utilized to detect whether the processing chip 11 generates at least one of the parity error message, the system error message and the modified memory error message. If yes, the above steps S102 to S108 are performed again.
When none of the parity detection module 111, the system error detection module 112 and the modified memory detection module 113 detects that the processing chip 11 generates any of the parity error information, the system error information and the modified memory error information, it indicates that the intelligent network card system 1 with the error detection function can normally operate, and the error detection method provided by the preferred embodiment of the present invention is ended.
In summary, the present invention provides an intelligent network card system with error detection function and an error detection method thereof, which utilize a parity detection module, a system error detection module, and a modified memory detection module to detect parity error information, system error information, and modified memory error information of a processing chip respectively, and utilize a parity storage unit, a system error storage unit, and a modified memory storage unit to store parity error information, system error information, and modified memory error information respectively, compared with the prior art, the present invention can record the parity error information, system error information, and modified memory error information that can cause the processing chip to fail to operate normally, and can transmit the above error information to a substrate management controller of a host system, and can be restarted independently with respect to the host system, the error information is cleared by the error storage module until the parity check module, the system error detection module and the modified memory detection module do not detect the error information, and the intelligent network card system with the error detection function can normally operate.
In addition, if the parity detection module, the system error detection module and the modified memory detection module continuously detect the error information, the intelligent network card system with the error detection function and the error detection method provided by the preferred embodiment of the invention can repeat the steps of detection, transmission, storage, restart and the like until the parity detection module, the system error detection module and the modified memory detection module do not detect the error information, so that the intelligent network card system with the error detection function can normally operate.
The foregoing detailed description of the preferred embodiments is intended to more clearly illustrate the features and spirit of the present invention, and not to limit the scope of the invention by the preferred embodiments disclosed above. On the contrary, it is intended to cover various modifications and equivalent arrangements included within the scope of the claims.
Claims (5)
1. The utility model provides an intelligent network card system with error detection function, external in a host system which characterized in that contains:
a processing chip, comprising:
a parity detection module for detecting a parity error message of the processing chip;
a system error detection module for detecting a system error message of the processing chip;
a modified memory detection module for detecting a modified memory error message of the processing chip; and
a first communication module electrically connected to the parity detection module, the system error detection module and the modified memory detection module for transmitting at least one of the parity error message, the system error message and the modified memory error message when at least one of the parity error message, the system error message and the modified memory error message is detected; and
a complex programmable logic device electrically connected to the processing chip, comprising:
a receiving module, electrically connected to the first communication module, for receiving at least one of the parity error message, the systematic error message and the modified memory error message:
an error storage module electrically connected to the receiving module and comprising:
a parity storage unit for storing the parity error information;
a system error storage unit for storing the system error information; and
a modified memory storage unit for storing the modified memory error information; and
a second communication module electrically connected to the error storage module for transmitting at least one of the parity error message, the system error message and the modified memory error message to a baseboard management controller of the host system;
after receiving and storing at least one of the parity error information, the system error information and the modified memory error information, the baseboard management controller transmits a clearing signal, so that after the intelligent network card system is independently restarted in an operation mode, the error storage module clears at least one of the parity error information, the system error information and the modified memory error information, and the intelligent network card system operates normally.
2. The system as claimed in claim 1, wherein the first communication module is electrically connected to the receiving module via a serial general purpose input/output interface.
3. The NIC system of claim 1, wherein the second communication module is an I2C module.
4. The system of claim 1, wherein the second communication module is electrically connected to the baseboard management controller of the host system via a power management bus.
5. An error detection method implemented by the intelligent network card system with error detection function according to claim 1, comprising the steps of:
(a) detecting at least one of the parity error message, the systematic error message and the modified memory error message by the parity detection module, the systematic error detection module and the modified memory detection module;
(b) transmitting at least one of the parity error message, the system error message and the modified memory error message using the first communication module;
(c) receiving at least one of the parity error message, the system error message, and the modified memory error message by the receiving module;
(d) storing at least one of the parity error message, the system error message, and the modified memory error message using the error storage module;
(e) transmitting at least one of the parity error message, the system error message, and the modified memory error message to the baseboard management controller by using the second communication module;
(f) enabling the intelligent network card system to be independently restarted;
(g) and receiving the erasure signal by the error storage module, and erasing at least one of the parity error message, the system error message and the modified memory error message.
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