CN113030643B - Fault analysis method and system for distribution network voltage source type distributed power supply - Google Patents
Fault analysis method and system for distribution network voltage source type distributed power supply Download PDFInfo
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Abstract
The utility model provides a method and a system for analyzing the faults of a distribution network voltage source type distributed power supply, which comprises the following steps: establishing a directed graph of the power electronic converter, comparing working paths of the power electronic converter in normal work and various fault states based on the directed graph, and carrying out structural fault location on the power electronic converter; after fault location, short-circuit responses under different fault conditions are compared according to a low-voltage ride-through strategy, and terminal voltage and on-off time of short-circuit current passing through the power electronic converter in different fault periods are calculated, so that the relation between the pass-through time and the short-circuit current of the power electronic converter is obtained. The method is based on directed graph theory to carry out structural fault diagnosis on the power electronic converter, can directly compare the change conditions of characteristic electric quantities before and after a fault through the adjacency matrix, is simple and visual, has high automation degree, can achieve the purpose of fault diagnosis, and can be popularized to the fault diagnosis of other power electronic converters.
Description
Technical Field
The disclosure belongs to the technical field of power distribution network fault analysis, and particularly relates to a fault analysis method and system for a distribution network voltage source type distributed power supply.
Background
The statements in this section merely provide background information related to the present disclosure and may not necessarily constitute prior art.
Distributed power supplies of a voltage source type three-phase converter structure, including photovoltaic, fuel cell, wind energy and turbine, are widely used. The basic control modes of the power electronic converter can be divided into voltage control and current control, and the short-circuit current of the power electronic converter is mainly determined by a control strategy as a current source.
Assuming that the output power is constant before and after the power grid fault, a current source model of a current-controlled three-phase power electronic converter framework is established based on the current source model for short circuit calculation, the power electronic converter is modeled based on a sequence component framework, an equivalent power source model which is provided with reactive support by the current-controlled three-phase power electronic converter is established, negative sequence current can be injected, and the output performance of the power electronic converter is improved during the asymmetric power grid fault.
The advantage of the sequence component-based fault analysis is that the sequence network can be decomposed into a three-phase decoupled distributed network. Compared with other methods, the sequence component method can simplify the calculation of the short-circuit current and solve the coupling problem between sequence networks through parallel processing. Under asymmetric faults, the sequence component of the short circuit current may be used for protection and control of the power electronic converter.
The inventor of the present disclosure finds that the injected negative sequence component of the short-circuit current can suppress the direct-current voltage and power fluctuation of the power electronic converter, and ensure the safe operation thereof. The unified formula of positive sequence current and negative sequence current provided during the fault period of the power distribution network is used for adjusting the control method of the power electronic converter, the interaction between the sequence current of the power electronic converter and the sequence network is not considered, and a solution cannot be provided for the short-circuit current of the power distribution network with multiple power electronic converters.
Disclosure of Invention
In order to overcome the defects of the prior art, the invention provides a fault analysis method for a distribution network voltage source type distributed power supply, and the problem of mutual coupling between sequence networks of an unbalanced distribution network is solved.
In order to achieve the above object, one or more embodiments of the present disclosure provide the following technical solutions:
in a first aspect, a method for analyzing a fault of a distribution network voltage source type distributed power supply is disclosed, which includes:
establishing a directed graph of the power electronic converter, comparing working paths of the power electronic converter in normal working and various fault states based on the directed graph, and carrying out structural fault location on the power electronic converter;
after fault location, short-circuit responses under different fault conditions are compared according to a low-voltage ride-through strategy, and terminal voltage and on-off time of short-circuit current passing through the power electronic converter in different fault periods are calculated, so that the relation between the pass-through time and the short-circuit current of the power electronic converter is obtained.
According to the further technical scheme, a method for establishing a directed graph of the power electronic converter is as follows: the topological graph of the power electronic converter is converted into a directed graph, after a normal working path is found based on the directed graph, an adjacency matrix is solved according to the fault type, the working path during fault is obtained by using the adjacency matrix, and the change condition of the characteristic electric quantity is obtained after the working path is compared with the normal working path, so that the criterion of fault diagnosis is obtained.
According to the further technical scheme, after structural faults of the power electronic converter are located, an equivalent power supply model of positive and negative sequence components of the power electronic converter is established, and fault analysis is carried out.
In the further technical scheme, when fault analysis is carried out, positive and negative sequence current is injected into a sequence network in the asymmetric power grid fault and is used as a dynamic current source to control and eliminate the zero sequence component of the power grid voltage.
According to the further technical scheme, after the relation between the crossing time and the short-circuit current of the power electronic converter is obtained, the analysis of a low-voltage crossing strategy is combined, and the short-circuit current of the power distribution network of the multi-power electronic converter is determined according to the interaction between the sequence current of the power electronic converter and a sequence network and the control of the crossing time and the sequence current.
According to the further technical scheme, aiming at solving of an equivalent power supply model of positive and negative sequence components of the power electronic converter, due to the fact that a nonlinear coupling relation exists between short-circuit current and terminal voltage of the power electronic converter, the coupling relation depends on current control of the power electronic converter, and the constraint is solved by adopting an iteration method.
According to the further technical scheme, the short circuit iterative computation is carried out on the unbalanced power distribution network by modeling the basic phase assembly, and the short circuit iterative computation comprises the following steps: by adopting a superposition principle, a fault network in a short-circuit calculation schematic diagram of a multi-power electronic converter system is decomposed into a normal network and a fault network, and short-circuit current and voltage of the power electronic converter are iterated until the result meets the precision requirement.
In a second aspect, a system for analyzing faults of a distribution network voltage source type distributed power supply is disclosed, which includes:
the fault positioning module is used for establishing a directed graph of the power electronic converter, comparing the normal work of the power electronic converter with the work paths in various fault states based on the directed graph and carrying out structural fault positioning on the power electronic converter;
and after fault positioning, the analysis module compares short-circuit responses under different fault conditions according to a low-voltage ride-through strategy, calculates terminal voltage and on-off time of short-circuit current passing through the power electronic converter during different fault periods, and obtains the relation between the pass-through time and the short-circuit current of the power electronic converter.
The above one or more technical solutions have the following beneficial effects:
the method is based on directed graph theory to carry out structural fault diagnosis on the power electronic converter, can directly compare the change conditions of characteristic electric quantities before and after a fault through the adjacency matrix, is simple and visual, has high automation degree, can achieve the purpose of fault diagnosis, and can be popularized to the fault diagnosis of other power electronic converters.
The method can solve the mutual coupling problem among time sequence networks of the unbalanced power distribution network.
The short-circuit current expression of the power electronic converter is established based on sequential current control and reactive support and combined with a low-voltage ride-through strategy, and the injected negative sequence component of the short-circuit current can inhibit the direct-current voltage and power fluctuation of the power electronic converter, so that the safe and stable operation of the power electronic converter is ensured.
The method analyzes and integrates the faults of the three-phase power electronic converter controlled by the current in the power distribution network, considers the interaction between the sequence current of the power electronic converter and the sequence network, and provides a solution for the short-circuit current of the power distribution network with the multiple power electronic converters.
The method comprises the steps of modeling an unbalanced power distribution network by using a basic phase assembly, decomposing a fault network into a sequence network by adopting a sequence component method, obtaining a sequence component of short-circuit current, carrying out short-circuit iterative computation on the sequence component, and enabling the computed sequence current to be used for protection and control under asymmetric faults.
The method is suitable for balanced and unbalanced distribution networks with multiple power electronic converters, and the effectiveness of the method is verified through Matlab simulation.
Advantages of additional aspects of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.
Drawings
The accompanying drawings, which are included to provide a further understanding of the disclosure, illustrate embodiments of the disclosure and together with the description serve to explain the disclosure and are not to be construed as limiting the disclosure.
Fig. 1 is a single line diagram of a distributed asymmetric fault equipped power electronic converter as described in an embodiment of the present disclosure;
fig. 2 (a) is a composite sequence network diagram when a single-phase ground short-circuit fault occurs in a fault node of a power electronic converter according to an embodiment of the present disclosure;
fig. 2 (b) is a composite sequence network diagram when a two-phase ground short-circuit fault occurs at a fault node of a power electronic converter according to an embodiment of the present disclosure;
fig. 2 (c) is a composite sequence network diagram when a two-phase short-circuit fault occurs at a fault node of a power electronic converter according to an embodiment of the present disclosure;
fig. 3 is a single line diagram of an IEEE 34 node test feeder unbalanced distribution system according to an embodiment of the present disclosure;
fig. 4 (a) is a graph of voltage components at trip of a two-phase ground fault electronic converter at an IEEE 34 node test feeder node 836 in accordance with an embodiment of the present disclosure;
fig. 4 (b) is a voltage component diagram at trip of a single phase ground fault electronic converter of IEEE 34 node test feeder node 840 fault resistance according to an embodiment of the disclosure;
fig. 4 (c) is a voltage component diagram for a power electronic converter trip at IEEE 34 node test feeder nodes 864 and 842 according to an embodiment of the disclosure.
Detailed Description
It should be noted that the following detailed description is exemplary and is intended to provide further explanation of the disclosure. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs.
It is noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of example embodiments according to the present disclosure. As used herein, the singular forms "a", "an", and "the" are intended to include the plural forms as well, and it should be understood that when the terms "comprises" and/or "comprising" are used in this specification, they specify the presence of stated features, steps, operations, devices, components, and/or combinations thereof, unless the context clearly indicates otherwise.
The embodiments and features of the embodiments in the present disclosure may be combined with each other without conflict.
The overall concept is as follows: establishing a directed graph of the power electronic converter based on a directed graph theory, and comparing working paths of the converter in normal working and various fault states through an adjacent matrix to realize structural fault location of the power electronic converter; the graph theory is used for fault positioning and used as a criterion for fault diagnosis to obtain the short-circuit characteristic of the power electronic converter, and the short-circuit current of the power electronic converter is calculated.
Calculating the short-circuit current of the distributed power supply system with the multiple power electronic converter interfaces based on the short-circuit characteristic of the current control three-phase power electronic converter under the power grid fault;
after the power grid fault, the total harmonic distortion and the peak current of the power electronic converter are ensured to be within the limit values according to the obtained short-circuit current value, the relation between the duration time of the short-circuit current and the crossing time of the short-circuit current is studied, and the short-circuit voltage and the short-circuit current are solved by the equations (9) and (10) and also show the interaction between the short-circuit voltage and the short-circuit current.
On the basis of analyzing the structure and the control mode of the power electronic converter, a low voltage ride through strategy of reactive power support and converter capacity constraint is considered, a current source model of positive and negative sequence components is established, and an iteration method is adopted for fault analysis;
and performing iterative fault analysis on the short-circuit current and the short-circuit voltage of the power electronic converter until the result meets the precision requirement, and solving the mutual coupling problem between the time sequence networks of the unbalanced power distribution network.
Comparing short-circuit responses under different fault conditions according to a low-voltage ride-through strategy, and calculating terminal voltage and on-off time of a short-circuit current passing through the power electronic converter in different fault periods to obtain a relation between the pass-through time and the short-circuit current of the power electronic converter;
because the current of the power electronic converter has strong correlation with LVRT control, the current injection of the power electronic converter during different fault periods depends on the combination of the through power electronic converter and the control strategy thereof, the short-circuit current of a power distribution network of the power electronic converter is determined according to the relationship between the through time and the short-circuit current, and the short-circuit response under the fault condition is obtained.
And determining the short-circuit current of the power distribution network with the multiple power electronic converters by combining the analysis of the low-voltage ride-through strategy and aiming at the interaction between the sequence current and the sequence network of the power electronic converters and the control of the ride-through time and the sequence current.
Example one
The embodiment discloses a fault analysis method for a distribution network voltage source type distributed power supply, which comprises the following steps:
(1) Establishing a power electronic converter model based on the directed graph, and obtaining the working states of the converter under normal working and various fault states through the adjacent matrix to realize structural fault location of the power electronic converter;
and for a directed graph G with n vertices, its adjacency matrix M = [ M ] ij ]Is an n × n order matrix, i.e.
When a device of the converter fails, it means that the two nodes connecting the device coincide. Assuming that the device between the node i and the node j is short-circuited, the element value of the matrix of the ith row becomes r' = r i ⊕r j Wherein r is i And r j The element values of the ith row and the jth row are represented, and r' represents the element value of the ith row after short circuit; the i-th column matrix element value becomes y' = y i ⊕y j Wherein y is i And y j Indicating the values of the elements in the ith and jth columns, and y' indicating the value of the element in the ith column after shorting. Deleting jth row and jth column in original matrix and ensuring m ii ＝0,m ii The values of the elements on the diagonal of the matrix after the short-circuit fault are represented because the single node cannot form a self-loop, so the elements on the diagonal of the adjacency matrix are always 0, thereby obtaining the corresponding adjacency matrix at the time of the short-circuit fault.
And obtaining a working path when the fault occurs by utilizing the adjacency matrix, and comparing the working path with a normal working path to obtain the change condition of the characteristic electric quantity so as to obtain the criterion of fault diagnosis.
(2) Analyzing the structure and the control mode of the power electronic converter, considering a low voltage ride through strategy of reactive power support and converter capacity constraint, establishing an equivalent power supply model of positive and negative sequence components, and performing fault analysis by adopting an iteration method;
the power electronic converter can inject positive and negative sequence current into the sequence network in the asymmetric grid fault, and the positive and negative sequence current is used as a dynamic current source to control and eliminate the zero sequence component of the grid voltage.
(3) Comparing short-circuit responses under different fault conditions according to a low-voltage ride-through strategy, calculating terminal voltage and on-off time of a short-circuit current passing through the power electronic converter during different fault periods to obtain a relation between the ride-through time and the short-circuit current of the power electronic converter, determining the short-circuit current of a power distribution network of the power electronic converter according to the relation between the ride-through time and the short-circuit current, and obtaining the short-circuit response under the fault conditions.
When the short-circuit current of the power electronic converter is calculated:
comparing short-circuit responses under different fault conditions to obtain the relationship between the ride-through time and the short-circuit current of the power electronic converter;
the proposed method determines the short circuit current of a multi-power electronic converter power distribution network based on the ride-through time and sequence current control.
The power grid voltage comprises positive, negative and zero sequence components in the case of an asymmetric fault, the zero sequence current of the three-phase power electronic converter can be eliminated through appropriate control, and in the case of an asymmetric power grid fault, the power electronic converter can control and eliminate the zero sequence component of the power grid voltage by injecting positive and negative sequence currents into the sequence network as a dynamic current source.
Since a nonlinear coupling relationship exists between the short-circuit current and the terminal voltage of the power electronic converter, and the coupling relationship depends on the current control of the power electronic converter, an iterative method is adopted to solve the constraint. The power electronic converter can obtain the initial end voltage after the fault on the assumption that the power electronic converter is not connected with the network, and can obtain the sequence component of the short-circuit current according to the initial voltage and the current control of the power electronic converter and update the terminal voltage until convergence. It is noted that the power electronic converter current has a strong correlation with LVRT control.
The terminal voltage of the power electronic converter can be determined by the injected short-circuit current and a network equation, and the voltage is influenced by the injected short-circuit current, and the problem can be expressed by the interaction of the short-circuit current and the voltage of the power distribution network parameters of the power electronic converter.
When calculating many power electronic converter distribution network short-circuit current, specifically include:
the method can solve the mutual coupling problem among time sequence networks of the unbalanced power distribution network, and when the power distribution network has an asymmetric fault, negative sequence current injection from the power electronic converter is considered, and reactive power support and inverter capacity constraint are not considered;
the method is suitable for balanced and unbalanced distribution networks with multiple power electronic converters.
When the short-circuit calculation of the power distribution network with the multiple power electronic converters is realized, the short-circuit iterative calculation is carried out on the unbalanced power distribution network by modeling the basic phase assembly, and the short-circuit iterative calculation method comprises the following steps:
by adopting the superposition principle, a fault network in a short-circuit calculation schematic diagram of a multi-power electronic converter system can be decomposed into a normal network and a fault network, and the short-circuit current and the voltage of the power electronic converter are iterated until the result meets the precision requirement;
the current injection of the power electronic converter during different faults depends on the combination of the traversing power electronic converter and its control strategy and it will change the short circuit current through the protection device, which changes due to the output current connecting the power electronic converter.
A single line diagram of a distributed asymmetric fault-equipped power electronic converter according to the present disclosure is illustrated in fig. 1, comprising:
the network voltage includes positive, negative and zero sequence components in asymmetric fault, and the three-phase power electronic converter can eliminate its zero sequence current by proper control. Thus, in an asymmetric grid fault, the power electronic converter may control the cancellation of the zero sequence component of the grid voltage by injecting positive and negative sequence currents as dynamic current sources into the sequence network.
In a three-phase circuit, any group of asymmetric three vectors can be decomposed into three groups of positive sequence, negative sequence and zero sequence vectors, namely
Where α = ej120.
Because the line impedance of the grid-connected feeder of the power electronic converter is very small, the voltage components of each sequence from the fault point to the grid-connected point are almost equal everywhere. When a fault occurs at position K in FIG. 1 1 And meanwhile, the power grid side is equivalent to a fault component composite sequence network to analyze the fault characteristics.
(a) Single phase earth fault, fault component composite sequence net as shown in fig. 2 (a):
(b) BC two-phase ground fault, fault component composite sequence net is shown in fig. 2 (b):
(c) BC two-phase short circuit fault, fault component composite sequence net is shown in fig. 2 (c):
under the boundary condition of sequence voltage and sequence current, the composite sequence network when the single-phase earth fault occurs on the fault node of the power electronic converter is shown in figure 3, U f1 、U f2 、U f0 Is the terminal voltage in a power electronic converter, I f1 、I f2 、I f0 Positive and negative sequence components of the short-circuit current. Z 1m 、Z 2m 、Z 0m Is system sequence impedance, Z 1mF 、Z 2mF 、Z 0mF Is line sequence impedance, Z 1n 、Z 2n 、Z 0n Is the opposite end power system sequence impedance. The terminal voltage of the power electronic converter can be expressed as:
U - ＝U F -U + +(Z 1m +Z 1n +Z 0n )(I + +I - ) (6)
since there is a non-linear coupling relationship between the short-circuit current and the terminal voltage of the power electronic converter, which depends on the current control of the power electronic converter, it is necessary to use an iterative method to solve this constraint. The power electronic converter can obtain the initial terminal voltage after the fault, assuming that the power electronic converter is not connected with the network. From the initial voltage and current control of the power electronic converter, the sequence component of the short circuit current can be derived and substituted into (5) and (6) to update the terminal voltage until convergence.
Considering the power voltage static characteristic and the unbalance of the comprehensive load, the single-phase power flow model adopts a traditional binomial model as follows:
without loss of generality, in the node injection amount, considering that a certain node simultaneously contains various types of power injection such as a distributed power supply and a comprehensive load, the single-phase power calculation of the node i can be expressed as follows:
the positive and negative sequence current control of the ith power electronic converter is determined by alpha and beta, assuming that the terminal voltage of the sequence n power electronic converter is U + s And U - s (i =1,2, \ 8230;, n), then the sequence short-circuit current is:
in which the sequence component U of the orthogonal voltage + s And U - s Lags by 90. The terminal voltage of the power electronic converter can be determined by the injected short-circuit current and a network equation, the voltage is also influenced by the injected short-circuit current in (9) and (10), and the problem can be expressed by the interaction of the short-circuit current and the voltage of the power distribution network parameters of the power electronic converter. Considering low voltage ride through control, combining a nonlinear algebraic equation system with a network, and calculating the short-circuit current of the power distribution network by adopting the formulas (7) to (10). If the equations are non-linear and complex, the short circuit current must be solved efficiently by iteration.
It should be noted that, under an asymmetric fault, the output current of the power electronic converter contains positive-sequence and negative-sequence components, and the terminal voltage is determined by the short-circuit current injection and the network equation, as shown in equations (5) and (6), and equations (9) and (10) can be used to calculate the short-circuit current of the power electronic converter in consideration of the LVTR control.
The technical scheme of the disclosure is that a directed graph of the power electronic converter is established based on a directed graph theory, and the structural fault location of the power electronic converter is realized by comparing the normal work of the converter and the working paths under various fault states through an adjacent matrix; on the basis of the short-circuit characteristic of a current control three-phase power electronic converter under the power grid fault, a method for calculating the short-circuit current of a distributed power system with multiple power electronic converter interfaces is provided; on the basis of analyzing the structure and the control mode of the power electronic converter, a low-voltage ride through strategy of reactive power support and converter capacity constraint is considered, a current source model of positive and negative sequence components is established, and an iteration method is adopted for fault analysis; comparing short-circuit responses under different fault conditions according to a low-voltage ride-through strategy, and calculating terminal voltage and on-off time of a short-circuit current passing through the power electronic converter during different fault periods to obtain a relation between the pass-through time and the short-circuit current of the power electronic converter; and determining the short-circuit current of the power distribution network with the multiple power electronic converters by combining the analysis of the low-voltage ride-through strategy and aiming at the interaction between the sequence current and the sequence network of the power electronic converters and the control of the ride-through time and the sequence current. The method can better understand the fault response of the power electronic converter and design improved protection for stable operation of the power distribution network.
The factors considered for the above model establishment are: during asymmetric faults, the grid voltage comprises positive, negative and zero sequence components, and the three-phase power electronic converter can eliminate the zero sequence current thereof through proper control, so that only the positive sequence current and the negative sequence current are injected into a sequence network to be used as dynamic current sources, and a current source model of the positive sequence component and the negative sequence component is established for protection and control under the asymmetric faults.
In the embodiment of the disclosure, an unbalanced power distribution network is modeled by using a basic phase component, a fault network is decomposed into sequence networks by using a sequence component method, sequence components of voltage and current are written in the sequence networks, short circuit iterative computation is performed on the sequence components until the accuracy requirements are met, and the short circuit iterative computation is embodied in the formulas (5) to (10).
Simulation case
The simulation case is to improve IEEE 34 node test feeders with distributed power, as shown in fig. 3, including single-phase, two-phase and three-phase unbalanced systems with different mutual impedances between phases, where node 836 is a two-phase node of a-phase and C-phase, node 840 is a single-phase node of a-phase and C-phase, and node 840 is a single-phase node of C-phase. Power electronic converters 1,2,3 and 4 are connected to nodes 832, 888, 864 and 842, respectively, and have the same control parameters. Since the small-capacity power electronic converter is connected to the feeder of the hybrid load supply, the load current will cause an increase in the short-circuit current, especially in low-resistance ground faults. Thus, the load is represented by an equivalent impedance to verify the proposed method.
The trip time of the power electronic converter is 2.089s and fig. 4 (a) shows the detected voltage of the short circuit current when a single phase earth fault occurs at node 836. The power electronic converter 2 is then disconnected following a tripping action of the power electronic converter 1. Fig. 4 (b) shows the detected voltage of the short-circuit current when a two-phase ground fault occurs at the node 836 and a single-phase ground with a 1.5 Ω fault resistance occurs at the node 840. The power electronic converter 2 is switched off after the tripping action of the power electronic converter 1. The Matlab simulated trip time of the power electronic converter 1 is 2.132s, which is approximately equal to the analytic trip time. In view of the greater distance from the fault node, the power electronic converter 3 and the power electronic converter 4 are switched off simultaneously (analytic trip time t =2.412 s). When a ground fault occurs, zero sequence voltage and current exist in the neutral grounding system, but the short circuit current does not include a zero sequence component. After a fault, the negative sequence voltage of the power electronic converters 1,2 is less than the negative sequence voltage of the power electronic converters 3, 4.
The negative sequence currents of the power electronic converters 3 and 4 are greater than the others, while their positive sequence currents are slightly lower than the power electronic converters 1 and 2. The maximum relative error of the positive and negative sequence short-circuit currents is 4.77%. The analytic trip time (simultaneous disconnection) of the power electronic converter 3 and the power electronic converter 4 is 2.431s in fig. 4 (c). The power electronic converters 1 and 2 continue to pass through the grid fault because their terminal voltages are still higher than 1pu after the tripping action of the power electronic converters 3 and 4. When the fault clears at t =2.65s, the power electronic converter 1 and the power electronic converter 2 resume normal operation. The current injection of the power electronic converter during different faults depends on the combination of the traversing power electronic converter and its control strategy, and it will vary the short circuit current through the protection device.
Example two
It is an object of this embodiment to provide a computing device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the steps of the above method when executing the program.
EXAMPLE III
An object of the present embodiment is to provide a computer-readable storage medium.
A computer-readable storage medium, on which a computer program is stored which, when being executed by a processor, carries out the steps of the above-mentioned method.
Example four
The embodiment provides a distribution network voltage source type distributed power source's fault analysis system, includes:
the fault positioning module is used for establishing a directed graph of the power electronic converter, comparing the normal work of the power electronic converter with the work paths in various fault states based on the directed graph and carrying out structural fault positioning on the power electronic converter;
and the analysis module compares short-circuit responses under different fault conditions according to a low-voltage ride-through strategy after fault positioning, calculates terminal voltage and on-off time of short-circuit current passing through the power electronic converter in different fault periods, and obtains the relation between the pass-through time and the short-circuit current of the power electronic converter.
The steps involved in the apparatuses of the above second, third and fourth embodiments correspond to the first embodiment of the method, and the detailed description thereof can be found in the relevant description of the first embodiment. The term "computer-readable storage medium" should be taken to include a single medium or multiple media containing one or more sets of instructions; it should also be understood to include any medium that is capable of storing, encoding or carrying a set of instructions for execution by a processor and that cause the processor to perform any of the methods of the present disclosure.
It will be understood by those skilled in the art that the modules or steps of the present disclosure described above may be implemented by a general purpose computer device, and alternatively, they may be implemented by program code executable by a computing device, such that they may be stored in a storage device and executed by the computing device, or they may be separately fabricated into individual integrated circuit modules, or multiple modules or steps thereof may be fabricated into a single integrated circuit module. The present disclosure is not limited to any specific combination of hardware and software.
The above description is only a preferred embodiment of the present disclosure and is not intended to limit the present disclosure, and various modifications and changes may be made to the present disclosure by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present disclosure should be included in the protection scope of the present disclosure.
Although the embodiments of the present disclosure have been described with reference to the accompanying drawings, it is not intended to limit the scope of the present disclosure, and it should be understood by those skilled in the art that various modifications and variations can be made without inventive changes in the technical solutions of the present disclosure.
Claims (9)
1. A fault analysis method for a distribution network voltage source type distributed power supply is characterized by comprising the following steps:
establishing a directed graph of the power electronic converter, comparing working paths of the power electronic converter in normal work and various fault states based on the directed graph, and carrying out structural fault location on the power electronic converter;
after fault positioning, comparing short-circuit responses under different fault conditions according to a low-voltage ride-through strategy, and calculating terminal voltage and on-off time of short-circuit current passing through the power electronic converter during different fault periods to obtain a relation between the pass-through time and the short-circuit current of the power electronic converter;
after the relation between the crossing time and the short-circuit current of the power electronic converter is obtained, the short-circuit current of the power distribution network of the multi-power electronic converter is determined by combining the analysis of a low-voltage crossing strategy and aiming at the interaction between the sequence current of the power electronic converter and a sequence network and the control of the crossing time and the sequence current;
when a single-phase earth fault occurs at a fault node of the power electronic converter, the terminal voltage of the power electronic converter is as follows:
U - ＝U F -U + +(Z 1m +Z 1n +Z 0n )(I + +I - )；
wherein, Z 1m 、Z 2m 、Z 0m Is the system sequence impedance, Z 1n 、Z 2n 、Z 0n Is the opposite end power system sequence impedance;
according to the initial terminal voltage and circuit control of the power electronic converter, obtaining a sequence component of a short-circuit current:
wherein, U + si And U - si The terminal voltages of the ith power electronic converter, i =1,2, \8230;, n;
because the line impedance of the grid-connected feeder of the power electronic converter is very small, the voltage components of each sequence from a fault point to a grid-connected point are almost equal everywhere, and the power grid side is equivalent to a fault component composite sequence network to analyze the fault characteristics;
(a) Single-phase earth fault:
(b) BC two-phase ground fault:
(c) BC two-phase short circuit failure:
U f1 、U f2 、U f0 is the terminal voltage, I, in power electronic converters f1 、I f2 、I f0 Positive and negative sequence components of the short-circuit current;
considering the power voltage static characteristic and the unbalance of the comprehensive load, the single-phase power flow model adopts a traditional binomial model as follows:
analyzing the faults of a three-phase power electronic converter integrating current control in a power distribution network, and considering the interaction between sequence current of the power electronic converter and a sequence network;
modeling an unbalanced power distribution network by using a basic phase component, decomposing a fault network into a sequence network by adopting a sequence component method, obtaining a sequence component of short-circuit current, performing short-circuit iterative computation on the sequence component, and using the computed sequence current for protection and control under the asymmetric fault.
2. The method for analyzing the faults of the distribution network voltage source type distributed power supply as claimed in claim 1, wherein the mode for establishing the directed graph of the power electronic converter is as follows: the topological graph of the power electronic converter is converted into a directed graph, after a normal working path is found based on the directed graph, an adjacent matrix is obtained according to the fault type, the working path during fault is obtained by using the adjacent matrix, and the change condition of the characteristic electric quantity is obtained after the working path is compared with the normal working path, so that the criterion of fault diagnosis is obtained.
3. The method for analyzing the faults of the distribution network voltage source type distributed power supply as claimed in claim 1, wherein after the structural fault of the power electronic converter is located, an equivalent power supply model of positive and negative sequence components of the power electronic converter is established for fault analysis.
4. The method for analyzing the faults of the distribution network voltage source type distributed power supply as claimed in claim 1, wherein when the fault analysis is performed, positive and negative sequence currents are injected into the sequence network in the asymmetric power grid fault, and the positive and negative sequence currents are used as dynamic current sources to control and eliminate zero sequence components of the power grid voltage.
5. The method as claimed in claim 1, wherein for the solution of the equivalent power model of the positive and negative sequence components of the power electronic converter, the current control of the power electronic converter is solved by an iterative method, because a nonlinear coupling relationship exists between the short-circuit current and the terminal voltage of the power electronic converter, and the coupling relationship depends on the current control of the power electronic converter.
6. The method for analyzing the faults of the distribution network voltage source type distributed power supply as claimed in claim 1, wherein the step of modeling the unbalanced distribution network by using the basic phase assembly to perform short circuit iterative computation comprises the following steps: by adopting a superposition principle, a fault network in a short-circuit calculation schematic diagram of a multi-power electronic converter system is decomposed into a normal network and a fault network, and short-circuit current and voltage of the power electronic converter are iterated until a result meets the precision requirement.
7. A distribution network voltage source type distributed power supply fault analysis system is characterized by comprising:
the fault positioning module is used for establishing a directed graph of the power electronic converter, comparing working paths of the power electronic converter in normal work and various fault states based on the directed graph and carrying out structural fault positioning on the power electronic converter;
the analysis module is used for comparing short-circuit responses under different fault conditions according to a low-voltage ride-through strategy after fault positioning, calculating terminal voltage and on-off time of short-circuit current passing through the power electronic converter in different fault periods, and obtaining the relation between the pass-through time and the short-circuit current of the power electronic converter;
after the relation between the crossing time and the short-circuit current of the power electronic converter is obtained, the short-circuit current of the power distribution network of the multi-power electronic converter is determined by combining the analysis of a low-voltage crossing strategy and aiming at the interaction between the sequence current of the power electronic converter and a sequence network and the control of the crossing time and the sequence current;
when a single-phase earth fault occurs at a fault node of the power electronic converter, the terminal voltage of the power electronic converter is as follows:
U - ＝U F -U + +(Z 1m +Z 1n +Z 0n )(I + +I - )；
wherein Z is 1m 、Z 2m 、Z 0m Is system sequence impedance, Z 1n 、Z 2n 、Z 0n Is the opposite end power system sequence impedance;
according to the initial terminal voltage and circuit control of the power electronic converter, obtaining a sequence component of a short-circuit current:
wherein, U + si And U - si The terminal voltages of the ith power electronic converter, i =1,2, \8230;, n;
because the line impedance of the grid-connected feeder line of the power electronic converter is very small, voltage components of all sequences between a fault point and a grid-connected point are almost equal everywhere, and a power grid side is equivalent to a fault component composite sequence network to analyze fault characteristics;
(a) Single-phase earth fault:
(b) BC two-phase ground fault:
(c) BC two-phase short circuit fault:
U f1 、U f2 、U f0 is the terminal voltage in a power electronic converter, I f1 、I f2 、I f0 Positive and negative sequence components of the short-circuit current;
considering the power-voltage static characteristic and the unbalance of the comprehensive load, the single-phase power flow model adopts a traditional binomial model as follows:
analyzing the faults of a three-phase power electronic converter integrating current control in a power distribution network, and considering the interaction between the sequence current of the power electronic converter and a sequence network;
modeling an unbalanced power distribution network by using a basic phase component, decomposing a fault network into a sequence network by adopting a sequence component method, obtaining a sequence component of short-circuit current, performing short-circuit iterative computation on the sequence component, and using the computed sequence current for protection and control under the asymmetric fault.
8. A computing device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, wherein the processor implements the steps of the method of any of claims 1 to 6 when executing the program.
9. A computer-readable storage medium, on which a computer program is stored which, when being executed by a processor, is adapted to carry out the steps of the method according to any one of the preceding claims 1 to 6.
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