CN113010150A - Method, system, equipment and medium for realizing leaky bucket function - Google Patents
Method, system, equipment and medium for realizing leaky bucket function Download PDFInfo
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Abstract
The invention discloses a method, a system, equipment and a storage medium for realizing a leaky bucket function, wherein the method comprises the following steps: acquiring error leakage time and error leakage number, and determining first time required for missing one error according to the error leakage time and the error leakage number; acquiring memory frequency, determining basic time according to the memory frequency and the first time, and dividing the basic time by a plurality of different numbers in a preset range to obtain a plurality of different sub-times; carrying out format conversion on the sub-time, and determining the optimal sub-time according to the converted data; and determining the value of the register according to the optimal sub-time, and realizing the leaky bucket function according to the value of the register. The optimal sub-time is determined through the error leakage time, the error leakage number and the memory frequency, so that the bucket leakage function is realized by determining the value of the register according to the optimal sub-time, the time consumed in calculating the value of the register in the BIOS starting process is reduced, different optimal values can be set according to different parameters, and the adaptability is high.
Description
Technical Field
The present invention relates to the field of servers, and more particularly, to a method, a system, a computer device, and a readable medium for implementing a leaky bucket function.
Background
With the rapid development of the technology, the performance and the function of the server are continuously enhanced. However, as functions are increased, stability and reliability of the server may be reduced, and the stability and reliability are basic requirements of the user on the server system. The BIOS (Basic Input Output System) is a set of programs that are fixed on a ROM chip on a motherboard, and stores the most important Basic Input and Output programs of a computer, System setting information, a self-test program after power-on, and a System self-start program, and has the main functions of providing the bottommost and most direct hardware setting and control for the computer, and detecting hardware errors, and performing error processing and error reporting. The current server system has a Leaky Bucket (leak Bucket) algorithm for eliminating and shielding the memory repairable error. The leak Bucket function in the BIOS of the Intel architecture server generally configures three registers (cfg _ hi, cfg _ lo, 2nd _ limit) of the leak Bucket, and then the CPU calculates the error leakage frequency according to a certain algorithm and performs error elimination according to the error leakage frequency.
In general, the BIOS calculates the values of the three registers in the code according to the memory with different frequencies according to the error leakage frequency requirement of the client, and then writes the values into the corresponding registers. However, the error leakage frequency requirements of different clients are different, and in order to be compatible with the error leakage frequency requirements of new clients and the newly added memory frequency (because the error leakage frequency and the memory clock frequency are related), the BIOS code needs to be modified to support the error leakage frequency requirements. The mode greatly increases the workload of code development and maintenance of BIOS engineers, and the more the codes are developed and maintained, the more the function is realized, and even the situation of code addition error in development and maintenance can occur. In addition, the conventional step of configuring three registers takes a lot of time, which is not beneficial to the real-time maintenance of the server.
Disclosure of Invention
In view of this, an object of the embodiments of the present invention is to provide a method, a system, a computer device, and a computer readable storage medium for implementing a leaky bucket function, in which an optimal sub-time is determined by a leaky error time, a leaky error number, and a memory frequency, so as to determine a value of a register according to the optimal sub-time to implement the leaky bucket function, reduce time consumed in calculating the value of the register during a BIOS boot process, and enable different optimal values to be set according to different parameters, so that the adaptability is high.
Based on the above purpose, an aspect of the embodiments of the present invention provides a method for implementing a leaky bucket function, including the following steps: acquiring error leakage time and error leakage number, and determining first time required for missing one error according to the error leakage time and the error leakage number; acquiring memory frequency, determining basic time according to the memory frequency and the first time, and dividing the basic time by a plurality of different numbers in a preset range to obtain a plurality of different sub-times; carrying out format conversion on the sub-time, and determining the optimal sub-time according to the converted data; and determining the value of a register according to the optimal sub-time, and realizing the bucket leaking function according to the value of the register.
In some embodiments, said format converting said sub-time comprises: converting the sub-time into binary data.
In some embodiments, the determining the optimal sub-time from the converted data comprises: determining position numbers corresponding to the highest position, the second highest position and the third highest position of the binary data, wherein the number of the highest position, the second highest position and the third highest position is one; and comparing the position numbers corresponding to the third high order of all the sub-time, and determining the sub-time corresponding to the minimum value of the position numbers as the optimal sub-time.
In some embodiments, said determining a value of a register according to said best sub-time comprises: and assigning the divisor corresponding to the optimal sub-time to a first register, and assigning the highest bit and the second highest bit of the sub-time to a second register and a third register respectively.
In another aspect of the embodiments of the present invention, a system for implementing a leaky bucket function is provided, including: the first acquisition module is configured to acquire error leakage time and error leakage number and determine first time required for missing one error according to the error leakage time and the error leakage number; the second acquisition module is configured to acquire the memory frequency, determine a basic time according to the memory frequency and the first time, and divide the basic time by a plurality of different numbers in a preset range to obtain a plurality of different sub-times; the conversion module is configured to perform format conversion on the sub-time and determine the optimal sub-time according to the converted data; and the execution module is configured to determine the value of the register according to the optimal sub-time and realize the leaky bucket function according to the value of the register.
In some embodiments, the conversion module is configured to: converting the sub-time into binary data.
In some embodiments, the conversion module is configured to: determining position numbers corresponding to the highest position, the second highest position and the third highest position of the binary data, wherein the number of the highest position, the second highest position and the third highest position is one; and comparing the position numbers corresponding to the third high order of all the sub-time, and determining the sub-time corresponding to the minimum value of the position numbers as the optimal sub-time.
In some embodiments, the execution module is configured to: and assigning the divisor corresponding to the optimal sub-time to a first register, and assigning the highest bit and the second highest bit of the sub-time to a second register and a third register respectively.
In another aspect of the embodiments of the present invention, there is also provided a computer device, including: at least one processor; and a memory storing computer instructions executable on the processor, the instructions when executed by the processor implementing the steps of the method as above.
In a further aspect of the embodiments of the present invention, a computer-readable storage medium is also provided, in which a computer program for implementing the above method steps is stored when the computer program is executed by a processor.
The invention has the following beneficial technical effects: the optimal sub-time is determined through the error leakage time, the error leakage number and the memory frequency, so that the bucket leakage function is realized by determining the value of the register according to the optimal sub-time, the time consumed in calculating the value of the register in the BIOS starting process is reduced, different optimal values can be set according to different parameters, and the adaptability is high.
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In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other embodiments can be obtained by using the drawings without creative efforts.
FIG. 1 is a schematic diagram of an embodiment of a method for implementing a leaky bucket function according to the present invention;
FIG. 2 is a schematic diagram of a hardware structure of an embodiment of a computer device for implementing a leaky bucket function according to the present invention;
FIG. 3 is a schematic diagram of an embodiment of a computer storage medium implementing a leaky bucket function according to the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the following embodiments of the present invention are described in further detail with reference to the accompanying drawings.
It should be noted that all expressions using "first" and "second" in the embodiments of the present invention are used for distinguishing two entities with the same name but different names or different parameters, and it should be noted that "first" and "second" are merely for convenience of description and should not be construed as limitations of the embodiments of the present invention, and they are not described in any more detail in the following embodiments.
In view of the above object, a first aspect of the embodiments of the present invention proposes an embodiment of a method for implementing a leaky bucket function. Fig. 1 is a schematic diagram illustrating an embodiment of a method for implementing a leaky bucket function according to the present invention. As shown in fig. 1, the embodiment of the present invention includes the following steps:
s1, acquiring error leakage time and error leakage number, and determining first time required for missing one error according to the error leakage time and the error leakage number;
s2, acquiring a memory frequency, determining a basic time according to the memory frequency and the first time, and dividing the basic time by a plurality of different numbers in a preset range to obtain a plurality of different sub-times;
s3, converting the format of the sub-time, and determining the optimal sub-time according to the converted data; and
and S4, determining the value of the register according to the optimal sub-time, and realizing the leaky bucket function according to the value of the register.
And acquiring error leakage time and error leakage number, and determining first time required for missing one error according to the error leakage time and the error leakage number. For example, the error leakage time may be 20 seconds, the number of error leakage may be 4, and the first time required to leak one error is 20/4 ═ 5 seconds.
And acquiring the memory frequency, determining the basic time according to the memory frequency and the first time, and dividing the basic time by different numbers respectively to obtain different sub-times. For example, the formula for calculating the base time may be: basic time is the first time, memory frequency/2. The base time is then divided by several different numbers within a preset range to obtain different sub-times, e.g. several different numbers within the preset range may be e.g. 1, 2, 3, 4. For convenience of presentation, the different sub-times are denoted by T1, T2, T3, and T4.
And converting the format of the sub-time, and determining the optimal sub-time according to the converted data. For example, the base time is 24, then T1, T2, T3, and T4 are 24, 12, 8, and 6, respectively. If not, a rounding approach may be used, e.g., a base time of 74, then T1, T2, T3, and T4 may be 74, 37, 25, and 19, respectively.
In some embodiments, said format converting said sub-time comprises: converting the sub-time into binary data. Continuing with the above example, 74 is converted to 1001010 binary data, thus T1 is 1001010, T2 is 100101, T3 is 11001, and T4 is 10011.
In some embodiments, the determining the optimal sub-time from the converted data comprises: determining position numbers corresponding to the highest position, the second highest position and the third highest position of the binary data, wherein the number of the highest position, the second highest position and the third highest position is one; and comparing the position numbers corresponding to the third high order of all the sub-time, and determining the sub-time corresponding to the minimum value of the position numbers as the optimal sub-time. For example, the highest position number of the data 1 in T1 is 7, the position number of the second highest bit is 4, and the position number of the third highest bit is 2; the highest position number of the data 1 in T2 is 6, the position number of the second highest position is 3, and the position number of the third highest position is 1; the highest position number of the data 1 in T3 is 5, the position number of the second highest position is 4, and the position number of the third highest position is 1; the highest position number of the data 1 in T4 is 5, the second highest position number is 2, and the third highest position number is 1. And comparing the position numbers corresponding to the third high order of all the sub-time, and determining the sub-time corresponding to the minimum value of the position numbers as the optimal sub-time. For example, if the position number of the third highest bit in T3 is the smallest, T3 is the best sub-time, and in the above example, since the position numbers of the third highest bits of T2, T3 and T4 are the same, the position numbers of the second highest bits can be further compared, and the sub-time corresponding to the position number smallest value is selected as the best sub-time.
And determining the value of the register according to the optimal sub-time, and realizing the leaky bucket function according to the value of the register.
In some embodiments, said determining a value of a register according to said best sub-time comprises: and assigning the divisor corresponding to the optimal sub-time to a first register, and assigning the highest bit and the second highest bit of the sub-time to a second register and a third register respectively. For example, the position value of the second highest bit of T4 in the above example is the smallest, T4 may be used as the best sub-time, the divisor 4 corresponding to T4 is assigned to the 2nd _ limit register, and 5 and 2 are assigned to cfg _ hi and cfg _ lo, respectively.
It should be particularly noted that, the steps in the embodiments of the method for implementing a leaky bucket function described above can be mutually intersected, replaced, added, and deleted, so that these methods for implementing a leaky bucket function by reasonable permutation and combination conversion also belong to the scope of protection of the present invention, and the scope of protection of the present invention should not be limited to the embodiments.
In view of the above object, a second aspect of the embodiments of the present invention provides a system for implementing a leaky bucket function, including: the first acquisition module is configured to acquire error leakage time and error leakage number and determine first time required for missing one error according to the error leakage time and the error leakage number; the second acquisition module is configured to acquire the memory frequency, determine a basic time according to the memory frequency and the first time, and divide the basic time by a plurality of different numbers in a preset range to obtain a plurality of different sub-times; the conversion module is configured to perform format conversion on the sub-time and determine the optimal sub-time according to the converted data; and the execution module is configured to determine the value of the register according to the optimal sub-time and realize the leaky bucket function according to the value of the register.
In some embodiments, the conversion module is configured to: converting the sub-time into binary data.
In some embodiments, the conversion module is configured to: determining position numbers corresponding to the highest position, the second highest position and the third highest position of the binary data, wherein the number of the highest position, the second highest position and the third highest position is one; and comparing the position numbers corresponding to the third high order of all the sub-time, and determining the sub-time corresponding to the minimum value of the position numbers as the optimal sub-time.
In some embodiments, the execution module is configured to: and assigning the divisor corresponding to the optimal sub-time to a first register, and assigning the highest bit and the second highest bit of the sub-time to a second register and a third register respectively.
In view of the above object, a third aspect of the embodiments of the present invention provides a computer device, including: at least one processor; and a memory storing computer instructions executable on the processor, the instructions being executable by the processor to perform the steps of: s1, acquiring error leakage time and error leakage number, and determining first time required for missing one error according to the error leakage time and the error leakage number; s2, acquiring a memory frequency, determining a basic time according to the memory frequency and the first time, and dividing the basic time by a plurality of different numbers in a preset range to obtain a plurality of different sub-times; s3, converting the format of the sub-time, and determining the optimal sub-time according to the converted data; and S4, determining the value of the register according to the optimal sub-time, and realizing the leaky bucket function according to the value of the register.
In some embodiments, said format converting said sub-time comprises: converting the sub-time into binary data.
In some embodiments, the determining the optimal sub-time from the converted data comprises: determining position numbers corresponding to the highest position, the second highest position and the third highest position of the binary data, wherein the number of the highest position, the second highest position and the third highest position is one; and comparing the position numbers corresponding to the third high order of all the sub-time, and determining the sub-time corresponding to the minimum value of the position numbers as the optimal sub-time.
In some embodiments, said determining a value of a register according to said best sub-time comprises: and assigning the divisor corresponding to the optimal sub-time to a first register, and assigning the highest bit and the second highest bit of the sub-time to a second register and a third register respectively.
Fig. 2 is a schematic hardware structure diagram of an embodiment of the computer device for implementing the leaky bucket function according to the present invention.
Taking the apparatus shown in fig. 2 as an example, the apparatus includes a processor 201 and a memory 202, and may further include: an input device 203 and an output device 204.
The processor 201, the memory 202, the input device 203 and the output device 204 may be connected by a bus or other means, and fig. 2 illustrates the connection by a bus as an example.
The memory 202, which is a non-volatile computer-readable storage medium, may be used to store non-volatile software programs, non-volatile computer-executable programs, and modules, such as program instructions/modules corresponding to the method for implementing the leaky bucket function in the embodiments of the present application. The processor 201 executes various functional applications of the server and data processing by running the nonvolatile software programs, instructions and modules stored in the memory 202, that is, the method for implementing the leaky bucket function of the above-described method embodiment is implemented.
The memory 202 may include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program required for at least one function; the storage data area may store data created according to the use of the method of implementing the leaky bucket function, and the like. Further, the memory 202 may include high speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other non-volatile solid state storage device. In some embodiments, memory 202 may optionally include memory located remotely from processor 201, which may be connected to local modules via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The input device 203 may receive information such as a user name and a password that are input. The output device 204 may include a display device such as a display screen.
Program instructions/modules corresponding to one or more methods for implementing leaky bucket functionality are stored in the memory 202, and when executed by the processor 201, perform the method for implementing leaky bucket functionality in any of the above-described method embodiments.
Any embodiment of a computer device implementing the method for implementing a leaky bucket function as described above may achieve the same or similar effects as any of the preceding method embodiments corresponding thereto.
The invention also provides a computer readable storage medium storing a computer program which, when executed by a processor, performs the method as above.
Fig. 3 is a schematic diagram of an embodiment of a computer storage medium for implementing a leaky bucket function according to the present invention. Taking the computer storage medium as shown in fig. 3 as an example, the computer readable storage medium 3 stores a computer program 31 which, when executed by a processor, performs the method as described above.
Finally, it should be noted that, as one of ordinary skill in the art can appreciate that all or part of the processes of the methods of the above embodiments can be implemented by a computer program to instruct related hardware, and the program of the method for implementing the leaky bucket function can be stored in a computer readable storage medium, and when executed, the program can include the processes of the embodiments of the methods as described above. The storage medium of the program may be a magnetic disk, an optical disk, a Read Only Memory (ROM), a Random Access Memory (RAM), or the like. The embodiments of the computer program may achieve the same or similar effects as any of the above-described method embodiments.
The foregoing is an exemplary embodiment of the present disclosure, but it should be noted that various changes and modifications could be made herein without departing from the scope of the present disclosure as defined by the appended claims. The functions, steps and/or actions of the method claims in accordance with the disclosed embodiments described herein need not be performed in any particular order. Furthermore, although elements of the disclosed embodiments of the invention may be described or claimed in the singular, the plural is contemplated unless limitation to the singular is explicitly stated.
It should be understood that, as used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly supports the exception. It should also be understood that "and/or" as used herein is meant to include any and all possible combinations of one or more of the associated listed items.
The numbers of the embodiments disclosed in the embodiments of the present invention are merely for description, and do not represent the merits of the embodiments.
It will be understood by those skilled in the art that all or part of the steps for implementing the above embodiments may be implemented by hardware, or may be implemented by a program instructing relevant hardware, and the program may be stored in a computer-readable storage medium, and the above-mentioned storage medium may be a read-only memory, a magnetic disk or an optical disk, etc.
Those of ordinary skill in the art will understand that: the discussion of any embodiment above is meant to be exemplary only, and is not intended to intimate that the scope of the disclosure, including the claims, of embodiments of the invention is limited to these examples; within the idea of an embodiment of the invention, also technical features in the above embodiment or in different embodiments may be combined and there are many other variations of the different aspects of the embodiments of the invention as described above, which are not provided in detail for the sake of brevity. Therefore, any omissions, modifications, substitutions, improvements, and the like that may be made without departing from the spirit and principles of the embodiments of the present invention are intended to be included within the scope of the embodiments of the present invention.
Claims (10)
1. A method for realizing the function of a leaky bucket is characterized by comprising the following steps:
acquiring error leakage time and error leakage number, and determining first time required for missing one error according to the error leakage time and the error leakage number;
acquiring memory frequency, determining basic time according to the memory frequency and the first time, and dividing the basic time by a plurality of different numbers in a preset range to obtain a plurality of different sub-times;
carrying out format conversion on the sub-time, and determining the optimal sub-time according to the converted data; and
and determining the value of a register according to the optimal sub-time, and realizing the bucket leaking function according to the value of the register.
2. The method of claim 1, wherein the format converting the sub-time comprises:
converting the sub-time into binary data.
3. The method of claim 2, wherein determining the optimal sub-time from the transformed data comprises:
determining position numbers corresponding to the highest position, the second highest position and the third highest position of the binary data, wherein the number of the highest position, the second highest position and the third highest position is one; and
and comparing the position numbers corresponding to the third high order of all the sub-time, and determining the sub-time corresponding to the minimum value of the position numbers as the optimal sub-time.
4. The method of claim 3, wherein determining the value of the register according to the optimal sub-time comprises:
and assigning the divisor corresponding to the optimal sub-time to a first register, and assigning the highest bit and the second highest bit of the sub-time to a second register and a third register respectively.
5. A system for implementing a leaky bucket function, comprising:
the first acquisition module is configured to acquire error leakage time and error leakage number and determine first time required for missing one error according to the error leakage time and the error leakage number;
the second acquisition module is configured to acquire the memory frequency, determine a basic time according to the memory frequency and the first time, and divide the basic time by a plurality of different numbers in a preset range to obtain a plurality of different sub-times;
the conversion module is configured to perform format conversion on the sub-time and determine the optimal sub-time according to the converted data; and
and the execution module is configured to determine the value of the register according to the optimal sub-time and realize the leaky bucket function according to the value of the register.
6. The system of claim 5, wherein the conversion module is configured to:
converting the sub-time into binary data.
7. The system of claim 6, wherein the conversion module is configured to:
determining position numbers corresponding to the highest position, the second highest position and the third highest position of the binary data, wherein the number of the highest position, the second highest position and the third highest position is one; and
and comparing the position numbers corresponding to the third high order of all the sub-time, and determining the sub-time corresponding to the minimum value of the position numbers as the optimal sub-time.
8. The system of claim 7, wherein the execution module is configured to:
and assigning the divisor corresponding to the optimal sub-time to a first register, and assigning the highest bit and the second highest bit of the sub-time to a second register and a third register respectively.
9. A computer device, comprising:
at least one processor; and
a memory storing computer instructions executable on the processor, the instructions when executed by the processor implementing the steps of the method of any one of claims 1 to 4.
10. A computer-readable storage medium, in which a computer program is stored which, when being executed by a processor, carries out the steps of the method according to any one of claims 1 to 4.
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