CN112994450A - Capacitance voltage balance control method and system of five-level Buck/Boost converter - Google Patents

Capacitance voltage balance control method and system of five-level Buck/Boost converter Download PDF

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CN112994450A
CN112994450A CN202110223532.1A CN202110223532A CN112994450A CN 112994450 A CN112994450 A CN 112994450A CN 202110223532 A CN202110223532 A CN 202110223532A CN 112994450 A CN112994450 A CN 112994450A
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voltage
pwm signal
controller
capacitor
capacitance
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CN112994450B (en
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张宇
赵璇琦
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Huazhong University of Science and Technology
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Huazhong University of Science and Technology
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J1/00—Circuit arrangements for dc mains or dc distribution networks
    • H02J1/14—Balancing the load in a network
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection

Abstract

The invention discloses a capacitance voltage balance control method and a system of a five-level Buck/Boost converter, belonging to the field of direct current-direct current conversion, wherein the method comprises the following steps: collecting the voltage across each capacitor and the current i through the inductorL(ii) a Based on vo、iLAnd output voltage set value, calculating duty ratio D of the switching tube by using a double-ring PI controller based on vc1、vc2、vc3、vc4And an input voltage viRespectively calculating S by using a proportional controller1、S2And S7Corresponding phase shift ratio
Figure DDA0002954468000000011
And
Figure DDA0002954468000000012
based on D,
Figure DDA0002954468000000013
Figure DDA0002954468000000014
And a switching period TsRespectively generate PWM signals G1、G2、G7And G8And generate respectively with G1、G2、G7And G8Complementary PWM signal G4、G3、G6And G5And driving the switch tubes by utilizing the PWM signals corresponding to the switch tubes so as to control the voltage balance of the capacitor. The method has the advantages that the method does not need complex control, can be kept stable in a full load range, is not influenced by inductive current in dynamic performance, is particularly suitable for scenes with wide load range change, and is convenient to popularize for higher level converters.

Description

Capacitance voltage balance control method and system of five-level Buck/Boost converter
Technical Field
The invention belongs to the field of direct current-direct current conversion, and particularly relates to a capacitance voltage balance control method and system of a five-level Buck/Boost converter.
Background
The bidirectional Buck/Boost converter is widely applied to industrial production, and a multi-level Buck/Boost structure which can improve the efficiency of the converter, reduce the voltage-resistant grade of a switching tube and reduce the equipment cost in order to cope with the gradually improved voltage grade is gradually favored by technical personnel in the field. There are a variety of topologies for multilevel converters, among which flying capacitor type multilevel structures are often utilized in the Buck/Boost converter field. However, when the flying capacitor type multi-level structure is applied, the balance of capacitor voltage must be ensured, so that the voltage stress of the switching device is uniform, and the advantages of the multi-level structure are better exerted. Otherwise, uneven voltage stress causes additional losses and, in severe cases, damages the switching tube, which affects the normal operation of the device.
In order to balance the capacitor voltage, schemes relying on a self-balancing mechanism, nonlinear control, redundant switch state utilization, variable duty cycle control and the like are generally adopted in the prior art. When a self-balancing mechanism is relied on, the capacitor voltage balancing time is too long, and the self-balancing capability is limited by working conditions. The capacitance voltage balance process is difficult to model by using a nonlinear control system, and the capacitance voltage and the output voltage have a coupling relation, so that mutual influence is difficult to analyze. The use of redundant switch states complicates control and increases converter losses. The most common control method is a variable duty ratio control mode, namely, the pulse widths of different switches are adjusted, and the voltage is adjusted by using the difference between the charging and discharging of a capacitor, but the adjusting speed of the method is influenced by the inductive current, and a current feedforward control strategy is usually needed to compensate the influence of the inductive current on the adjusting speed; in addition, when the inductive current ripple is not negligible, that is, the converter is in a light load or no-load output state, the stability of the variable duty ratio control system changes, and when the system is serious, the system loses stability, and the stability based on the control mode is also affected by different carrier modes.
In a five-level Buck/Boost converter, because there are two flying capacitors and a midpoint, the change in voltage of one flying capacitor couples with the other flying capacitor, and the changes in voltage of the flying capacitor and the midpoint are also coupled with each other. The control of the capacitor voltage in this case is more difficult and complex, and therefore, in a five-level Buck/Boost converter, how to achieve reliable balancing of the capacitor voltage is a matter of concern to those skilled in the art.
Disclosure of Invention
Aiming at the defects and improvement requirements of the prior art, the invention provides a capacitance-voltage balance control method and a capacitance-voltage balance control system of a five-level Buck/Boost converter, aiming at controlling the stability of the converter to be kept unchanged in a full-load range, preventing the dynamic performance from being influenced by inductive current, having simple control process and being convenient for popularization to higher-level converters.
To achieve the above object, according to one aspect of the present invention, there is provided a capacitance-voltage balance control method for a five-level Buck/Boost converter, the five-level Buck/Boost converter including eight switching tubes S sequentially connected between positive and negative input terminals1、S2、S3、S4、S5、S6、S7And S8A capacitor C connected between the positive and negative input terminals in sequence1And C2Bridged over S1、S2Connection point and S3、S4Capacitance C between connection points3Bridged over S5、S6Connection point and S7、S8Capacitance C between connection points4A capacitor C connected between the positive and negative output terminalso，S2、S3The connection point is connected with the positive output end through an inductor L, S6、S7The connection point is connected with the negative inputThe method comprises the following steps: s1, collecting C respectivelyo、C1、C2、C3And C4Voltage v acrosso、vc1、vc2、vc3And vc4And collecting the current i flowing through LL(ii) a S2, based on vo、iLAnd output voltage set value, calculating duty ratio D of the switching tube by using a double-ring PI controller based on vc1、vc2、vc3、vc4And an input voltage viRespectively calculating S by using a proportional controller1、S2And S7Corresponding phase shift ratio
Figure BDA0002954467980000021
And
Figure BDA0002954467980000022
s3, based on the duty ratio D and the phase shift ratio
Figure BDA0002954467980000023
And a switching period TsRespectively generate PWM signals G1、G2、G7And G8And generates respective and PWM signals G1、G2、G7And G8Complementary PWM signal G4、G3、G6And G5(ii) a S4, using PWM signal G1、G2、G3、G4、G5、G6、G7And G8Respectively drive a switching tube S1、S2、S3、S4、S5、S6、S7And S8To control the capacitor voltage balance.
Further, the duty ratio D is:
iLref＝kpv(vo-voref)+kiv∫(vo-voref)dt
D＝kpi(iL-iLref)+kii∫(iL-iLref)dt
wherein iLrefGiven value of inductance current, vorefFor given value of output voltage, kpvIs the voltage controller proportionality coefficient, k, of the dual-loop PI controllerivFor the integral coefficient, k, of the voltage controller in the dual-loop PI controllerpiIs the current controller proportionality coefficient, k, of the dual-loop PI controlleriiAnd the integral coefficient of a current controller in the double-loop PI controller.
Further, the phase shift ratio
Figure BDA0002954467980000031
And
Figure BDA0002954467980000032
respectively as follows:
Figure BDA0002954467980000033
Figure BDA0002954467980000034
Figure BDA0002954467980000035
wherein k ispc1Is a first scale factor, kpc2Is the second proportionality coefficient, kpc3Is the third scaling factor.
Further, the phase shift ratio
Figure BDA0002954467980000036
And
Figure BDA0002954467980000037
respectively as follows:
Figure BDA0002954467980000038
Figure BDA0002954467980000039
Figure BDA00029544679800000310
wherein k ispc1Is a first scale factor, kpc2Is the second proportionality coefficient, kpc3Is the third scaling factor.
Further, the S3 includes: s31, converting the PWM signal G1、G2、G7And G8Is set to DTs(ii) a S32, setting a reference starting time and converting the PWM signal G1、G2、G7And G8Are shifted with respect to the reference start time, respectively
Figure BDA00029544679800000311
Figure BDA0002954467980000041
To generate a PWM signal G1、G2、G7And G8(ii) a S33, generating respective PWM signals G1、G2、G7And G8Complementary PWM signal G4、G3、G6And G5。
Further, the S32 includes: initial carrier respective translation
Figure BDA0002954467980000042
Figure BDA0002954467980000043
And
Figure BDA0002954467980000044
then comparing with the duty ratio D to generate a PWM signal G1、G2、G7And G8。
Further, the S32 includes: initialRespectively translating after comparing the carrier with the duty ratio D
Figure BDA0002954467980000045
And
Figure BDA0002954467980000046
to generate a PWM signal G1、G2、G7And G8。
Further, the S33 includes: PWM signal G1、G2、G7And G8Are respectively reversed to generate PWM signal G4、G3、G6And G5。
According to another aspect of the invention, a capacitance-voltage balance control system of a five-level Buck/Boost converter is provided, wherein the five-level Buck/Boost converter comprises eight switching tubes S which are sequentially connected between positive and negative input ends1、S2、S3、S4、S5、S6、S7And S8A capacitor C connected between the positive and negative input terminals in sequence1And C2Bridged over S1、S2Connection point and S3、S4Capacitance C between connection points3Bridged over S5、S6Connection point and S7、S8Capacitance C between connection points4A capacitor C connected between the positive and negative output terminalso，S2、S3The connection point is connected with the positive output end through an inductor L, S6、S7The negative output is connected to the tie point, and the system includes: a sampling module for respectively collecting Co、C1、C2、C3And C4Voltage v acrosso、vc1、vc2、vc3And vc4And collecting the current i flowing through LL(ii) a An output voltage closed-loop control module for v-basedo、iLAnd outputting a given voltage value, and calculating the duty ratio D of the switching tube by using a double-ring PI controller; a capacitor voltage phase shift control module for v-basedc1、vc2、vc3、vc4And an input voltage viRespectively calculating S by using a proportional controller1、S2And S7Corresponding phase shift ratio
Figure BDA0002954467980000047
And
Figure BDA0002954467980000048
a PWM signal generation and drive module for generating and driving a PWM signal based on the duty ratio D,
Figure BDA0002954467980000049
Figure BDA00029544679800000410
And a switching period TsRespectively generate PWM signals G1、G2、G7And G8And generates respective and PWM signals G1、G2、G7And G8Complementary PWM signal G4、G3、G6And G5Using PWM signal G1、G2、G3、G4、G5、G6、G7And G8Respectively drive a switching tube S1、S2、S3、S4、S5、S6、S7And S8To control the capacitor voltage balance.
Generally, by the above technical solution conceived by the present invention, the following beneficial effects can be obtained:
(1) the stability of the converter can be controlled to be kept unchanged in a full-load range without complex control, the dynamic performance is not influenced by inductive current, and the control process is simple, effective and easy to realize; the converter has flying capacitors and a midpoint, and the control method can be more conveniently expanded into converters with higher levels; the adjusting capability of the control method is not influenced by the carrier wave, and the control method has stronger adaptability.
(2) Can ensure that the capacitor voltage is maintained at a balance value C without complex control1And C2The balance value of the capacitor voltage is outputInput voltage v i1/2, C of3And C4The balance value of the capacitor voltage is input voltage vi1/4, ensuring that the voltage stress of each switching tube is maintained at the input voltage v i1/4, the voltage stress of the device is reduced, and the safety of the equipment is ensured.
Drawings
Fig. 1 is a flowchart of a capacitance-voltage balance control method of a five-level Buck/Boost converter according to an embodiment of the present invention;
fig. 2 is a block diagram of a capacitance-voltage balance control system of a five-level Buck/Boost converter according to an embodiment of the present invention;
FIG. 3 is a block diagram of an output voltage closed loop control module of the system of FIG. 2;
FIG. 4A is a block diagram of a capacitor voltage phase shift control module in the system of FIG. 2 according to an embodiment of the present invention;
FIG. 4B is a block diagram of a capacitor voltage phase shift control module in the system of FIG. 2 according to another embodiment of the present invention;
FIG. 5A is a block diagram of a PWM signal generation and driving module of the system of FIG. 2 according to an embodiment of the present invention;
FIG. 5B is a block diagram of a PWM signal generation and driving module of the system of FIG. 2 according to another embodiment of the present invention;
FIG. 6 is a schematic diagram of a flying capacitor voltage balance of a five-level Buck/Boost converter;
FIG. 7A shows a five-level Buck/Boost converter C3A capacitance voltage balance waveform diagram;
FIG. 7B shows a five-level Buck/Boost converter C4A capacitance voltage balance waveform diagram;
FIG. 7C is a diagram of a voltage balance waveform of a midpoint capacitor of a five-level Buck/Boost converter;
FIG. 7D is a waveform diagram illustrating the voltage balance of the midpoint capacitor of the five-level Buck/Boost converter without considering decoupling;
FIG. 8A is a diagram illustrating the balancing of flying capacitor and midpoint voltage during a sudden load decrease;
FIG. 8B is a diagram illustrating the balancing of flying capacitor and midpoint voltage during a sudden load;
FIG. 9 is a diagram of the balancing of flying capacitor and midpoint voltage before and after the addition of a control strategy.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention. In addition, the technical features involved in the embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
In the present application, the terms "first," "second," and the like (if any) in the description and the drawings are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order.
Fig. 1 is a flowchart of a capacitance-voltage balance control method (hereinafter, referred to as a control method) of a five-level Buck/Boost converter according to an embodiment of the present invention. Referring to fig. 1, the control method in the present embodiment is described in detail with reference to fig. 2 to 9.
Referring to fig. 2 and 6, the five-level Buck/Boost converter includes eight switching tubes S sequentially connected between positive and negative input terminals1、S2、S3、S4、S5、S6、S7And S8The period of each switch tube is TsA capacitor C connected between the positive and negative input terminals in sequence1And C2Bridged over S1、S2Connection point and S3、S4Capacitance C between connection points3Bridged over S5、S6Connection point and S7、S8Capacitance C between connection points4An output filter capacitor C connected between the positive and negative output terminalso，S2、S3The connection point is connected with the positive output end through a filter inductor L, S6、S7The connection point is connected with a negative output end and a capacitor C1And C2Is a midpoint, S4、S5Is connected to the midpoint. In the figure, plus and minus marked on the input side respectively represent the positive of the input DC busAn anode and a cathode; the plus and minus marked on the output side respectively represent the anode and the cathode of the output direct current bus; capacitive up + represents the capacitive high side. The control method includes operation S1-operation S4.
Operation S1, collecting C respectivelyo、C1、C2、C3And C4Voltage v acrosso、vc1、vc2、vc3And vc4And collecting the current i flowing through LL。
In this embodiment, the execution process of each operation will be described with reference to a capacitance-voltage balance control system (hereinafter, simply referred to as a control system) of the five-level Buck/Boost converter shown in fig. 2.
In operation S1, the sampling module in the control system collects the output voltage v through the sensoroInductor current iLAnd four capacitor voltages vc1、vc2、vc3And vc4And collecting the v obtainedoAnd iLSending the acquired v to an output voltage closed-loop control module in a control systemc1、vc2、vc3And vc4And sending the voltage to a capacitor voltage phase-shifting control module in the control system.
Operation S2, based on vo、iLAnd output voltage set value, calculating duty ratio D of the switching tube by using a double-ring PI controller based on vc1、vc2、vc3、vc4And an input voltage viRespectively calculating S by using a proportional controller1、S2And S7Corresponding phase shift ratio
Figure BDA0002954467980000071
And
Figure BDA0002954467980000072
the output voltage closed-loop control module obtains v according to the sampling moduleo、iLAnd calculating the duty ratio D of the switching tube, and sending the duty ratio D to a PWM signal generation module in the control system.
Referring to FIG. 3, output voltage closed loop controlThe module firstly outputs a given value v of voltageorefAnd the output voltage voSubtracting, sending the subtracted value to a voltage controller, wherein the voltage controller is a PI controller, and outputting an inductive current given value i after calculationLref：
iLref＝kpv(vo-voref)+kiv∫(vo-voref)dt
Setting the inductance current to a given value iLrefAnd iLSubtracting, and sending the subtracted value to a current controller, wherein the current controller is also a PI controller, and outputs a duty ratio D after calculation, so that the output voltage and the current are controlled to be stable, and the duty ratio D is as follows:
D＝kpi(iL-iLref)+kii∫(iL-iLref)dt
wherein k ispvIs the proportional coefficient, k, of the voltage controller in a dual-loop PI controllerivIs the integral coefficient, k, of the voltage controller in a dual-loop PI controllerpiIs the proportional coefficient, k, of the current controller in a dual-loop PI controlleriiIs the current controller integral coefficient in the double loop PI controller.
The capacitor voltage phase shift control module obtains v according to the sampling modulec1、vc2、vc3、vc4Calculating the phase shift ratio
Figure BDA0002954467980000081
And
Figure BDA0002954467980000082
and will shift the phase ratio
Figure BDA0002954467980000083
And
Figure BDA0002954467980000084
and sending the signal to a PWM signal generation module in the control system.
In normal operation, the capacitor C1The voltage across the terminals should be kept at vi/2, capacitance C3、C4The voltage across the terminals should be kept at vi/4. Therefore, the present embodiment provides two implementation manners of the capacitor voltage phase shift control module to ensure the stability of each capacitor voltage.
Referring to fig. 4A, a first implementation of a capacitive voltage phase shift control module is shown, which does not consider decoupling issues. The capacitor voltage vC1And the capacitor voltage vC2The subtracted result is input into the capacitance voltage controller 2, and the capacitance voltage controller 2 outputs a phase shift ratio
Figure BDA0002954467980000085
The capacitor voltage vC3And viThe result of the subtraction of/4 is input to the capacitance voltage controller 3, and the capacitance voltage controller 3 outputs a phase shift ratio
Figure BDA0002954467980000086
The capacitor voltage vC4And viThe result of the subtraction of/4 is input into the capacitance voltage controller 1, and the capacitance voltage controller 1 outputs the phase shift ratio
Figure BDA0002954467980000087
Wherein, the capacitor voltage controller 1, the capacitor voltage controller 2 and the capacitor voltage controller 3 are proportional controllers, and the proportional coefficients are kpc1、kpc2And kpc3Ratio of phase shift
Figure BDA0002954467980000088
And
Figure BDA0002954467980000089
respectively as follows:
Figure BDA00029544679800000810
Figure BDA00029544679800000811
Figure BDA00029544679800000812
referring to FIG. 4B, a second implementation of the capacitor voltage phase shift control module is shown. The capacitor voltage vC1And the capacitor voltage vC2The subtracted result is input into the capacitance voltage controller 2, and the capacitance voltage controller 2 outputs a phase shift ratio
Figure BDA00029544679800000813
The capacitor voltage vC3And viThe result of the subtraction of/4 is inputted to the capacitance voltage controller 3, and then is compared with the phase shift after passing through the capacitance voltage controller 3
Figure BDA00029544679800000814
Adding to obtain a phase shift ratio
Figure BDA0002954467980000091
The capacitor voltage vC4And viThe result of the subtraction of/4 is input into the capacitance voltage controller 1, and passes through the capacitance voltage controller 1 to be compared with the phase shift
Figure BDA0002954467980000092
Subtracting to obtain a phase shift ratio
Figure BDA0002954467980000093
Wherein, the capacitor voltage controller 1, the capacitor voltage controller 2 and the capacitor voltage controller 3 are proportional controllers, and the proportional coefficients are kpc1、kpc2And kpc3Ratio of phase shift
Figure BDA0002954467980000094
And
Figure BDA0002954467980000095
respectively as follows:
Figure BDA0002954467980000096
Figure BDA0002954467980000097
Figure BDA0002954467980000098
operation S3, based on duty ratio D, phase shift ratio
Figure BDA0002954467980000099
And a switching period TsRespectively generate PWM signals G1、G2、G7And G8And generates respective and PWM signals G1、G2、G7And G8Complementary PWM signal G4、G3、G6And G5。
Operations S3-S4 may be implemented by the PWM signal generation and driving module. Operation S3 includes sub-operation S31-sub-operation S33, according to an embodiment of the invention.
In sub-operation S31, the PWM signal G is applied1、G2、G7And G8Is set to DTs. Wherein, the PWM signal G1、G2、G7And G8Are respectively used for driving a switch tube S1、S2、S7And S8。
In sub-operation S32, a reference start time is set, and the PWM signal G is applied1、G2、G7And G8Are shifted with respect to the reference start time, respectively
Figure BDA00029544679800000910
Figure BDA00029544679800000911
And
Figure BDA00029544679800000912
to generate a PWM signal G1、G2、G7And G8。
In sub-operation S33, PWM signals G are generated1、G2、G7And G8Complementary PWM signal G4、G3、G6And G5。
In this embodiment, two implementation manners of the PWM signal generating and driving module are provided to generate corresponding PWM signals to drive the switching tube.
Referring to fig. 5A, a first implementation of the PWM signal generation and driving module is shown. Initial carrier respective translation
Figure BDA00029544679800000913
And
Figure BDA00029544679800000914
then comparing with duty ratio D to generate PWM signal G1、G2、G7And G8。
Specifically, initial carrier translation
Figure BDA0002954467980000101
Then compares the duty ratio D to generate a PWM signal G1And sent to the switch tube S1(ii) a PWM signal G1After reversing to generate PWM signal G4And sent to the switch tube S4. Initial carrier translation
Figure BDA0002954467980000102
Then compares the duty ratio D to generate a PWM signal G2And sent to the switch tube S2(ii) a PWM signal G2After reversing to generate PWM signal G3And sent to the switch tube S3. Initial carrier translation
Figure BDA0002954467980000103
Then compares the duty ratio D to generate a PWM signal G7And sent to the switch tube S7(ii) a PWM signal G7After reversing to generate PWM signal G6And sent to the switch tube S6. Initial carrier translation
Figure BDA0002954467980000104
Then compares the duty ratio D to generate a PWM signal G8And sent to the switch tube S8(ii) a PWM signal G8After reversing to generate PWM signal G5And sent to the switch tube S5。
Referring to fig. 5B, a second implementation of the PWM signal generation and driving module is shown. The initial carrier wave is compared with the duty ratio D and then respectively translated
Figure BDA0002954467980000105
And
Figure BDA0002954467980000106
to generate a PWM signal G1、G2、G7And G8。
Specifically, the initial carrier is translated after being compared with the duty ratio D
Figure BDA0002954467980000107
Generating a PWM signal G1And sent to the switch tube S1(ii) a PWM signal G1After reversing to generate PWM signal G4And sent to the switch tube S4. Translating after comparing initial carrier with duty ratio D
Figure BDA0002954467980000108
Generating a PWM signal G2And sent to the switch tube S2(ii) a PWM signal G2After reversing to generate PWM signal G3And sent to the switch tube S3. Translating after comparing initial carrier with duty ratio D
Figure BDA0002954467980000109
Generating a PWM signal G7And sent to the switch tube S7(ii) a PWM signal G7After reversing to generate PWM signal G6And sent to the switch tube S6. Translating after comparing initial carrier with duty ratio D
Figure BDA00029544679800001010
Generating a PWM signal G8And sent to the switch tube S8(ii) a PWM signal G8After reversing to generate PWM signal G5And sent to the switch tube S5。
Operation S4, using the PWM signal G1、G2、G3、G4、G5、G6、G7And G8Respectively drive a switching tube S1、S2、S3、S4、S5、S6、S7And S8To control the capacitor voltage balance.
Referring to FIG. 6, the current flows through the capacitor C1、C2、C3And C4Are respectively represented as iC1(t)、iC2(t)、iC3(t) and iC4(t); flow through the switch tube S1、S2、S3、...、S8Are respectively represented as iS1(t)、iS2(t)、iS3(t)、...、iS8(t); input current is denoted as i1(t) the inductance current is represented by iL(t) midpoint current is represented as in(t) of (d). The change in capacitance voltage over a period, capacitance C, can then be calculated1、C2、C3And C4Respectively, is represented as Δ vC1(t)、ΔvC2(t)、ΔvC3(t) and Δ vC4(t), let us assume the capacitance C1And C2The capacitance values of (a) are the same, then:
Figure BDA0002954467980000111
Figure BDA0002954467980000112
Figure BDA0002954467980000113
Figure BDA0002954467980000114
due to coupling between the adjustment processes of the capacitor voltage, i.e. by varying iS8(t) and iS1(t) adjusting the capacitance C1And a capacitor C2When the voltage changes, the capacitance C3And a capacitor C4As well as being affected. Therefore, two implementation methods are designed for the capacitor voltage phase-shift control module. The first method does not take the decoupling problem into account, as shown in FIG. 4A, but it also affects the flying capacitor voltage when adjusting the midpoint potential. To improve this problem, in the block diagram of the capacitor voltage phase shift control module shown in FIG. 4B, the ratio of the output result of the capacitor voltage controller 1 to the phase shift is
Figure BDA0002954467980000115
Are subtracted to obtain
Figure BDA0002954467980000116
The ratio of the result output from the capacitor voltage controller 3 to the phase shift
Figure BDA0002954467980000117
Are added to obtain
Figure BDA0002954467980000118
I.e. in the pair of switching tubes S1While operating, the switch tube S2And S7And synchronously compensating.
The value range of the duty ratio D is 0 to 1, and the value of D is different in the four ranges of D being more than 0 and less than or equal to 0.25, D being more than 0.25 and less than or equal to 0.5, D being more than 0.5 and less than or equal to 0.75 and D being more than 0.75 and less than or equal to 1. Taking 0 < D ≦ 0.25 as an example, FIGS. 7A-7D show the adjustment process of phase shift control, and since the carrier in FIG. 5 is phase shifted, the effect of the adjustment mode on the transformer midpoint and flying capacitance is independent of the carrier mode, i.e., the changes caused by the carrier and the sawtooth carrier to the transformer are identical.
FIGS. 7A-7AIn D, G1、G2、G7、G8Waveform representation PWM signal generation and driving module sends to switching tube S1、S2、S7、S8The PWM signal of (1); i.e. iC1(t)、iC2(t)、iC3(t)、iC4(t) represents a flow through C1、C2、C3、C4The current of (a); i.e. in(t) represents midpoint current; i.e. iL(t) represents an inductor current; the dashed line represents the phase shifted waveform.
Referring to FIG. 7A, a capacitor C is shown3Voltage balance waveform of (2) when the capacitor C3The voltage rising exceeding a given value viAt the time of/4, adding S2Switch signal forward shift
Figure BDA0002954467980000121
At S2At turn-on, the current rises by Δ iL：
Figure BDA0002954467980000122
At S2During the turn-on period, the current after phase shift is always increased by delta i compared with the original current at the same timeLAt this time, the capacitance C3In a discharge state, C3Increase of discharge current Δ iL. Due to phase-shift control, S2Shutdown signal advance
Figure BDA0002954467980000123
Thus at S2After turn-off, the inductor current decreases by Δ iLAnd at S7And the original state is restored before the power-on. Only the capacitance C is changed in the phase shift control mode3The voltage has no influence on the midpoint voltage and other capacitor voltages. During this period, the capacitance C3Voltage change Δ vC3Comprises the following steps:
Figure BDA0002954467980000124
referring to FIG. 7B, there is shownCapacitor C4Voltage balance waveform of (2) when the capacitor C4The voltage rising exceeding a given value viAt the time of/4, adding S7Switch signal forward shift
Figure BDA0002954467980000125
At S7At turn-on, the current rises by Δ iL：
Figure BDA0002954467980000126
At S7During the on period, the capacitance C4In a discharge state, C4Increase of discharge current Δ iL. At S7After turn-off, the inductor current decreases by Δ iLAnd at S8And the original state is restored before the power-on. During this period, the capacitance C4Voltage change Δ vC4Comprises the following steps:
Figure BDA0002954467980000127
referring to FIG. 7C, a capacitor C is shown2Voltage balance waveform of (2), when C2Voltage drop exceeding given value viAt the time of/2, adding S1Switch signal forward shift
Figure BDA0002954467980000128
Will S8Switch signal back shift
Figure BDA0002954467980000129
According to a decoupling operation, S2Synchronous forward shift of switching signals
Figure BDA00029544679800001210
S7Synchronous backward shift of switching signals
Figure BDA00029544679800001211
If the capacitance value C is1＝C2＝C3＝C4Order the value above
Figure BDA00029544679800001212
According to the above analysis, the midpoint voltage, i.e. the capacitance C, is measured during one control cycle2The voltage is increased:
Figure BDA00029544679800001213
although C is caused by the change of the inductor current during the adjustment3At S1Increased Q during the on-period more than before phase shift1Quantity of charge, due to decoupling operation, S2The switching signal is synchronously advanced to make C3At S2Releasing more Q during the on-period than before phase shift2A number of charges, and Q1＝Q2Thus at a TsIn the period, the capacitance C3Increased net charge of 0, capacitance C3The voltage is unchanged. The capacitance C can be calculated in the same way4The voltage is unchanged, so that decoupling between the midpoint potential and the flying capacitor voltage is realized.
Referring to FIG. 7D, a five level Buck/Boost converter C is shown without consideration of decoupling junctions2Capacitance voltage (midpoint voltage) balance waveform diagram. Similar to the case shown in FIG. 7C, the midpoint voltage (i.e., the capacitance C) is set during one control period2Voltage) increases:
Figure BDA0002954467980000131
but the flying capacitor voltage is influenced by the midpoint voltage regulation process, and in one control cycle, the capacitor C3And C4The voltages are changed respectively:
Figure BDA0002954467980000132
Figure BDA0002954467980000133
therefore, when the decoupling link is not considered, the flying capacitor voltage can be influenced by the midpoint voltage adjusting process, but the capacitor voltage control system can still play a role in adjusting.
In order to verify the practicability of the control method in the embodiment, a prototype based on the control method is established based on the control mode of the Buck/Boost converter shown in fig. 2, and experimental verification under the rated power of 1560W is completed, wherein the output current range is 0-5.6A.
Fig. 8A shows a diagram of a balancing process of the flying capacitor and the midpoint voltage during sudden load reduction, where before switching the load, the inductive current is 5.6A, after cutting off the load, the inductive current is 0A, the adjustment process time is less than 10ms, the midpoint voltage is always 160V before and after switching the load, the flying capacitor voltage is always 80V, and the deviation between the flying capacitor and the midpoint voltage in the adjustment process is not more than ± 5V.
Fig. 8B shows a diagram of a balancing process of the flying capacitor and the midpoint voltage during sudden load application, where before load switching, the inductive current is 0A, after load application, the inductive current is 5.6A, the adjustment process time is less than 10ms, the midpoint voltage is always 160V before and after load switching, the flying capacitor voltage is always 80V, and the deviation between the flying capacitor and the midpoint voltage during adjustment is no more than ± 5V. The results shown in fig. 8A-8B demonstrate excellent control performance of the flying capacitor and midpoint voltage during steady state and transient states when this control method is employed.
FIG. 9 shows the balancing of the flying capacitor and midpoint voltage after the control strategy is added, at an output voltage of 280V and an output current of 5.6A. Before adding the control strategy, the midpoint voltage is shifted by 10V, and the voltages of the capacitors C3 and C4 are shifted by 30V; after the control strategy is added, the midpoint voltage reaches the balance within 80ms, and the capacitor voltage reaches the balance within 50 ms.
Experimental results show that the principle prototype built on the basis of the method can realize the stability of output voltage and flying capacitor voltage in a full-load range by adopting the control method, and the effectiveness of the control method is verified.
It will be understood by those skilled in the art that the foregoing is only a preferred embodiment of the present invention, and is not intended to limit the invention, and that any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the scope of the present invention.

Claims (9)

1. A capacitance voltage balance control method of a five-level Buck/Boost converter comprises eight switching tubes S sequentially connected between a positive input end and a negative input end1、S2、S3、S4、S5、S6、S7And S8A capacitor C connected between the positive and negative input terminals in sequence1And C2Bridged over S1、S2Connection point and S3、S4Capacitance C between connection points3Bridged over S5、S6Connection point and S7、S8Capacitance C between connection points4A capacitor C connected between the positive and negative output terminalso，S2、S3The connection point is connected with the positive output end through an inductor L, S6、S7The connection point is connected to the negative output terminal, wherein the method comprises:
s1, collecting C respectivelyo、C1、C2、C3And C4Voltage v acrosso、vc1、vc2、vc3And vc4And collecting the current i flowing through LL；
S2, based on vo、iLAnd output voltage set value, calculating duty ratio D of the switching tube by using a double-ring PI controller based on vc1、vc2、vc3、vc4And an input voltage viRespectively calculating S by using a proportional controller1、S2And S7Corresponding phase shift ratio
Figure FDA0002954467970000011
And
Figure FDA0002954467970000012
s3, based on the duty ratio D and the phase shift ratio
Figure FDA0002954467970000013
And a switching period TsRespectively generate PWM signals G1、G2、G7And G8And generates respective and PWM signals G1、G2、G7And G8Complementary PWM signal G4、G3、G6And G5；
S4, using PWM signal G1、G2、G3、G4、G5、G6、G7And G8Respectively drive a switching tube S1、S2、S3、S4、S5、S6、S7And S8To control the capacitor voltage balance.
2. The method of claim 1, wherein the duty cycle D is:
iLref＝kpv(vo-voref)+kiv∫(vo-voref)dt
D＝kpi(iL-iLref)+kii∫(iL-iLref)dt
wherein iLrefGiven value of inductance current, vorefFor given value of output voltage, kpvIs the voltage controller proportionality coefficient, k, of the dual-loop PI controllerivFor the integral coefficient, k, of the voltage controller in the dual-loop PI controllerpiIs the current controller proportionality coefficient, k, of the dual-loop PI controlleriiAnd the integral coefficient of a current controller in the double-loop PI controller.
3. The method of claim 1, wherein the phase shift ratio is
Figure FDA0002954467970000021
And
Figure FDA0002954467970000022
respectively as follows:
Figure FDA0002954467970000023
Figure FDA0002954467970000024
Figure FDA0002954467970000025
wherein k ispc1Is a first scale factor, kpc2Is the second proportionality coefficient, kpc3Is the third scaling factor.
4. The method of claim 1, wherein the phase shift ratio is
Figure FDA0002954467970000026
And
Figure FDA0002954467970000027
respectively as follows:
Figure FDA0002954467970000028
Figure FDA0002954467970000029
Figure FDA00029544679700000210
wherein k ispc1Is a first scale factor, kpc2Is the second proportionality coefficient, kpc3Is the third scaling factor.
5. The method of claim 1, wherein the S3 includes:
s31, converting the PWM signal G1、G2、G7And G8Is set to DTs；
S32, setting a reference starting time and converting the PWM signal G1、G2、G7And G8Are shifted with respect to the reference start time, respectively
Figure FDA00029544679700000211
And
Figure FDA00029544679700000212
to generate a PWM signal G1、G2、G7And G8；
S33, generating respective PWM signals G1、G2、G7And G8Complementary PWM signal G4、G3、G6And G5。
6. The method of claim 5, wherein the S32 includes:
initial carrier respective translation
Figure FDA00029544679700000213
And
Figure FDA00029544679700000214
then comparing with the duty ratio D to generate a PWM signal G1、G2、G7And G8。
7. The method of claim 5, wherein the S32 includes:
initial carrier and stationThe duty ratios D are compared and then respectively translated
Figure FDA0002954467970000031
Figure FDA0002954467970000032
And
Figure FDA0002954467970000033
to generate a PWM signal G1、G2、G7And G8。
8. The method according to any one of claims 5-7, wherein the S33 includes:
PWM signal G1、G2、G7And G8Are respectively reversed to generate PWM signal G4、G3、G6And G5。
9. A capacitance voltage balance control system of a five-level Buck/Boost converter comprises eight switching tubes S sequentially connected between positive and negative input ends1、S2、S3、S4、S5、S6、S7And S8A capacitor C connected between the positive and negative input terminals in sequence1And C2Bridged over S1、S2Connection point and S3、S4Capacitance C between connection points3Bridged over S5、S6Connection point and S7、S8Capacitance C between connection points4A capacitor C connected between the positive and negative output terminalso，S2、S3The connection point is connected with the positive output end through an inductor L, S6、S7The negative output is connected to the tie point, and its characterized in that, the system includes:
a sampling module for respectively collecting Co、C1、C2、C3And C4Voltage v acrosso、vc1、vc2、vc3And vc4And collecting the current i flowing through LL；
An output voltage closed-loop control module for v-basedo、iLAnd outputting a given voltage value, and calculating the duty ratio D of the switching tube by using a double-ring PI controller;
a capacitor voltage phase shift control module for v-basedc1、vc2、vc3、vc4And an input voltage viRespectively calculating S by using a proportional controller1、S2And S7Corresponding phase shift ratio
Figure FDA0002954467970000034
And
Figure FDA0002954467970000035
a PWM signal generation and drive module for generating and driving a PWM signal based on the duty ratio D and the phase shift ratio
Figure FDA0002954467970000036
Figure FDA0002954467970000037
And a switching period TsRespectively generate PWM signals G1、G2、G7And G8And generates respective and PWM signals G1、G2、G7And G8Complementary PWM signal G4、G3、G6And G5Using PWM signal G1、G2、G3、G4、G5、G6、G7And G8Respectively drive a switching tube S1、S2、S3、S4、S5、S6、S7And S8To control the capacitor voltage balance.
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115313804A (en) * 2022-08-24 2022-11-08 西南交通大学 Single-sensor voltage-sharing control method of five-level DC-DC converter
WO2023246512A1 (en) * 2022-06-23 2023-12-28 华为数字能源技术有限公司 Multi-level direct current converter, voltage control method for flying capacitor, and control apparatus

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108322080A (en) * 2018-05-03 2018-07-24 易事特集团股份有限公司 Five level topology units and five level AC/DC convertors
CN109217704A (en) * 2018-11-02 2019-01-15 湖南大学 A kind of inhibition system leakage current non-isolation type five-electrical level inverter
CN110601580A (en) * 2019-09-24 2019-12-20 武汉船用电力推进装置研究所（中国船舶重工集团公司第七一二研究所） Five-level H-bridge converter and pre-charging method thereof
CN210380689U (en) * 2019-08-02 2020-04-21 江苏固德威电源科技股份有限公司 Boost active neutral point clamping type five-level converter
CN112271940A (en) * 2020-11-10 2021-01-26 中国矿业大学(北京) Five-level rectifier with public high-voltage direct-current bus and control strategy

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108322080A (en) * 2018-05-03 2018-07-24 易事特集团股份有限公司 Five level topology units and five level AC/DC convertors
CN109217704A (en) * 2018-11-02 2019-01-15 湖南大学 A kind of inhibition system leakage current non-isolation type five-electrical level inverter
CN210380689U (en) * 2019-08-02 2020-04-21 江苏固德威电源科技股份有限公司 Boost active neutral point clamping type five-level converter
CN110601580A (en) * 2019-09-24 2019-12-20 武汉船用电力推进装置研究所（中国船舶重工集团公司第七一二研究所） Five-level H-bridge converter and pre-charging method thereof
CN112271940A (en) * 2020-11-10 2021-01-26 中国矿业大学(北京) Five-level rectifier with public high-voltage direct-current bus and control strategy

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
FENG GAO等: "《Five-Level Current-Source Inverters With Buck–Boost and Inductive-Current Balancing Capabilities》", 《IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS》 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023246512A1 (en) * 2022-06-23 2023-12-28 华为数字能源技术有限公司 Multi-level direct current converter, voltage control method for flying capacitor, and control apparatus
CN115313804A (en) * 2022-08-24 2022-11-08 西南交通大学 Single-sensor voltage-sharing control method of five-level DC-DC converter

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