CN112994443B - Power management system applied to low-power-consumption fully-integrated system-level chip - Google Patents
Power management system applied to low-power-consumption fully-integrated system-level chip Download PDFInfo
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- CN112994443B CN112994443B CN201911295799.0A CN201911295799A CN112994443B CN 112994443 B CN112994443 B CN 112994443B CN 201911295799 A CN201911295799 A CN 201911295799A CN 112994443 B CN112994443 B CN 112994443B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/06—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
- H02M3/07—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
Abstract
A power management system applied to a low-power-consumption fully-integrated system-on-chip comprises: the full-chip power supply system starting module is connected with the full-integrated switched capacitor DC-DC buck converter in parallel, and the master-slave modular low-dropout linear voltage regulator is arranged at the output end of the full-integrated switched capacitor DC-DC buck converter; the invention has the characteristics of simple architecture and circuit design and no need of off-chip components, meets the low-cost design requirement of the portable electronic equipment, has the characteristics of high efficiency, high power supply noise suppression ratio, quick transient response and the like, and is suitable for the design of a system level chip with low power consumption and high system performance requirement.
Description
Technical Field
The invention relates to a technology in the field of semiconductor devices, in particular to a power management system applied to a low-power-consumption fully-integrated system-level chip.
Background
With the popularization of large-capacity batteries as ideal dc power sources in mobile devices, the biggest drawback is that the voltage varies greatly with the remaining capacity and the service time of the batteries. Therefore, a power management module with direct current-to-direct current (DC-DC) power conversion capability is needed to be designed for a portable electronic device system, so as to generate a relatively constant output voltage. The switching dc-dc buck converter is widely used in a low power consumption system-on-chip due to its high energy conversion efficiency, but generally generates high switching noise. The switching type DC-DC buck converter is connected with the high-performance linear voltage stabilizer in series, noise can be filtered, clean power supply voltage can be provided for circuits sensitive to noise or in a critical path, and meanwhile high energy conversion efficiency is guaranteed through the low-voltage-difference design of the voltage stabilizer. In a system-on-chip, a differential analog circuit requires a Low Dropout Regulator (LDO) with a high power supply noise rejection ratio; digital circuits require LDOs with fast transient response; single-ended analog rf circuits require both high power-to-noise rejection ratio and fast transient response LDOs. Therefore, a fully integrated area optimized high performance LDO is very important in energy transfer and multiple power supply systems.
Disclosure of Invention
The invention provides a power management system applied to a low-power-consumption fully-integrated system-level chip aiming at the defects and the defects of low-density of integrated capacitors, large parasitic loss of the capacitors, high power consumption of a driving circuit and the like in the prior art, and the power management system has the characteristics of simple architecture and circuit design and no need of off-chip components, meets the low-cost design requirement of portable electronic equipment, has the characteristics of high efficiency, high power noise rejection ratio, quick transient response and the like, is suitable for the design of the system-level chip with low power consumption and high system performance requirements, and is more suitable for being applied to the fully-integrated low-power-consumption system-level chip under the advanced CMOS (complementary metal oxide semiconductor) process due to the design of a stacked low-voltage-resistant MOS (metal oxide semiconductor) transistor, a cold start circuit and various capacitor combinations.
The invention is realized by the following technical scheme:
the invention comprises the following steps: a full-chip power system start-up module, a fully integrated switched capacitor direct current-direct current (DC-DC) buck converter, a master-slave modular low dropout regulator (FVF-LDO) of a Flipped Voltage Follower (FVF), wherein: the full-chip power supply system starting module is connected with the full-integrated switched capacitor direct current-direct current buck converter in parallel, and the master-slave modular low-dropout linear voltage regulator is arranged at the output end of the full-integrated switched capacitor direct current-direct current buck converter.
The full-chip power supply system starting module comprises: a parallel voltage reference source (bandgap) and three supply low dropout linear regulators (LDOs), wherein: the first power supply low dropout linear voltage regulator and the second power supply low dropout linear voltage regulator respectively provide power supply voltage for a fourteen-phase ring oscillator and a cold start circuit in the fully integrated switched capacitor DC-DC buck converter, and the third power supply low dropout linear voltage regulator provides power supply voltage for a full chip register.
The starting module of the full-chip power supply system is directly connected with a lithium battery (3.2V-3.8V).
The voltage reference source provides reference voltage for three power supply low dropout linear voltage regulators, the three power supply low dropout linear voltage regulators are all source level follower type low dropout linear voltage regulators, wherein the first power supply low dropout linear voltage regulator ensures that a switch clock source fourteen-phase ring oscillator of the fully integrated switch capacitor DC-DC buck converter is electrified, namely, a switch clock is output, and the normal starting of the fully integrated switch capacitor DC-DC buck converter is ensured; the second power supply low dropout linear regulator provides a quick start function when being electrified, the output voltage of the fully integrated switch capacitor DC-DC buck converter is pulled to be slightly lower than the normal output voltage, the voltage of any two ports of a switch tube consisting of stacked low voltage-resistant MOS tubes is ensured to be in a voltage-resistant range, and the second power supply low dropout linear regulator automatically enters a closed state after the output voltage is increased after the fully integrated switch capacitor DC-DC buck converter normally works; the third power supply low dropout regulator is used for the full-chip register to provide power-on and reset control, and ensures that the register outputs default control words before the signal path module is powered on.
The fully integrated switched capacitor DC-DC buck converter comprises: power module, control loop and start-up auxiliary module, wherein: the power supply module realizes DC-DC conversion and provides power supply voltage for the rear-stage cascaded FVF-LDO; the control loop adjusts the frequency of a clock signal output by the ring oscillator according to the output current requirement of the switched capacitor DC-DC so as to adjust the equivalent input internal resistance of the fourteen-phase switched capacitor DC-DC core circuit; the starting auxiliary module ensures correct power-on starting under the condition of being directly connected with a lithium battery (3.2V-3.8V) and the pressure-resistant characteristic of a short-channel low-voltage tube.
The master-slave modular low dropout regulator comprises: FVF-LDO master and a plurality of FVF-LDO slaves, wherein: the FVF-LDO master is connected with a plurality of FVF-LDO slave machines and outputs bias voltage, and the FVF-LDO slave machines are used for providing power supply voltage with high power supply noise rejection ratio and quick transient response for each module of the full chip.
The master-slave modular low dropout linear regulator optimizes the output transient response and PSRR performance of the FVF-LDO slave by adopting an inserted current type buffer and a feedforward capacitor, and improves the stability of an FVF loop.
Technical effects
The invention integrally solves the problem of power supply requirements of advanced CMOS process system level chips directly powered by lithium batteries on low cost, high efficiency and various different performance requirements. Compared with the prior art, the invention has the technical effects that:
1) a fourteen-phase switch capacitor DC-DC core circuit in a fully-integrated switch capacitor DC-DC step-down converter in a power management system adopts a short-channel stacked switch tube design, and the drive loss and the conduction loss are reduced in a voltage-resistant range;
2) the fully integrated switch capacitor DC-DC buck converter in the power management system has a cold start function and provides the direct capability of 3.2V-3.8V lithium batteries;
3) the energy storage capacitor of the fully integrated switch capacitor DC-DC voltage reduction converter in the power management system is composed of a metal insert finger MOM capacitor, an MOS capacitor and a diode junction capacitor from N-Well to R-Well, so that the capacitor density is improved, and the influence of the substrate parasitic capacitance of the CMOS integrated circuit process on the DC-DC efficiency of the switch capacitor is reduced;
4) master-slave modular low dropout linear regulator (FVF-LDO) of the flip-flop follower employs a current-mode buffer (M in FIG. 6)1Pipe and M5Tube) and feedforward capacitance (capacitance C in fig. 6)1And C2) The output transient response and power supply voltage suppression performance and the stability of the FVF loop are optimized, and power is supplied to a plurality of modules which are sensitive to power supply noise or have different requirements.
Drawings
FIG. 1 is a schematic structural view of the present invention;
FIG. 2 is a schematic diagram of a fully integrated switched capacitor DC-DC buck converter;
FIG. 3 is a schematic diagram of (a portion of) a fourteen-phase switched capacitor DC-DC core circuit;
FIG. 4 is a schematic diagram of a cold start circuit;
FIG. 5 is a schematic diagram of an energy storage capacitor;
FIG. 6 is a diagram of a master-slave modular LDO.
Detailed Description
As shown in fig. 1, an implementation scenario related to the present embodiment, that is, a power management system applied to a wireless communication system, includes: the power supply system comprises an off-chip lithium battery for providing 3.2V-3.8V power supply voltage, a fully integrated switch capacitor DC-DC buck converter, a transceiving access switch, a transmitting access power amplifier and a full chip power supply system starting module, wherein the fully integrated switch capacitor DC-DC buck converter, the transceiving access switch, the transmitting access power amplifier and the full chip power supply system starting module are directly connected with the off-chip lithium battery, and the transmitting access power amplifier and the full chip power supply system starting module are respectively connected with the off-chip lithium battery, wherein: the fully-integrated switched capacitor DC-DC buck converter is used for reducing the voltage of a lithium battery power supply according to a high energy conversion ratio and then supplying the reduced voltage to the FVF-LDO of each module in the system-level chip, and each different type of circuit module adopts a separated FVF-LDO to provide power supply voltage.
As shown in fig. 2, the fully integrated switched capacitor DC-DC buck converter includes: the system comprises a power supply module, a control loop and a starting auxiliary module.
The power supply module comprises: fourteen phase switch capacitor DC-DC core circuits and non-overlapping clock generation circuits, level shifting circuits and MOS tube switch driving circuits corresponding to the fourteen phase switch capacitor DC-DC core circuits, wherein: the nonoverlapping clock generating circuit transmits fourteen-phase seven pairs of differential clocks generated by the ring oscillator to the level shifting circuit and the MOS tube switch driving circuit after nonoverlapping processing is carried out on the fourteen-phase seven pairs of differential clocks to obtain four nonoverlapping clock signals of Ph _ PMOS _ H, Ph _ NMOS _ H, Ph _ PMOS _ L and Ph _ NMOS _ L so as to drive the low-voltage laminated switch tube.
The fourteen-phase switch capacitor DC-DC core circuit consists of seven groups of low-voltage laminated switch tubes and energy storage capacitors, converts input voltage Vin of a lithium battery into required Vout for output, and provides power supply voltage for a master-slave modular low-dropout linear regulator (FVF-LDO) of a later-stage cascaded overturn voltage follower.
The switch tube adopts a short-channel low-voltage stacked CMOS tube, reduces the conduction and parasitic loss of a switch capacitor, improves the overall efficiency, and ensures that the switch capacitor DC-DC buck converter normally works under the power input of 3.2-3.8V by means of a cold start circuit of a start auxiliary module.
The energy storage capacitor is composed of a metal inserted-finger MOM capacitor, a MOS capacitor and a diode junction capacitor from N-Well to R-Well. Not only improves the capacitance density, but also reduces the influence of the substrate parasitic capacitance on the efficiency.
The control loop comprises: an Error Amplifier (EA), a voltage reference source (Bandgap), and a fourteen-phase ring oscillator, wherein: error amplifier amplifying switch capacitor DC-DC core circuit output voltage VoutWith reference voltage V generated by a voltage reference sourcerefAnd output to the frequency tuning voltage terminal of the ring oscillator(Vtune) changes the frequency of the fourteen-phase clock signal output by the ring oscillator.
The start-up assist module includes a cold start circuit that generates multiple supply rail voltages, wherein: the cold start circuit is directly connected with the lithium battery, and the correct automatic power-on and lithium battery direct connection capabilities of the power management system are realized by combining a low-power-consumption design.
As shown in fig. 3, the switching capacitor DC-DC core circuit is a group of low-voltage stacked switching transistors and energy storage capacitors of a fourteen-phase switching capacitor DC-DC core circuit, and the switching capacitor DC-DC core circuit can accept high power voltage input in a manner of connecting low-voltage-withstanding MOS switching transistors in series in an advanced process, thereby reducing driving loss and conduction loss in a voltage withstanding range.
As shown in fig. 4, the cold start circuit supplies power to LDO2 (corresponding to LDO2 in fig. 1) to provide a fast start function when powered on, and pulls the output voltage to be slightly lower than the normal output voltage, so as to ensure that the voltage of any two ports of any switching tube is within the withstand voltage range, and LDO2 automatically enters a shutdown state after the DC-DC operation continues to increase the output voltage; the resistor string is connected in series between the input of the lithium battery and the chip ground, and the LDO2 is used for outputting a signal to clamp the intermediate level of the resistor string, so that the generation of multi-power-supply-rail voltage is realized, and power supply voltage with certain driving capability is provided for the level shifting circuit and the MOS tube switch driving circuit.
As shown in fig. 5, which is a schematic diagram of a partially amplified CMOS process implementation of the energy storage capacitor in fig. 3, in the design of the energy storage capacitor, a plurality of capacitor combination modes are adopted to increase the capacitor density and reduce the parasitic capacitance of the plate. A metal interdigital capacitor (MOM-CAP) is covered on MOS capacitors (PMOS and NMOS) to improve the capacitance density, and the diode junction capacitance of a trap and a trap formed between R-Well and N-Well corresponding to the PMOS and NMOS capacitors is further utilized to improve the capacitance density, so that the part of N-Well to substrate parasitic capacitance which has adverse effect on the DC-DC conversion efficiency of a switch capacitor originally is converted into a part of an energy storage capacitor.
A pulse frequency modulation control mode is adopted on a switch capacitor DC-DC control mode, in order to effectively reduce output ripples of the switch capacitor DC-DC, a multi-phase technology is adopted, namely, a switch capacitor DC-DC power supply core module is split into a plurality of small units, and same frequency signals with different phases are provided for each small unit. On the basis, a ring oscillator is selected to generate multi-phase switching signals required by the system at a very low cost. After the FVF-LDO is cascaded to the fully integrated switch capacitor DC-DC buck converter, the switching noise is filtered, and the performances such as high power supply noise rejection ratio, quick transient response and the like are realized according to different modules.
As shown in fig. 6, the master-slave modular low dropout regulator (FVF-LDO) of the flipped voltage follower adopts a master-slave design, and one FVF-LDO host in the system-on-chip can provide voltage bias for a plurality of FVF-LDO slaves, thereby improving the overall efficiency of the FVF-LDO.
The FVF-LDO host adopts a structure symmetrical to the FVF-LDO slave so as to ensure that the output voltage value of the slave biased by the host is controllable.
The FVF-LDO slave adopts a transistor M1、M2、M3And enable the FVF loop that the switch tube M4 makes up, the loop output pole is located the output stage, the low-frequency noise passes the loop to restrain, the high-frequency noise passes the big output capacitance to restrain on the power, therefore can realize the high power noise rejection ratio of the whole frequency band through increasing loop bandwidth and output capacitance value. Current mode buffer M1And a feedforward capacitance C1Adjusting the loop bandwidth and improving loop stability.
Each power domain of the whole chip only needs one FVF-LDO host, and a plurality of FVF-LDO slave machines are distributed in each module of the chip, thereby improving the performance of a system-level chip and reducing the complexity of the top layer layout of the whole chip. The FVF-LDO slave machines are designed in a modularized mode, and the driving capability of a power supply is ensured by selecting a proper number of FVF-LDO slave machines according to different current requirements of a supply module.
Through specific practical experiments, 1) the fully integrated switch capacitor DC-DC buck converter simultaneously achieves 80% of energy conversion efficiency and 0.18W/mm under the working conditions of 3.3V input voltage and 52mW output energy2The energy density of (a); 2) the unit gain bandwidth of a master-slave modular low dropout linear regulator (FVF-LDO) of the flip-flop voltage follower reaches 100 MHz.
Compared with the prior art, the device realizes a fully integrated power management system under an advanced process; the fully integrated switch capacitor DC-DC voltage reduction converter in the advanced process allows high power supply voltage input, and realizes high energy density under the condition of reaching certain energy conversion efficiency; under the condition of reaching a certain energy density, high energy conversion efficiency is realized; the FVF-LDO has a quick start function and simultaneously has a high power supply noise rejection ratio in a full frequency band range.
The foregoing embodiments may be modified in many different ways by those skilled in the art without departing from the spirit and scope of the invention, which is defined by the appended claims and all changes that come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.
Claims (1)
1. A power management system applied to a low-power fully integrated system-on-chip (LSSOC), comprising: full chip power supply system start-up module, full integrated switch capacitor DC-DC buck converter, upset voltage follower's master-slave mode modularization low dropout linear voltage regulator, wherein: the full-chip power supply system starting module is connected with the full-integrated switched capacitor DC-DC buck converter in parallel, and the master-slave modular low-dropout linear voltage regulator is arranged at the output end of the full-integrated switched capacitor DC-DC buck converter;
the fully integrated switched capacitor DC-DC buck converter comprises: power module, control loop and start-up auxiliary module, wherein: the power supply module realizes DC-DC conversion and provides power supply voltage for a post-stage cascaded master-slave modular low-dropout linear voltage regulator; the control loop adjusts the frequency of the clock signal output by the fourteen-phase ring oscillator according to the output current requirement of the fully-integrated switched capacitor DC-DC buck converter, and further adjusts the equivalent input internal resistance of a fourteen-phase switched capacitor DC-DC core circuit; the starting auxiliary module ensures correct power-on starting under the condition of direct connection with the lithium battery and the pressure resistance characteristic of the short-channel low-voltage tube;
the control loop comprises an error amplifier and a fourteen-phase ring oscillator; the start-up auxiliary module comprises a cold start circuit for generating multiple power supply rail voltages;
the power supply module comprises: the circuit comprises a fourteen-phase switch capacitor DC-DC core circuit, and a non-overlapping clock generation circuit, a level shifting circuit and an MOS tube switch driving circuit which correspond to the fourteen-phase switch capacitor DC-DC core circuit;
the full-chip power supply system starting module comprises: parallelly connected voltage reference source and three power low dropout linear regulator, wherein: the first power supply low dropout linear voltage regulator and the second power supply low dropout linear voltage regulator respectively provide power supply voltage for a fourteen-phase ring oscillator and a cold start circuit in the fully integrated switched capacitor DC-DC buck converter, and the third power supply low dropout linear voltage regulator provides power supply voltage for a full chip register;
the voltage reference source provide reference voltage for three power supply low dropout linear regulator, this three power supply low dropout linear regulator is the low dropout linear regulator of source follower formula, wherein: the first power supply low dropout linear voltage regulator ensures that the full-integration switched capacitor DC-DC buck converter is electrified and outputs a switching clock, and ensures the normal start of the full-integration switched capacitor DC-DC buck converter; the second power supply low dropout linear regulator provides a quick start function when being electrified, the output voltage of the fully integrated switch capacitor DC-DC buck converter is pulled to be slightly lower than the normal output voltage, the voltage of any two ports of a switch tube consisting of stacked low voltage-resistant MOS tubes is ensured to be in a voltage-resistant range, and the second power supply low dropout linear regulator automatically enters a closed state after the output voltage is increased after the fully integrated switch capacitor DC-DC buck converter normally works; the third power supply low dropout linear regulator is used for the full-chip register to provide power-on and reset control, and ensures that the full-chip register outputs default control words before the signal path module is powered on;
the fourteen-phase switch capacitor DC-DC core circuit consists of seven groups of low-voltage laminated switch tubes and energy storage capacitors, converts input voltage Vin of a lithium battery into required Vout for output, and provides power supply voltage for a master-slave modular low-dropout linear voltage regulator of a later-stage cascade-connected turnover voltage follower;
the switch tube adopts a short-channel low-voltage stacked CMOS tube, reduces the conduction and parasitic loss of the switch capacitor, improves the overall efficiency, and ensures that the fully integrated switch capacitor DC-DC buck converter normally works under the power input of 3.2-3.8V by means of a cold start circuit of a start auxiliary module; the energy storage capacitor is composed of a metal interdigital MOM capacitor, a MOS capacitor and a diode junction capacitor from N-Well to R-Well; the capacitance density is improved, and the influence of substrate parasitic capacitance on efficiency can be reduced;
the master-slave modular low dropout regulator comprises: the master-slave mode modularization low dropout linear voltage regulator comprises a master machine and a plurality of slave machines, wherein: the master-slave modular low dropout linear regulator is connected with a plurality of slave modular low dropout linear regulator slaves and outputs bias voltage, and the slave modular low dropout linear regulator slaves are used for providing power supply voltage with high power supply noise rejection ratio and fast transient response for a low-power-consumption fully-integrated system-level chip;
the master-slave modular low dropout linear regulator optimizes the output transient response and the power supply rejection ratio performance of the slave of the master-slave modular low dropout linear regulator by adopting an inserted current type buffer and a feedforward capacitor, and improves the stability of the turnover voltage follower.
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| CN113535636A (en) * | 2021-06-30 | 2021-10-22 | 成都中微达信科技有限公司 | Computing device |
| CN114236230B (en) * | 2021-12-13 | 2023-10-24 | 广西电网有限责任公司电力科学研究院 | Multi-voltage-domain power consumption optimization and stable power supply design method for power quality chip |
| CN114995550A (en) * | 2022-07-14 | 2022-09-02 | 西安交通大学 | On-chip fully-integrated temperature regulation and control system framework |
| CN117118228B (en) * | 2023-10-23 | 2024-01-26 | 希荻微电子集团股份有限公司 | Voltage conversion circuit and control method thereof |
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