CN112992954A - CMOS image sensor and method of manufacturing the same - Google Patents

CMOS image sensor and method of manufacturing the same Download PDF

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CN112992954A
CN112992954A CN202110489973.6A CN202110489973A CN112992954A CN 112992954 A CN112992954 A CN 112992954A CN 202110489973 A CN202110489973 A CN 202110489973A CN 112992954 A CN112992954 A CN 112992954A
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substrate
unit
image sensor
light
pixel circuit
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周雪梅
陈鸿
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Shanghai Core Technology Co ltd
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Shanghai Core Technology Co ltd
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    • H—ELECTRICITY
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    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/1464—Back illuminated imager structures
    • H—ELECTRICITY
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    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14603—Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
    • H01L27/14605—Structural or functional details relating to the position of the pixel elements, e.g. smaller pixel elements in the center of the imager compared to pixel elements at the periphery
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14609—Pixel-elements with integrated switching, control, storage or amplification elements
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    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14609—Pixel-elements with integrated switching, control, storage or amplification elements
    • H01L27/14612—Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14625—Optical elements or arrangements associated with the device
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    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14634—Assemblies, i.e. Hybrid structures
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    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14643—Photodiode arrays; MOS imagers
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    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
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    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/1469—Assemblies, i.e. hybrid integration

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Abstract

The invention discloses a complementary metal oxide semiconductor image sensor and a preparation method thereof. The CMOS image sensor includes: the pixel circuit comprises a first substrate, a second substrate and a third substrate, wherein a light sensing area and a pixel circuit area are arranged on a first surface of the first substrate; n pixel units; the pixel unit comprises a photodiode and a pixel circuit, the pixel circuit is positioned in the pixel circuit area and comprises a first grid structure and a suspended drain, and the photodiode is electrically connected with the suspended drain; the conductive interconnection unit covers the first surface of the first substrate and is used for leading out the electric signals of the pixel unit; the second substrate is positioned on the surface of one side of the conductive interconnection unit away from the first substrate; the light reflection capacitance unit is positioned on the surface of the second substrate and is electrically connected with the suspended drain electrode. The technical scheme provided by the embodiment of the invention improves the reality degree of the image acquired by the image sensor.

Description

CMOS image sensor and method of manufacturing the same
Technical Field
The embodiment of the invention relates to the technical field of semiconductors, in particular to a complementary metal oxide semiconductor image sensor and a preparation method thereof.
Background
With the rapid development of Complementary Metal Oxide Semiconductor (CMOS) image sensor technology, the application of CMOS image sensors has been expanded from mobile phone bi-shooting, 3D camera, unmanned aerial vehicle, biometric identification to the fields of automobile, security, medical treatment, internet of things, etc.
At present, a CMOS image sensor is developed from a front-illuminated CMOS image sensor to a back-illuminated CMOS image sensor, and the back-illuminated CMOS image sensor is positioned on a non-light-incident surface of a light-sensitive area due to a conductive interconnection unit of the back-illuminated CMOS image sensor, so that the light-sensitive area of the CMOS image sensor is increased, and the sensitivity of the back-illuminated CMOS image sensor under a low-light ring is improved.
However, as the area of the light sensing region in the back-illuminated CMOS image sensor is continuously reduced, the degree of realism of the acquired image of the back-illuminated CMOS image sensor is not high.
Disclosure of Invention
In view of the above, embodiments of the present invention provide a cmos image sensor and a method for manufacturing the cmos image sensor, so as to improve the reality of an image obtained by the image sensor.
In a first aspect, an embodiment of the present invention provides a cmos image sensor, including:
the pixel circuit comprises a first substrate, a second substrate and a third substrate, wherein a light sensing area and a pixel circuit area are arranged on a first surface of the first substrate;
n pixel units are arranged on the first surface of the first substrate, and the value of N comprises an integer which is greater than or equal to 1; the pixel unit comprises a photodiode and a pixel circuit, the photodiode is located in the photosensitive area, the pixel circuit is located in the pixel circuit area, the pixel circuit comprises a first grid structure and a suspended drain electrode, and the photodiode is electrically connected with the suspended drain electrode;
a conductive interconnection unit covering the first surface of the first substrate, the conductive interconnection unit being configured to draw out an electrical signal of the pixel unit;
a second substrate on a surface of the conductive interconnection unit on a side away from the first substrate;
the light reflection capacitor unit is located on the surface of the second substrate, electrically connected with the floating drain electrode through the conductive interconnection unit, and used for reflecting light incident from the second surface of the first substrate to the photosensitive area and adjusting the capacitance value of the floating drain electrode.
In a second aspect, an embodiment of the present invention further provides a method for manufacturing a cmos image sensor, including:
providing a first substrate, wherein a photosensitive area and a pixel circuit area are arranged on a first surface of the first substrate;
forming N pixel units on the first surface of the first substrate, wherein the value of N comprises an integer greater than or equal to 1; the pixel unit comprises a photodiode and a pixel circuit, the photodiode is located in the photosensitive area, the pixel circuit is located in the pixel circuit area, the pixel circuit comprises a first grid structure and a suspended drain, and the photodiode is electrically connected with the suspended drain;
forming a conductive interconnection unit on the first surface of the first substrate, wherein the conductive interconnection unit covers the first surface of the first substrate and is used for leading out the electric signals of the pixel unit;
providing a second substrate;
forming a light reflection capacitance unit on the surface of the second substrate;
and placing the second substrate on the surface of the conductive interconnection unit on the side far away from the first substrate, wherein the light reflection capacitance unit is electrically connected with the floating drain electrode through the conductive interconnection unit, and is used for reflecting light incident from the second surface of the first substrate to the light sensing area and adjusting the capacitance value of the floating drain electrode.
According to the technical scheme, the light reflection capacitor unit is arranged and is electrically connected with the suspension drain electrode (suspension node FD) through the conductive interconnection unit, the equivalent capacitance value of the suspension node is increased, the voltage value of photo-generated charges generated by the photodiode converted at the suspension node is increased, the conversion rate of converting photo-generated carriers into voltage signals in the CMOS image sensor and the dynamic range of the image sensor are improved, and the reality degree of images acquired by the CMOS image sensor is improved. Compared with the technical scheme that the light reflection capacitor unit is located in the conductive interconnection unit, in the technical scheme of the embodiment, the second substrate is located on the surface of the conductive interconnection unit, which is far away from the first substrate, and the light reflection capacitor unit is arranged on the surface of the second substrate, the size of the light reflection capacitor unit is not limited by the size of the conductive interconnection unit, and the light reflection capacitor unit can be made larger according to the size of the light sensing area in the first substrate, so that the projection of the light reflection capacitor unit on the first substrate covers the projection of the light sensing area on the first substrate as much as possible, and light incident from the second surface of the first substrate is conveniently reflected to the light sensing area, so that the number of photo-generated carriers is increased, and the reality degree of an acquired image of the CMOS image sensor is further improved. Compared with the technical scheme that the light reflection capacitance unit is located in the conductive interconnection unit, the light reflection capacitance unit is arranged on the surface of the second substrate, the difficulty of the preparation process of the CMOS image sensor is reduced, and the production cost is reduced.
Drawings
Fig. 1 is a schematic structural diagram of a cmos image sensor according to an embodiment of the present invention;
FIG. 2 is a schematic circuit diagram of a photodiode and a pixel circuit in the pixel unit of FIG. 1;
fig. 3 is a schematic structural diagram of another cmos image sensor according to an embodiment of the present invention;
FIG. 4 is a schematic circuit diagram of a photodiode and a pixel circuit in the pixel unit shown in FIG. 3;
fig. 5 is a schematic flow chart illustrating a method for fabricating a cmos image sensor according to an embodiment of the present invention;
fig. 6-17 are flow charts corresponding to steps of a method for fabricating a cmos image sensor according to an embodiment of the present invention;
FIG. 18 is a schematic flow chart included in step 160 of FIG. 5;
fig. 19 is a flowchart illustrating another method for fabricating a cmos image sensor according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
As described in the background art described above, as the area of the light sensing region in the back-illuminated CMOS image sensor is continuously reduced, the degree of realism of the acquired image of the back-illuminated CMOS image sensor is not high. The inventors have carefully studied and found that as the area of a photosensitive region in a backside illuminated CMOS image sensor is continuously reduced, the number of photogenerated carriers is greatly reduced, which results in a reduction in the dynamic range of the backside illuminated CMOS image sensor, and thus results in a low degree of reality of an image acquired by the backside illuminated CMOS image sensor.
In view of the above technical problems, an embodiment of the present invention provides the following technical solutions:
fig. 1 is a schematic structural diagram of a cmos image sensor according to an embodiment of the present invention. Fig. 2 is a schematic circuit diagram of a photodiode and a pixel circuit in the pixel unit in fig. 1. Referring to fig. 1 and 2, the cmos image sensor includes: a first substrate 10, a first surface 100 of the first substrate 10 being provided with a photosensitive region 11 and a pixel circuit region 12; n pixel units 20, where the N pixel units 20 are located on the first surface 100 of the first substrate 10, and a value of N includes an integer greater than or equal to 1; the pixel unit 20 comprises a photodiode PD and a pixel circuit 21, the photodiode PD is located in the photosensitive area 11, the pixel circuit 21 is located in the pixel circuit area 12, the pixel circuit 21 comprises a first gate structure 210 and a floating drain 211, and the photodiode PD is electrically connected with the floating drain 211; a conductive interconnection unit 30, the conductive interconnection unit 30 covering the first surface 100 of the first substrate 10, the conductive interconnection unit 30 being used for leading out an electrical signal of the pixel unit 20; a second substrate 40, the second substrate 40 being located on a surface of the conductive interconnection unit 30 on a side away from the first substrate 10; and a light reflection capacitance unit Ca located at a surface of the second substrate 40, the light reflection capacitance unit Ca being electrically connected to the floating drain electrode 211 through the conductive interconnection unit 30, the light reflection capacitance unit Ca being for reflecting light incident from the second surface 101 of the first substrate 10 to the light sensing area 11 and for adjusting a capacitance value of the floating drain electrode 211.
Optionally, the conductive interconnection unit 30 includes an insulating layer 31, a groove structure parallel to the X direction and a groove structure parallel to the Y direction are formed in the insulating layer 31 through a patterning process, a conductive material is filled in the groove structure in the X direction to form a conductive connection layer 33, a conductive material is filled in the groove structure parallel to the Y direction to form a conductive plug 32, the conductive connection layer 33 and the conductive plug 32 can achieve leading out of an electrical signal of the pixel unit 20, and can achieve electrical connection between the light reflection capacitance unit Ca and the floating drain 211.
Illustratively, referring to fig. 2, the pixel unit 20 includes a photodiode PD and a pixel circuit 21. The pixel circuit 21 includes a transfer transistor TG, a reset transistor RG, a source follower transistor SF, and a row select transistor SEL, the floating drain 211 in fig. 1 is equivalent to the floating node FD in the pixel circuit 21 in fig. 2, and the first gate structure 210 is equivalent to the gate of the transfer transistor TG in the pixel circuit 21 in fig. 2. One polar plate of the light reflection capacitance unit Ca is electrically connected to the floating node FD for adjusting the capacitance of the floating node FD, and further adjusting the dynamic range of the CMOS image sensor. It should be noted that the photosensitive region 11 in fig. 1 does not show a specific structural diagram of the photodiode PD. In the pixel circuit area 12 in fig. 1, only the first gate structure 210 and the floating drain 211 equivalent to the floating node FD in the pixel circuit 21 in fig. 2 are shown. The floating drain 211 and the photodiode PD are formed by doping of the first substrate 10.
The operating principle of the CMOS image sensor is as follows: light is incident from the second surface 101 of the first substrate 10, and the conductive interconnection unit 30 is located at the backlight surface (the first surface 100 of the first substrate 10), so that the light sensing area of the CMOS image sensor can be increased, and the sensitivity in the weak light ring can be improved. The photodiode PD is in a reverse bias state, the gate of the reset transistor RG is turned on under the control of a reset pulse signal, and the voltage of the floating node FD is reset to the power supply voltage VDD. At this time, the transfer transistor TG is in an off state, and photo-generated charges generated by the photodiode PD are accumulated in the depletion region. After the reset pulse, the gate of the transfer transistor TG is turned on under the control of the transfer pulse, and the photo-generated charge generated by the photodiode PD flows into the floating node FD. The row selection transistor SEL is turned on, the voltage acquisition circuit of the pixel unit 20 is electrically connected to the row selection transistor SEL, and the voltage acquisition circuit of the pixel unit 20 amplifies the voltage value of the floating node FD by the source follower transistor SF and then reads out the amplified voltage value by the voltage acquisition circuit of the pixel unit 20. The larger the capacitance of the floating node FD is, the larger the storage capacity for the photo-generated charge generated by the photodiode PD is, and the larger the voltage value converted at the floating node FD by the photo-generated charge generated by the photodiode PD is.
In this embodiment, the light reflection capacitance unit Ca is provided, and the light reflection capacitance unit Ca is electrically connected to the floating drain 211 (floating node FD) through the conductive interconnection unit 30, so that an equivalent capacitance value at the floating node FD is increased, a voltage value of photo-generated charges generated by the photodiode PD converted at the floating node FD is increased, a conversion rate of converting photo-generated carriers into voltage signals in the CMOS image sensor and a dynamic range of the image sensor are improved, and further, a degree of reality of an image obtained by the CMOS image sensor is improved. Compared with the technical solution that the light reflection capacitance unit Ca is located in the conductive interconnection unit 30, in the technical solution of the present embodiment, the second substrate 40 is located on the surface of the conductive interconnection unit 30 on the side away from the first substrate 10, the light reflection capacitance unit Ca is disposed on the surface of the second substrate 40, the size of the light reflection capacitance unit Ca is not limited by the size of the conductive interconnection unit 30, and the light reflection capacitance unit Ca can be made larger according to the size of the light sensing region 11 in the first substrate 10, so that the projection of the light reflection capacitance unit Ca on the first substrate 10 covers the projection of the light sensing region 11 on the first substrate 10 as much as possible, and light incident from the second surface 101 of the first substrate 10 is reflected to the light sensing region 11, so as to increase the number of photo-generated carriers, and further improve the reality degree of the acquired image of the CMOS image sensor. Compared with the technical scheme that the light reflection capacitance unit Ca is positioned in the conductive interconnection unit 30, the light reflection capacitance unit Ca is arranged on the surface of the second substrate 40, so that the difficulty of the preparation process of the CMOS image sensor is reduced, and the production cost is reduced.
Optionally, on the basis of the above technical solution, the projection of the light-reflecting capacitance unit Ca on the first substrate 10 covers the projection of the light-sensing region 11 on the first substrate 10, so that light incident from the second surface 101 of the first substrate 10 is completely reflected to the light-sensing region 11, so as to increase the number of photo-generated carriers, and further improve the fidelity of an acquired image of the CMOS image sensor.
Fig. 3 is a schematic structural diagram of another cmos image sensor according to an embodiment of the present invention. Fig. 4 is a schematic circuit diagram of the photodiode and the pixel circuit in the pixel unit in fig. 3. Optionally, on the basis of the above technical solution, referring to fig. 3 and fig. 4, the pixel circuit 21 further includes a second gate structure 212, and the second gate structure 212 is used as a gate of the capacitance control transistor DCG.
Note that in the pixel circuit area 12 in fig. 3, only the first gate structure 210, the second gate structure 212, and the floating drain 211 equivalent to the floating node FD in the pixel circuit 21 in fig. 2 are shown.
Illustratively, referring to fig. 4, the pixel circuit 21 includes a transfer transistor TG, a reset transistor RG, a source follower transistor SF, a row select transistor SEL, and a capacitance control transistor DCG, the floating drain 211 in fig. 3 is equivalent to the floating node FD in the pixel circuit 21 in fig. 2, and the first gate structure 210 is equivalent to the gate of the transfer transistor TG in the pixel circuit 21 in fig. 4. The second gate structure 212 is equivalent to the gate of the capacitance control transistor DCG in the pixel circuit 21 in fig. 4. One plate of the light reflection capacitance unit Ca is electrically connected to the floating node FD for adjusting a capacitance value of the floating node FD.
The operating principle of the CMOS image sensor is as follows: light is incident from the second surface 101 of the first substrate 10, and the conductive interconnection unit 30 is located at the backlight surface (the first surface 100 of the first substrate 10), so that the light sensing area of the CMOS image sensor can be increased, and the sensitivity in the weak light ring can be improved. The photodiode PD is in a reverse bias state, the gate of the reset transistor RG is turned on under the control of a reset pulse signal, and the voltage of the floating node FD is reset to the power supply voltage VDD. At this time, the transfer transistor TG is in an off state, and photo-generated charges generated by the photodiode PD are accumulated in the depletion region. After the reset pulse, the gate of the transfer transistor TG is turned on under the control of the transfer pulse, and the photo-generated charge generated by the photodiode PD flows into the floating node FD. The row selection transistor SEL is turned on, the voltage acquisition circuit of the pixel unit 20 is electrically connected to the row selection transistor SEL, and the voltage acquisition circuit of the pixel unit 20 amplifies the voltage value of the floating node FD by the source follower transistor SF and then reads out the amplified voltage value by the voltage acquisition circuit of the pixel unit 20. The larger the capacitance of the floating node FD is, the larger the storage capacity for the photo-generated charge generated by the photodiode PD is, and the larger the voltage value converted at the floating node FD by the photo-generated charge generated by the photodiode PD is.
Under the control of a capacitance control signal, the equivalent capacitance value of the suspension node FD is larger when the capacitor control transistor DCG is in a conducting state than when the capacitor control transistor DCG is in a stopping state, so that the capacitor control signal can be conveniently adjusted according to the sensitivity of the CMOS image sensor, the working state of the capacitor control transistor DCG is further adjusted, and the technical effect of flexibly controlling the dynamic range of the CMOS image sensor is achieved on the basis of reducing the power consumption of the CMOS image sensor.
Optionally, on the basis of the above technical solution, referring to fig. 3, the light reflection capacitor unit Ca includes a stacked structure composed of a first polysilicon electrode 41, a dielectric layer 42, and a second polysilicon electrode 43;
alternatively, the light reflective capacitor unit Ca includes a stacked structure of the first metal electrode 41, the dielectric layer 42, and the second metal electrode 43.
It should be noted that, in this embodiment, the first polysilicon electrode and the first metal electrode are different in material and therefore the same reference numeral 41 is used, and the second polysilicon electrode and the second metal electrode are different in material and therefore the same reference numeral 43 is used.
Specifically, in the stacked structure composed of the first polysilicon electrode 41, the dielectric layer 42 and the second polysilicon electrode 43, the light transmittance of the first polysilicon electrode 41 and the second polysilicon electrode 43 to light is small, so that light incident from the second surface 101 of the first substrate 10 is completely reflected to the light sensing area 11, the number of photo-generated carriers is increased, and the reality degree of an image acquired by the image sensor is further improved.
Or in the stacked structure composed of the first metal electrode 41, the dielectric layer 42 and the second metal electrode 43, the light transmittance of the first metal electrode 41 and the second metal electrode 43 with respect to light is small, so that light incident from the second surface 101 of the first substrate 10 is completely reflected to the light sensing region 11, the number of photo-generated carriers is increased, and the reality of an image obtained by the image sensor is further improved.
Optionally, on the basis of the above technical solution, referring to fig. 3, the cmos image sensor further includes an optical filter 50 and a microlens array 60, the optical filter 50 is located on the second surface 101 of the first substrate 10, and the microlens array 60 is located on a surface of the optical filter 50 facing away from the first substrate 10.
Specifically, the optical filter 50 is used to realize incidence of light with a predetermined wavelength from the second surface 101 of the first substrate 10, and the microlens array 60 is used to increase incidence rate of light entering the photosensitive region 11 of the first substrate 10.
Optionally, on the basis of the above technical solution, the cmos image sensor further includes at least two isolation trench structures 70, where the isolation trench structures 70 are used to isolate the pixel units 20.
Specifically, the isolation trench structure 70 realizes electrical isolation of the pixel unit 20, and prevents electrical signals of different pixel units 20 from interfering with each other.
Optionally, on the basis of the above technical solution, referring to fig. 3, the cmos image sensor further includes a conductive bonding layer 80, and the conductive bonding layer 80 is located between the conductive interconnection unit 30 and the light reflective capacitor unit Ca.
Specifically, the conductive bonding layer 80 is located between the conductive interconnection unit 30 and the light-reflective capacitor unit Ca, so that on one hand, the conductive interconnection unit 30 and the light-reflective capacitor unit Ca can be fixedly connected, and on the other hand, the conductive bonding layer 80 can transfer an electrical signal between the conductive interconnection unit 30 and the light-reflective capacitor unit Ca. Illustratively, the conductive bonding layer 80 may be made of copper, which is a metal having good conductivity.
The embodiment of the invention also provides a preparation method of the complementary metal oxide semiconductor image sensor. Fig. 5 is a flowchart illustrating a method for fabricating a cmos image sensor according to an embodiment of the present invention. Fig. 6-17 are flow charts corresponding to steps of a method for fabricating a cmos image sensor according to an embodiment of the present invention. Referring to fig. 5, the method for fabricating the cmos image sensor includes the steps of:
step 110, providing a first substrate, wherein a photosensitive area and a pixel circuit area are arranged on a first surface of the first substrate.
Referring to fig. 6, a first substrate 10 is provided, wherein a first surface 100 of the first substrate 10 is provided with a photosensitive region 11 and a pixel circuit region 12. Alternatively, the first substrate 10 may be a super-planar silicon substrate of a (100) crystal plane. (100) The interface charge density of the crystal face is low, the defect density of the formed CMOS image sensor is low, and the carrier mobility is high. It should be noted that the first substrate 10 may also be a substrate formed of other semiconductor materials.
Optionally, on the basis of the foregoing technical solution, before the step 120, at least two isolation trench structures are formed on the first surface of the first substrate, where the isolation trench structures are used to isolate the pixel units.
Referring to fig. 7, step 120 further includes forming at least two isolation trench structures 70 on the first surface 100 of the first substrate 10, where the isolation trench structures 70 are used to electrically isolate the pixel units 20, so as to prevent the electrical signals of different pixel units 20 from interfering with each other. Specifically, the isolation trench structure 70 may be formed by forming at least two trenches in the first surface 100 of the first substrate 10, and filling the trenches with an insulating material.
Step 120, forming N pixel units on the first surface of the first substrate, wherein the value of N includes an integer greater than or equal to 1; the pixel unit comprises a photodiode and a pixel circuit, the photodiode is located in a photosensitive area, the pixel circuit is located in a pixel circuit area, the pixel circuit comprises a first grid structure and a suspension drain electrode, the photodiode is electrically connected with the suspension drain electrode, and the first grid structure is used as a grid electrode of the transmission transistor.
With reference to fig. 8 in conjunction with fig. 4, N pixel units 20 are formed on the first surface 100 of the first substrate 10, where N includes an integer greater than or equal to 1; the pixel unit 20 includes a photodiode PD and a pixel circuit 21, the photodiode PD is located in the photosensitive region 11, the pixel circuit 21 is located in the pixel circuit region 12, the pixel circuit 21 includes a first gate structure 210 and a floating drain 211, the photodiode PD is electrically connected to the floating drain 211, and the first gate structure 210 serves as a gate of the transfer transistor TG. Specifically, the floating drain 211 and the photodiode PD are formed by doping of the first substrate 10.
The operating principle of the CMOS image sensor is as follows: the photodiode PD is in a reverse bias state, the gate of the reset transistor RG is turned on under the control of a reset pulse signal, and the voltage of the floating node FD is reset to the power supply voltage VDD. At this time, the transfer transistor TG is in an off state, and photo-generated charges generated by the photodiode PD are accumulated in the depletion region. After the reset pulse, the gate of the transfer transistor TG is turned on under the control of the transfer pulse, and the photo-generated charge generated by the photodiode PD flows into the floating node FD. The row selection transistor SEL is turned on, the voltage acquisition circuit of the pixel unit 20 is electrically connected to the row selection transistor SEL, and the voltage acquisition circuit of the pixel unit 20 amplifies the voltage value of the floating node FD by the source follower transistor SF and then reads out the amplified voltage value by the voltage acquisition circuit of the pixel unit 20. The larger the capacitance of the floating node FD is, the larger the storage capacity for the photo-generated charge generated by the photodiode PD is, and the larger the voltage value converted at the floating node FD by the photo-generated charge generated by the photodiode PD is.
Optionally, the forming of N pixel units on the first surface of the first substrate in step 120 includes: forming a second gate structure after forming a photodiode, a pixel circuit including a first gate structure and a floating drain in the photosensitive region.
Referring to fig. 9, forming N pixel cells 20 on a first surface of a first substrate at step 120 includes: forming the photodiode PD in the photosensitive region 11, the pixel circuit 21 including the first gate structure 210 and the floating drain 211, and then forming the second gate structure 212.
Specifically, the second gate structure 212 serves as a gate of the capacitance control transistor DCG. Under the control of a capacitance control signal, the equivalent capacitance value of the suspension node FD is larger when the capacitor control transistor DCG is in a conducting state than when the capacitor control transistor DCG is in a stopping state, so that the capacitor control signal can be conveniently adjusted according to the sensitivity of the CMOS image sensor, the working state of the capacitor control transistor DCG is further adjusted, and the technical effect of flexibly controlling the dynamic range of the CMOS image sensor is achieved on the basis of reducing the power consumption of the CMOS image sensor.
And step 130, forming a conductive interconnection unit on the first surface of the first substrate, wherein the conductive interconnection unit covers the first surface of the first substrate and is used for leading out the electric signals of the pixel unit.
Referring to fig. 10, a conductive interconnection unit 30 is formed on the first surface 100 of the first substrate 10, the conductive interconnection unit 30 covers the first surface 100 of the first substrate 10, and the conductive interconnection unit 30 is used to lead out an electrical signal of the pixel unit 20.
Alternatively, forming the conductive interconnection unit 30 on the first surface 100 of the first substrate 10 includes: an insulating layer 31 is formed on the first surface 100 of the first substrate 10, and a groove structure parallel to the X direction and a groove structure parallel to the Y direction are formed in the insulating layer 31 through a patterning process. The conductive plug 32 is formed by filling a conductive material in a groove structure parallel to the Y direction, and the conductive connection layer 33 and the conductive plug 32 can realize the extraction of the electrical signal of the pixel unit 20 and the electrical connection between the light reflection capacitance unit Ca and the floating drain 211.
Step 140, a second substrate is provided.
Referring to fig. 11, a second substrate 40 is provided. For example, the second substrate 40 may also be a silicon substrate, or a substrate formed of other semiconductor materials. For the exemplary row, the second substrate 40 may be a selected (100) plane, super-planar silicon substrate. (100) The interface charge density of the crystal face is low, the defect density of the formed CMOS image sensor is low, and the carrier mobility is high.
Step 150, forming a light reflection capacitor unit on the surface of the second substrate.
Referring to fig. 12, a light reflection capacitance unit Ca is formed on the surface of the second substrate 40.
And 160, placing the second substrate on the surface of the conductive interconnection unit on the side far away from the first substrate, wherein the light reflection capacitor unit is electrically connected with the floating drain electrode through the conductive interconnection unit, and the light reflection capacitor unit is used for reflecting light incident from the second surface of the first substrate to the light sensing area and adjusting the capacitance value of the floating drain electrode.
Referring to fig. 14, a second substrate 40 is placed on a surface of the conductive interconnection unit 30 on a side away from the first substrate 10, wherein a light-reflective capacitor unit Ca is electrically connected to the floating drain 211 through the conductive interconnection unit 30, the light-reflective capacitor unit Ca is used for reflecting light incident from the second surface 101 of the first substrate 10 to the light-sensing region 11, and for adjusting a capacitance value of the floating drain 211.
In this embodiment, the light reflection capacitance unit Ca is provided, and the light reflection capacitance unit Ca is electrically connected to the floating drain 211 (floating node FD) through the conductive interconnection unit 30, so that an equivalent capacitance value at the floating node FD is increased, a voltage value of photo-generated charges generated by the photodiode PD converted at the floating node FD is increased, a conversion rate of converting photo-generated carriers into voltage signals in the CMOS image sensor and a dynamic range of the image sensor are improved, and further, a degree of reality of an image obtained by the CMOS image sensor is improved. Compared with the technical solution that the light reflection capacitance unit Ca is located in the conductive interconnection unit 30, in the technical solution of the present embodiment, the second substrate 40 is located on the surface of the conductive interconnection unit 30 on the side away from the first substrate 10, the light reflection capacitance unit Ca is disposed on the surface of the second substrate 40, the size of the light reflection capacitance unit Ca is not limited by the size of the conductive interconnection unit 30, and the light reflection capacitance unit Ca can be made larger according to the size of the light sensing region 11 in the first substrate 10, so that the projection of the light reflection capacitance unit Ca on the first substrate 10 covers the projection of the light sensing region 11 on the first substrate 10 as much as possible, and light incident from the second surface 101 of the first substrate 10 is reflected to the light sensing region 11, so as to increase the number of photo-generated carriers, and further improve the reality degree of the acquired image of the CMOS image sensor. Compared with the technical scheme that the light reflection capacitance unit Ca is positioned in the conductive interconnection unit 30, the light reflection capacitance unit Ca is arranged on the surface of the second substrate 40, so that the difficulty of the preparation process of the CMOS image sensor is reduced, and the production cost is reduced.
Fig. 18 is a schematic flow chart included in step 160 in fig. 5. Alternatively, on the basis of the above technical solution, referring to fig. 18, the step 160 of placing the second substrate on the surface of the conductive interconnection unit on the side away from the first substrate includes:
step 1601, forming an electrically conductive bonding layer on a surface of the light reflection capacitor unit, which faces away from the second substrate.
Referring to fig. 13, an electrically conductive bonding layer 80 is formed on a surface of the light reflective capacitive unit Ca facing away from the second substrate 40. Illustratively, the conductive bonding layer 80 may be made of copper, which is a metal having good conductivity.
Step 1602, a second substrate is placed on a surface of the conductive interconnection unit on a side away from the first substrate through a bonding process, wherein a conductive bonding layer is located between the conductive interconnection unit and the light reflection capacitor unit.
Referring to fig. 14, the second substrate 40 is placed on the surface of the side of the conductive interconnection unit 30 away from the first substrate 10 through a bonding process, wherein the conductive bonding layer 80 is located between the conductive interconnection unit 30 and the light reflective capacitance unit Ca.
Specifically, the conductive bonding layer 80 is located between the conductive interconnection unit 30 and the light-reflective capacitor unit Ca, so that on one hand, the conductive interconnection unit 30 and the light-reflective capacitor unit Ca can be fixedly connected, and on the other hand, the conductive bonding layer 80 can transfer an electrical signal between the conductive interconnection unit 30 and the light-reflective capacitor unit Ca.
Optionally, on the basis of the foregoing technical solution, the step 150 of forming a light reflection capacitance unit on the surface of the second substrate includes: and forming a light reflection capacitance unit on the surface of the second substrate, wherein the projection of the light reflection capacitance unit on the first substrate covers the projection of the light sensing area on the first substrate.
A light reflection capacitance unit Ca is formed on the surface of the second substrate 40, wherein the projection of the first substrate 10 covers the projection of the light sensing region 11 on the first substrate 10.
Specifically, the projection of the light reflection capacitance unit Ca on the first substrate 10 covers the projection of the light sensing region 11 on the first substrate 10, so that light incident from the second surface 101 of the first substrate 10 is completely reflected to the light sensing region 11, the number of photo-generated carriers is increased, and the reality degree of an acquired image of the CMOS image sensor is further improved.
Optionally, on the basis of the foregoing technical solution, the step 150 of forming a light reflection capacitance unit on the surface of the second substrate includes:
forming a reflection capacitor unit of a laminated structure consisting of a first polycrystalline silicon electrode, a dielectric layer and a second polycrystalline silicon electrode on the surface of a second substrate;
or, a reflective capacitor unit with a laminated structure composed of the first metal electrode, the dielectric layer and the second metal electrode is formed on the surface of the second substrate.
Referring to fig. 13, in the stacked structure composed of the first polysilicon electrode 41, the dielectric layer 42 and the second polysilicon electrode 43, the light transmittance of the first polysilicon electrode 41 and the second polysilicon electrode 43 with respect to light is small, so that light incident from the second surface 101 of the first substrate 10 is completely reflected to the light sensing area 11, the number of photo-generated carriers is increased, and the reality of an image obtained by the image sensor is further improved. Or in the stacked structure composed of the first metal electrode 41, the dielectric layer 42 and the second metal electrode 43, the light transmittance of the first metal electrode 41 and the second metal electrode 43 with respect to light is small, so that light incident from the second surface 101 of the first substrate 10 is completely reflected to the light sensing region 11, the number of photo-generated carriers is increased, and the reality of an image obtained by the image sensor is further improved.
Fig. 19 is a flowchart illustrating another method for fabricating a cmos image sensor according to an embodiment of the present invention. Alternatively, on the basis of the above technical solution, referring to fig. 19, after the step 160 of placing the second substrate on the surface of the conductive interconnection unit on the side away from the first substrate, the method further includes:
step 170, forming a filter on the second surface of the first substrate.
Referring to fig. 16, the filter 50 is formed on the second surface 101 of the first substrate 10. Specifically, the optical filter 50 is used to realize incidence of light of a predetermined wavelength from the second surface 101 of the first substrate 10.
Optionally, on the basis of the above technical solution, referring to fig. 15, before step 170, thinning processing is further performed on the second surface 101 of the first substrate 10.
The thinned first substrate 10 can reduce the distance from the second surface 101 of the first substrate 10 to the photosensitive area, so as to reduce the loss of light and increase the number of photo-generated carriers in the CMOS image sensor.
And step 180, forming a micro-lens array on the surface of the side, away from the first substrate, of the optical filter.
Referring to fig. 17, a microlens array 60 is formed on the surface of the filter 50 on the side facing away from the first substrate 10.
Specifically, the optical filter 50 is used to realize incidence of light with a predetermined wavelength from the second surface 101 of the first substrate 10, and the microlens array 60 is used to increase incidence rate of light entering the photosensitive area of the first substrate 10.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims (14)

1. A CMOS image sensor, comprising:
the pixel circuit comprises a first substrate, a second substrate and a third substrate, wherein a light sensing area and a pixel circuit area are arranged on a first surface of the first substrate;
n pixel units are arranged on the first surface of the first substrate, and the value of N comprises an integer which is greater than or equal to 1; the pixel unit comprises a photodiode and a pixel circuit, the photodiode is located in the photosensitive area, the pixel circuit is located in the pixel circuit area, the pixel circuit comprises a first grid structure and a suspended drain electrode, and the photodiode is electrically connected with the suspended drain electrode;
a conductive interconnection unit covering the first surface of the first substrate, the conductive interconnection unit being configured to draw out an electrical signal of the pixel unit;
a second substrate on a surface of the conductive interconnection unit on a side away from the first substrate;
the light reflection capacitor unit is located on the surface of the second substrate, electrically connected with the floating drain electrode through the conductive interconnection unit, and used for reflecting light incident from the second surface of the first substrate to the photosensitive area and adjusting the capacitance value of the floating drain electrode.
2. The CMOS image sensor of claim 1, wherein a projection of said light-reflecting capacitive element onto said first substrate overlaps a projection of said light-sensing region onto said first substrate.
3. The CMOS image sensor of claim 1, wherein said pixel circuit further comprises a second gate structure.
4. The CMOS image sensor of claim 1, wherein said light reflecting capacitor unit comprises a stacked structure of a first polysilicon electrode, a dielectric layer and a second polysilicon electrode;
or, the light reflection capacitance unit comprises a laminated structure consisting of a first metal electrode, a dielectric layer and a second metal electrode.
5. The CMOS image sensor of claim 1, further comprising a filter and a micro-lens array, wherein the filter is located on the second surface of the first substrate, and the micro-lens array is located on a surface of the filter facing away from the first substrate.
6. The CMOS image sensor of claim 1, further comprising at least two isolation trench structures for isolating said pixel cells.
7. The CMOS image sensor of claim 1, further comprising a conductive bonding layer between said conductive interconnection unit and said light reflecting capacitive unit.
8. A method for fabricating a CMOS image sensor, comprising:
providing a first substrate, wherein a photosensitive area and a pixel circuit area are arranged on a first surface of the first substrate;
forming N pixel units on the first surface of the first substrate, wherein the value of N comprises an integer greater than or equal to 1; the pixel unit comprises a photodiode and a pixel circuit, the photodiode is located in the photosensitive area, the pixel circuit is located in the pixel circuit area, the pixel circuit comprises a first grid structure and a suspended drain, and the photodiode is electrically connected with the suspended drain;
forming a conductive interconnection unit on the first surface of the first substrate, wherein the conductive interconnection unit covers the first surface of the first substrate and is used for leading out the electric signals of the pixel unit;
providing a second substrate;
forming a light reflection capacitance unit on the surface of the second substrate;
and placing the second substrate on the surface of the conductive interconnection unit on the side far away from the first substrate, wherein the light reflection capacitance unit is electrically connected with the floating drain electrode through the conductive interconnection unit, and is used for reflecting light incident from the second surface of the first substrate to the light sensing area and adjusting the capacitance value of the floating drain electrode.
9. The method of claim 7, wherein forming a light reflective capacitor unit on the surface of the second substrate comprises:
and forming a light reflection capacitance unit on the surface of the second substrate, wherein the projection of the light reflection capacitance unit on the first substrate covers the projection of the light sensing area on the first substrate.
10. The method of claim 7, wherein forming N pixel cells on the first surface of the first substrate comprises:
forming a second gate structure after forming a photodiode, a pixel circuit including a first gate structure and a floating drain in the photosensitive region.
11. The method of claim 7, wherein forming a light reflective capacitor unit on the surface of the second substrate comprises:
forming a reflection capacitor unit of a laminated structure consisting of a first polycrystalline silicon electrode, a dielectric layer and a second polycrystalline silicon electrode on the surface of the second substrate;
or, a reflective capacitor unit with a laminated structure composed of a first metal electrode, a dielectric layer and a second metal electrode is formed on the surface of the second substrate.
12. The method of manufacturing a cmos image sensor according to claim 7, wherein the placing the second substrate after the surface of the conductive interconnection unit on the side away from the first substrate further comprises:
forming an optical filter on the second surface of the first substrate;
and forming a micro-lens array on the surface of the side, away from the first substrate, of the optical filter.
13. The method of claim 7, further comprising, before forming the N pixel cells on the first surface of the first substrate:
and forming at least two insulation isolation trench structures on the first surface of the first substrate, wherein the insulation isolation trench structures are used for isolating the pixel units.
14. The method of claim 7, wherein placing the second substrate on a surface of the conductive interconnection unit on a side away from the first substrate comprises:
forming a conductive bonding layer on the surface of the light reflection capacitance unit, which faces away from the second substrate;
and placing the second substrate on the surface of the side, away from the first substrate, of the conductive interconnection unit by a bonding process, wherein the conductive bonding layer is positioned between the conductive interconnection unit and the light reflection capacitance unit.
CN202110489973.6A 2021-05-06 2021-05-06 CMOS image sensor and method of manufacturing the same Pending CN112992954A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114284307A (en) * 2021-12-16 2022-04-05 杭州海康威视数字技术股份有限公司 Photosensitive element, manufacturing method, photosensitive chip, photosensitive detector and detection device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114284307A (en) * 2021-12-16 2022-04-05 杭州海康威视数字技术股份有限公司 Photosensitive element, manufacturing method, photosensitive chip, photosensitive detector and detection device
CN114284307B (en) * 2021-12-16 2023-10-13 杭州海康微影传感科技有限公司 Photosensitive element, manufacturing method, photosensitive chip, photosensitive detector and detection device

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