CN112992038B - Display panel and display device - Google Patents
Display panel and display device Download PDFInfo
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- CN112992038B CN112992038B CN202110252493.8A CN202110252493A CN112992038B CN 112992038 B CN112992038 B CN 112992038B CN 202110252493 A CN202110252493 A CN 202110252493A CN 112992038 B CN112992038 B CN 112992038B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
Abstract
The application discloses a display panel and a display device, wherein the display panel comprises a data driver, a power management circuit, a startup protection circuit and a startup control circuit; in the starting process of the display panel, when the supply current of the power supply sub-circuit is greater than or equal to the preset current and lasts for the first time period, the power supply management circuit is controlled to stop supplying power to the data driver, so that the situation that the COF is slightly damaged and is not enough to directly trigger the OCP and/or the UVP can be detected, the power supply is stopped in time, the heat accumulation of the data driver and/or the COF is effectively reduced or eliminated, and the more serious damage situation can be avoided.
Description
Technical Field
The application relates to the technical field of display, in particular to a display panel and a display device.
Background
In the current display panel, a COF (Chip On Film) is usually adopted to fix the data driver On the substrate. However, during the testing or using process, the COF is easily damaged, and during the next boot process, if the damage is not enough to directly trigger OCP (Over Current Protection) or UVP (Over Voltage Protection), heat of the data driver is always accumulated, and the data driver and/or the COF may be burned out, or even smoke may be ignited.
It should be noted that the above description of the background art is only for the convenience of clear and complete understanding of the technical solutions of the present application. The technical solutions referred to above are therefore not considered to be known to the person skilled in the art, merely because they appear in the background of the present application.
Disclosure of Invention
The application provides a display panel and a display device, and the technical problem of driver heat accumulation caused by current COF damage is relieved.
In a first aspect, the present application provides a display panel, which includes a data driver, a power management circuit, a power protection circuit, and a power control circuit; the power supply management circuit comprises a power supply sub-circuit, wherein the power supply sub-circuit is connected with the data driver and is used for supplying power to the data driver; the power-on protection circuit is connected with the power management circuit and is used for controlling the power management circuit to stop supplying power to the data driver when the power supply current of the power supply sub-circuit is greater than or equal to the preset current and lasts for a first time period in the power-on process of the display panel; the power-on control circuit is connected with the power management circuit and the power-on protection circuit and is used for controlling the power-on protection circuit to stop working when the power supply voltage of the power supply sub-circuit is greater than or equal to the preset voltage and lasts for a second time period in the power-on process of the display panel.
Based on the first aspect, in a first implementation manner of the first aspect, the power-on protection circuit includes a current obtaining module, a current comparing module, and a first timing control module; the current acquisition module is connected with the power supply sub-circuit and used for acquiring the real-time current value of the power supply current; the current comparison module is connected with the current acquisition module and used for outputting a first control signal when the real-time current value is greater than or equal to a preset current value of a preset current; the first timing control module is connected with the current comparison module and the power management circuit and used for controlling the power management circuit to stop supplying power to the data driver when the duration of the active level of the first control signal is the same as the first time period.
In a second implementation manner of the first aspect, based on the first implementation manner of the first aspect, the current obtaining module includes a voltage detecting unit and a piezoelectric converting unit; the voltage detection unit is connected with the power supply management circuit and is used for detecting a real-time voltage value in the power supply sub-circuit; the piezoelectric conversion unit is connected with the voltage detection unit and the current comparison module and is used for converting the real-time voltage value into a real-time current value.
In a third implementation manner of the first aspect, based on the second implementation manner of the first aspect, the first timing control module comprises a timing unit and a switch unit; the timing unit is connected with the output end of the current comparison module and used for calculating the effective level duration of the first control signal; the switch unit is connected with the timing unit and the starting control circuit and used for disconnecting the transmission path from the first control signal to the power management circuit when the power supply voltage of the power supply sub-circuit is greater than or equal to the preset voltage and lasts for a second time period in the starting process of the display panel.
Based on the third implementation manner of the first aspect, in a fourth implementation manner of the first aspect, the start-up control circuit includes a voltage obtaining module, a voltage comparing module and a second timing control module; the voltage acquisition module is connected with the power supply sub-circuit and used for generating corresponding real-time feedback voltage according to the real-time output voltage of the power supply sub-circuit; the voltage comparison module is connected with the voltage acquisition module and the power management circuit and is used for outputting a second control signal when the real-time feedback voltage is greater than or equal to a preset voltage; the second timing control module is connected with the voltage comparison module and the switch unit and used for calculating the effective level duration of the second control signal, and the effective level duration of the second control signal is the same as the second time period, so that the switch unit is controlled to be switched off.
In a fifth implementation manner of the first aspect, based on the second implementation manner of the first aspect, the voltage detection unit comprises a first transistor and a first resistor; one of a source/drain of the first transistor is connected to the power supply sub-circuit; the other of the source and the drain of the first transistor is connected with a first end of the first resistor and the piezoelectric conversion unit; the second end of the first resistor is grounded; the gate of the first transistor is used for connecting a third control signal.
In a sixth implementation form of the first aspect as such, the power supply sub-circuit comprises a second transistor and a third transistor; the power management circuit is connected with one of the source electrode and the drain electrode of the second transistor; the other of the source/drain of the second transistor is connected to one of the source/drain of the third transistor; the other of the source/drain of the third transistor is connected to the data driver; the output terminal of the power-on protection circuit is connected to one of the gate of the second transistor and the gate of the third transistor.
In a seventh implementation form of the first aspect based on the sixth implementation form of the first aspect, the power management circuit is connected to the other of the gate of the second transistor and the gate of the third transistor.
In an eighth implementation form of the first aspect based on any of the preceding implementation forms of the first aspect, the first time period is less than or equal to the second time period.
In a second aspect, the present application provides a display device including the display panel in any one of the above embodiments.
According to the display panel and the display device, in the starting process of the display panel, when the power supply current of the power supply sub-circuit is larger than or equal to the preset current and lasts for the first time period, the power supply management circuit is controlled to stop supplying power to the data driver, so that the power supply can be stopped in time under the condition that the COF is slightly damaged and is not enough to directly trigger the OCP and/or the UVP, the heat accumulation of the data driver and/or the COF is effectively reduced or eliminated, and the more serious damage condition can be avoided; when the power supply voltage of the power supply sub-circuit is greater than or equal to the preset voltage and lasts for a second time period, the power-on protection circuit is controlled to stop working, and when the situation that heat accumulation does not occur is detected, the power-on protection circuit is controlled to stop working in time so as to avoid influencing the normal work of the display panel.
Drawings
The technical solution and other advantages of the present application will become apparent from the detailed description of the embodiments of the present application with reference to the accompanying drawings.
Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present disclosure.
Fig. 2 is another schematic structural diagram of a display panel according to an embodiment of the present application.
Fig. 3 is a schematic structural diagram of a portion of the display panel in fig. 2.
Fig. 4 is another schematic structural diagram of the display panel in fig. 2.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Referring to fig. 1 to 4, as shown in fig. 1, the present embodiment provides a display panel, which includes a data driver 20, a power management circuit 10, a power protection circuit 30, and a power control circuit 40. The power management circuit 10 includes a power supply sub-circuit 101, and the power supply sub-circuit 101 is connected to the data driver 20 for supplying power to the data driver 20. The power-on protection circuit 30 is connected to the power management circuit 10, and is configured to control the power management circuit 10 to stop supplying power to the data driver 20 when a supply current of the power supply sub-circuit 101 is greater than or equal to a preset current Iref and lasts for a first time period in a power-on process of the display panel. The power-on control circuit 40 is connected to the power management circuit 10 and the power-on protection circuit 30, and is configured to control the power-on protection circuit 30 to stop working when the power supply voltage of the power supply sub-circuit 101 is greater than or equal to the preset voltage Vref and lasts for a second time period in the power-on process of the display panel.
It can be understood that, in the display panel provided in this embodiment, when the supply current of the power supply sub-circuit 101 is greater than or equal to the preset current Iref and lasts for the first time period during the power-on process of the display panel, the power supply management circuit 10 is controlled to stop supplying power to the data driver 20, so that when it is detected that the COF is slightly damaged and is not enough to directly trigger the OCP and/or the UVP, the power supply can be stopped in time, the heat accumulation of the data driver 20 and/or the COF is effectively reduced or eliminated, and a more serious damage situation can be avoided. When the power supply voltage of the power supply sub-circuit 101 is greater than or equal to the preset voltage Vref and lasts for the second time period, the power-on protection circuit 30 is controlled to stop working, and when it is detected that no heat accumulation occurs, the power-on protection circuit 30 is timely controlled to stop working so as to avoid affecting the normal work of the display panel.
As shown in fig. 2, in one embodiment, the power-on protection circuit 30 includes a current obtaining module 301, a current comparing module 302, and a first timing control module 303. The current obtaining module 301 is connected to the power supply sub-circuit 101, and is configured to obtain a real-time current value of the supply current. The current comparing module 302 is connected to the current obtaining module 301, and configured to output a first control signal when the real-time current value is greater than or equal to a preset current value of the preset current Iref. The first timing control module 303 is connected to the current comparing module 302 and the power management circuit 10, and is used for controlling the power management circuit 10 to stop supplying power to the data driver 20 when the active level duration of the first control signal is the same as the first time period.
It should be noted that the first control signal may be, but is not limited to, a square wave signal. When it is a square wave signal, its active level may be high or low. When the high potential of the square wave signal is effective, the duration of the effective level of the first control signal is the duration of the first high potential of the first control signal. Specifically, when the real-time current value is greater than or equal to the preset current value of the preset current Iref, the current comparing module 302 outputs the first control signal with a high voltage, at this time, the first timing control module 303 starts timing from the first rising edge, and when the high voltage of the first control signal lasts to the first time period, the first timing control module 303 may control the power management circuit 10 to stop supplying power to the data driver 20, so as to implement the power-on protection in this embodiment when the overcurrent protection and/or the overvoltage protection of the display panel are not triggered.
As shown in fig. 2, in one embodiment, the current obtaining module 301 includes a voltage detecting unit 3011 and a piezoelectric converting unit 3012. The voltage detection unit 3011 is connected to the power management circuit 10 and is configured to detect a real-time voltage value in the power supply sub-circuit 101. The piezoelectric conversion unit 3012 is connected to the voltage detection unit 3011 and the current comparison module 302, and is configured to convert the real-time voltage value into a real-time current value.
As shown in fig. 3, in one embodiment, the voltage detection unit 3011 includes a first transistor Q1 and a first resistor R1. One of the source/drain of the first transistor Q1 is connected to the power supply sub-circuit 101. The other of the source/drain of the first transistor Q1 is connected to a first terminal of the first resistor R1 and the piezoelectric conversion unit 3012. The second end of the first resistor R1 is grounded; the gate of the first transistor Q1 is used for receiving a third control signal.
It should be noted that the third control signal is used to turn on or turn off the first transistor Q1, which may be, but not limited to, a square wave signal or a pulse signal provided by the power management circuit 10, or provided by the power control circuit 40, when the power control circuit 40 needs to control the power protection circuit 30 to stop working, the first transistor Q1 may be controlled to be turned off, so that the supply current of the power sub-circuit 101 cannot be transmitted to the current comparison module 302, the supply current of the power sub-circuit 101 is smaller than the preset current Iref, and the timing condition of the first time period of the power protection circuit 30 cannot be met, so that the power protection circuit 30 will not control the power management circuit 10 to stop supplying power to the data driver 20 all the time, which also meets the requirements of the embodiments of the present application.
As shown in fig. 3, in one embodiment, the power supply sub-circuit 101 includes at least one of a second transistor Q2 and a third transistor. The power management circuit 10 is connected to one of the source/drain of the second transistor Q2. The other of the source/drain of the second transistor Q2 is connected to one of the source/drain of the third transistor. The other of the source/drain of the third transistor is connected to the data driver 20. An output terminal of the power-on protection circuit 30 is connected to one of the gate of the second transistor Q2 and the gate of the third transistor.
Note that the output terminal of the power-on protection circuit 30 is connected to one of the gate of the second transistor Q2 and the gate of the third transistor. The power-on protection circuit 30 can control the on/off of the power supply sub-circuit 101, so that the power-on protection circuit 30 controls the power management circuit 10 to stop supplying power to the data driver 20.
As shown in fig. 3, in one embodiment, the power supply sub-circuit 101 further includes a first inductor L1; a first terminal of the first inductor L1 is connected to the power management circuit 10, and a second terminal of the first inductor L1 is connected to one of the source/drain of the second transistor Q2.
It is understood that, in this embodiment, the first inductor L1 can filter out the interference of noise from inside and outside to the power supply sub-circuit 101.
As shown in fig. 3, in one embodiment, the power supply sub-circuit 101 further comprises a diode D1; the anode of the diode D1 is connected with the second end of the first inductor L1; the cathode of the diode D1 is connected to one of the source/drain of the second transistor Q2.
It is understood that in this embodiment, the diode D1 can prevent the current from flowing backward, which affects the normal operation of the power management circuit 10.
As shown in fig. 3, in one embodiment, one of the source/drain electrodes of the first transistor Q1 is connected to the anode of the diode D1.
As shown in fig. 3, in one embodiment, the power supply sub-circuit 101 further comprises a first capacitor C1; the first end of the first capacitor C1 is connected with the cathode of the diode D1; the second terminal of the first capacitor C1 is grounded.
It can be understood that the first capacitor C1 has a voltage stabilizing and filtering function, and can stabilize the power supply loop of the power supply sub-circuit 101.
As shown in fig. 3, in one embodiment, the power supply sub-circuit 101 further comprises a second capacitor C2; a first end of the second capacitor C2 is connected to the other of the source/drain of the third transistor; the second terminal of the second capacitor C2 is grounded.
It can be understood that the second capacitor C2 has a voltage stabilizing and filtering function, and can further stabilize the power supply loop of the power supply sub-circuit 101.
As shown in fig. 3, in one embodiment, the power supply sub-circuit 101 further comprises a third capacitor C3; a first end of the third capacitor C3 is connected to the other of the source/drain of the third transistor; the second terminal of the third capacitor C3 is grounded.
It can be understood that the third capacitor C3 has a voltage stabilizing and filtering function, which can further stabilize the power supply loop of the power supply sub-circuit 101.
In one embodiment, the power management circuit 10 may be, but is not limited to being, connected to the other of the gate of the second transistor Q2 and the gate of the third transistor.
It is understood that the power management circuit 10 can switch the power supply loop of the power supply sub-circuit 101 as required.
In one embodiment, the data driver 20 may also be connected to the other of the gate electrode of the second transistor Q2 and the gate electrode of the third transistor. For example, the GD signal from the data driver 20 may be switched on for the gate of the second transistor Q2 as shown in fig. 3.
It will be appreciated that the data driver 20 may switch its own power supply loop on and off as required.
In one embodiment, the first timing control module 303 includes a timing unit 3031 and a switch unit 3032. The timing unit 3031 is connected to the output terminal of the current comparing module 302, and is configured to calculate the active level duration of the first control signal. The switch unit 3032 is connected to the timing unit 3031 and the power-on control circuit 40, and is configured to disconnect a transmission path from the first control signal to the power management circuit 10 when the supply voltage of the power supply sub-circuit 101 is greater than or equal to the preset voltage Vref and lasts for a second time period in the power-on process of the display panel.
It should be noted that, in this embodiment, the switch unit 3032 may be, but is not limited to, a normally-closed switch, and the normally-closed switch is controlled to be turned off when the power supply voltage of the power supply sub-circuit 101 is greater than or equal to the preset voltage Vref and lasts for the second time period during the power-on process of the display panel. The first timing control module 303 can, but is not limited to, control the power management circuit 10 to stop supplying power, or stop working, or stop outputting using the first control signal. In the process of starting up the display panel, when the power supply voltage of the power supply sub-circuit 101 is greater than or equal to the preset voltage Vref and lasts for the second time period, the first timing control module 303 may further select another control signal to control the power management circuit 10 to stop supplying power.
The timing unit 3031 may be, but not limited to, a timer, and may also be other timing circuits capable of implementing a timing function in the present application.
As shown in fig. 2, in one embodiment, the power-on control circuit 40 includes a voltage obtaining module 401, a voltage comparing module 402, and a second timing control module 403. The voltage obtaining module 401 is connected to the power supply sub-circuit 101, and is configured to generate a corresponding real-time feedback voltage according to the real-time output voltage of the power supply sub-circuit 101. The voltage comparison module 402 is connected to the voltage obtaining module 401 and the power management circuit 10, and configured to output a second control signal when the real-time feedback voltage is greater than or equal to the preset voltage Vref. The second timing control module 403 is connected to the voltage comparison module 402 and the switch unit 3032, and is configured to calculate an active level duration of the second control signal, and control the switch unit 3032 to turn off when the active level duration of the second control signal is the same as the second time period.
As shown in fig. 4, in one embodiment, the voltage obtaining module 401 includes a second resistor R2 and a third resistor R3; a first end of the second resistor R2 is connected with a first end of the second capacitor C2; the second end of the second resistor R2 is connected to the first end of the third resistor R3 and the voltage comparison module 402; the second end of the third resistor R3 is grounded.
The voltage comparing module 402 may be, but not limited to, a voltage comparator, and may also be other voltage comparing circuits capable of performing a voltage comparing function.
The second timing control module 403 may be, but not limited to, a timer, and may also be other timing circuits. It is understood that the second timing control module 403 may control the on/off of the switch unit 3032 by using the second control signal. The second timing control module 403 may further generate another control signal to implement on-off control of the switch unit 3032 according to that the real-time feedback voltage is greater than or equal to the preset voltage Vref, and the duration of the effective level of the second control signal is the same as the second time period.
In one embodiment, the power management circuit 10 may provide a corresponding preset current Iref and/or a preset voltage Vref. It can be understood that the specific value of the preset current Iref needs to be reasonably determined according to the power supply sub-circuit 101 itself and the magnitude of the capacitance supplied by the power supply sub-circuit, and it can be understood that different products need to be obtained through multiple tests. Similarly, the specific value of the preset voltage Vref needs to be selected to determine whether the output voltage of the power supply sub-circuit 101 is stable. For example, when the real-time feedback voltage is greater than or equal to the preset voltage Vref, it indicates that the output voltage of the power supply sub-circuit 101 is stable, and also indicates that the COF is not slightly damaged, at this time, the power-on protection circuit 30 is not required to protect the display panel, and therefore, in this case, the power-on protection circuit 30 can be controlled to be in the non-operating state.
In one embodiment, the current value range of the preset current Iref may be, but is not limited to, 0.5A to 1.5A. Specifically, the current value of the preset current Iref may be 1A.
In one embodiment, the preset voltage Vref may have a voltage value range of, but is not limited to, 0.5V to 1.8V. Specifically, the voltage value of the preset voltage Vref may be 0.6V or 1.2V.
In one embodiment, the first time period is less than or equal to the second time period.
It should be noted that the first time period may be an effective level duration of the first control signal, and a value of the first time period may range from 0.1 microsecond to 0.6 microsecond, and specifically, a value of the first time period may be 0.3 microsecond. The second time period may be an effective level duration of the second control signal, and a value of the second time period may range from 0.1 microseconds to 0.7 microseconds, and specifically, a value of the second time period may also be 0.3 microseconds.
In one embodiment, the present application provides a display device including the display panel in any one of the above embodiments.
It can be understood that, in the display device provided in this embodiment, the power management circuit 10 is also controlled to stop supplying the data driver 20 when the supply current of the power supply sub-circuit 101 is greater than or equal to the preset current Iref and lasts for the first time period in the process of starting up the display panel, so that the power supply can be stopped in time when it is detected that the COF is slightly damaged and is insufficient to directly trigger the OCP and/or UVP, thereby effectively reducing or eliminating the heat accumulation of the data driver 20 and/or the COF, and avoiding a more serious damage condition; when the power supply voltage of the power supply sub-circuit 101 is greater than or equal to the preset voltage Vref and lasts for the second time period, the power-on protection circuit 30 is controlled to stop working, and when it is detected that no heat accumulation occurs, the power-on protection circuit 30 is timely controlled to stop working so as to avoid affecting the normal working of the display panel.
In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to the related descriptions of other embodiments.
The display panel and the display device provided in the embodiments of the present application are described in detail above, and specific examples are applied herein to explain the principles and embodiments of the present application, and the description of the embodiments is only used to help understanding the technical solutions and their core ideas of the present application; those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications or substitutions do not depart from the spirit and scope of the present disclosure as defined by the appended claims.
Claims (8)
1. A display panel, comprising:
a data driver;
the power supply management circuit comprises a power supply sub-circuit which is connected with the data driver and used for supplying power to the data driver;
the power-on protection circuit is connected with the power management circuit and is used for controlling the power management circuit to stop supplying power to the data driver when the power supply current of the power supply sub-circuit is greater than or equal to a preset current and lasts for a first time period in the power-on process of the display panel; and
the power-on control circuit is connected with the power management circuit and the power-on protection circuit and is used for controlling the power-on protection circuit to stop working when the power supply voltage of the power supply sub-circuit is greater than or equal to a preset voltage and lasts for a second time period in the power-on process of the display panel;
wherein, the protection circuit of starting up includes:
the current acquisition module is connected with the power supply sub-circuit and used for acquiring the real-time current value of the power supply current;
the current comparison module is connected with the current acquisition module and used for outputting a first control signal when the real-time current value is greater than or equal to a preset current value of the preset current; and
the first timing control module is connected with the current comparison module and the power management circuit and used for controlling the power management circuit to stop supplying power to the data driver when the duration of the active level of the first control signal is the same as the first time period;
wherein the first timing control module includes:
the timing unit is connected with the output end of the current comparison module and is used for calculating the effective level duration of the first control signal; and
and the switch unit is connected with the timing unit and the starting control circuit and used for disconnecting the transmission path from the first control signal to the power management circuit when the power supply voltage of the power supply sub-circuit is greater than or equal to a preset voltage and lasts for a second time period in the starting process of the display panel.
2. The display panel according to claim 1, wherein the current obtaining module comprises:
the voltage detection unit is connected with the power supply management circuit and is used for detecting a real-time voltage value in the power supply sub-circuit; and
and the piezoelectric conversion unit is connected with the voltage detection unit and the current comparison module and is used for converting the real-time voltage value into the real-time current value.
3. The display panel according to claim 2, wherein the power-on control circuit comprises:
the voltage acquisition module is connected with the power supply sub-circuit and used for generating corresponding real-time feedback voltage according to the real-time output voltage of the power supply sub-circuit;
the voltage comparison module is connected with the voltage acquisition module and the power management circuit and used for outputting a second control signal when the real-time feedback voltage is greater than or equal to the preset voltage; and
and the second timing control module is connected with the voltage comparison module and the switch unit and used for calculating the effective level duration of the second control signal, and the effective level duration of the second control signal is the same as the second time period, so that the switch unit is controlled to be switched off.
4. The display panel according to claim 3, wherein the voltage detection unit includes a first transistor and a first resistor;
one of a source/drain of the first transistor is connected to the power supply sub-circuit; the other of the source/drain of the first transistor is connected with the first end of the first resistor and the piezoelectric conversion unit; the second end of the first resistor is grounded; the gate of the first transistor is used for switching in a third control signal.
5. The display panel according to claim 1, wherein the power supply sub-circuit comprises a second transistor and a third transistor;
the power management circuit is connected with one of a source/drain of the second transistor; the other of the source/drain of the second transistor is connected to one of the source/drain of the third transistor; the other of the source/drain of the third transistor is connected to the data driver; an output terminal of the power-on protection circuit is connected to one of a gate of the second transistor and a gate of the third transistor.
6. The display panel according to claim 5, wherein the power supply management circuit is connected to the other of the gate of the second transistor and the gate of the third transistor.
7. The display panel according to any one of claims 1 to 6, wherein the first period of time is less than or equal to the second period of time.
8. A display device characterized by comprising the display panel according to any one of claims 1 to 7.
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| KR102016153B1 (en) * | 2013-05-10 | 2019-08-30 | 삼성디스플레이 주식회사 | Display device, control device for driving the display device, and control method thereof |
| KR102239898B1 (en) * | 2014-09-01 | 2021-04-13 | 엘지디스플레이 주식회사 | Organic light emitting display device with current protection circuit |
| CN107527602B (en) * | 2017-09-30 | 2019-07-16 | 深圳市华星光电半导体显示技术有限公司 | Liquid crystal display panel and switching on and shutting down control circuit |
| CN109103842B (en) * | 2018-09-03 | 2019-09-13 | 重庆惠科金渝光电科技有限公司 | Overcurrent protection driving circuit and display device |
| CN109616061B (en) * | 2018-12-24 | 2024-04-26 | 惠科股份有限公司 | Source electrode driving chip protection circuit, display panel driving circuit and display device |
| CN109637412B (en) * | 2018-12-25 | 2020-10-30 | 惠科股份有限公司 | Overcurrent protection method of display panel and display device |
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