CN112989738B - Improved method for convergence judgment of Newton iteration in circuit simulation - Google Patents

Improved method for convergence judgment of Newton iteration in circuit simulation Download PDF

Info

Publication number
CN112989738B
CN112989738B CN202110389650.XA CN202110389650A CN112989738B CN 112989738 B CN112989738 B CN 112989738B CN 202110389650 A CN202110389650 A CN 202110389650A CN 112989738 B CN112989738 B CN 112989738B
Authority
CN
China
Prior art keywords
newton
iteration
circuit simulation
convergence
gap
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202110389650.XA
Other languages
Chinese (zh)
Other versions
CN112989738A (en
Inventor
程明厚
周振亚
吴大可
李骥
王鹏飞
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Beijing Empyrean Technology Co Ltd
Original Assignee
Beijing Empyrean Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Beijing Empyrean Technology Co Ltd filed Critical Beijing Empyrean Technology Co Ltd
Priority to CN202110389650.XA priority Critical patent/CN112989738B/en
Publication of CN112989738A publication Critical patent/CN112989738A/en
Application granted granted Critical
Publication of CN112989738B publication Critical patent/CN112989738B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/36Circuit design at the analogue level
    • G06F30/367Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

The invention provides an improved method for judging convergence of Newton iteration in circuit simulation, which comprises the following steps: 1) computing the residual sum of Newton iterations in a circuit simulationA gap; 2) judging the convergence of Newton iteration according to a convergence criterion; in the circuit simulation, the residual error of Newton iteration is the sum of the currents of all branches of the node k, and is marked as I (v) k ) (ii) a The gap of Newton iteration in circuit simulation refers to the voltage difference of two adjacent Newton iterations, and is recorded as delta v k . The invention can reduce the times of non-convergence and greatly improve the calculation efficiency.

Description

Improved method for convergence judgment of Newton iteration in circuit simulation
Technical Field
The invention belongs to the field of Integrated Circuit Computer Aided Design (Integrated Circuit/Computer Aided Design), in particular to the technical field of Electronic Design Automation (EDA) Circuit simulation, and particularly relates to an improved method for convergence judgment of Newton iteration in Circuit simulation.
Background
The circuit simulation tool spice is a set of simulation tools which establish a set of differential equations based on kirchhoff current law according to the connection relation of electronic elements in the circuit and solve the differential equations. On the time scale, the original differential equation set is dispersed according to a numerical integration method, so that a nonlinear equation set which is satisfied by the circuit at each working point is obtained. And solving the nonlinear equation set by a Newton-Raphson method to obtain the voltage of each node in the circuit at the working point. The Newton-Raphson method is a very practical and classical iterative solution method. And setting corresponding stopping criteria as the criterion for judging convergence of the iterative method.
Due to the electrical characteristics of electronic components, there are instances where there is a sudden change in current or conductance at certain voltages. This results in the Newton-Raphson algorithm having difficulty meeting the convergence criteria during spice simulation. Therefore, special judgment criteria need to be adopted to allow the whole simulation to proceed. Thereby allowing the design engineer to refine the circuit design based on the overall simulation results.
Disclosure of Invention
In order to solve the defects in the prior art, the invention aims to provide an improved method for judging convergence of Newton iteration in circuit simulation, which reduces the times of non-convergence and greatly improves the calculation efficiency.
In order to achieve the above object, the present invention provides an improved method for convergence determination of newton iteration in circuit simulation, comprising the following steps:
1) calculating residual errors and gaps of Newton iteration in circuit simulation;
2) judging the convergence of Newton iteration according to a convergence criterion;
in the circuit simulation, the residual error of Newton iteration is the sum of the currents of all branches of the node k, and is marked as I (v) k ) (ii) a The gap of Newton iteration in circuit simulation refers to the voltage difference of two adjacent Newton iterations, and is recorded as delta v k
Further, calculating the residual error of Newton iteration in circuit simulation, including calculating weighted infinite norm of the whole residual error according to the reference tolerance of each node, and obtaining the relative worst residual error.
Further, the calculation of the gaps of Newton iteration in the circuit simulation includes calculating weighted infinite norms of the overall gaps according to the reference tolerance of each node, and obtaining the relatively worst gaps.
Further, the step 2) includes formula (1) and formula (2), where formula (1) is as follows:
|I(v k )|≤reltol*absMaxI k +absi (1)
wherein, I (v) k ) Refers to the sum of the currents of all branches of node k, reltol refers to the relative error, absMaxI k Refers to the reference current value, absi refers to the first absolute error;
equation (2) is as follows:
|Δv k |≤reltol*referenceV k +absv (2)
wherein, Δ v k Is referred to as the gap, referenceV k Refers to a reference voltage value; absv refers to the second absolute error.
Further, the method comprises the following steps:
51) if the residual error meets the formula (1) and the gap meets the formula (2) in the iteration process, judging that the Newton iteration at the moment meets the standard convergence condition of the Newton-Raphson iteration, and normally terminating the iteration algorithm:
52) if the residual error meets the formula (1) but the gap does not meet the formula (2) in the iteration process, judging that the Newton iteration meets the Newton iteration convergence condition at the moment, and normally terminating the iteration algorithm;
53) and if the residual does not satisfy the formula (1) but the gap satisfies the formula (2) in the iteration process, judging whether iteration is converged according to the circuit simulation precision.
Further, absMaxI k The maximum value of the absolute value of each branch current of the current node can be taken, and the reltol, the absi and the absv can be respectively set to different fixed values; preferencev k The current signal history maximum value or the maximum value of the excitation source voltage in the circuit can be taken.
In order to achieve the above object, the present invention further provides an apparatus for determining convergence of newton iteration in circuit simulation, including a memory and a processor, where the memory stores a program running on the processor, and the processor executes the steps of the improved method for determining convergence of newton iteration in circuit simulation.
To achieve the above object, the present invention also provides a computer readable storage medium having stored thereon computer instructions which, when executed, perform the steps of the improved method for convergence determination for newton iterations in circuit simulation described above.
Has the advantages that: the method can be used for judging whether the current working state is correct or not under the condition that the standard Newton-Raphson convergence criterion is not satisfied and if the residual error is small enough. Therefore, the times of non-convergence are reduced, and the calculation efficiency is greatly improved.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.
Drawings
The accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention and not to limit the invention. In the drawings:
FIG. 1 is a flow chart of an improved method of convergence determination for Newton iterations in a circuit simulation in accordance with the present invention;
FIG. 2 is a diagram of a function that normally converges;
FIG. 3 is a diagram illustrating slow convergence as a function of time;
fig. 4 is a diagram illustrating the singular point of the function.
Detailed Description
The preferred embodiments of the present invention will be described in conjunction with the accompanying drawings, and it should be understood that they are presented herein only to illustrate and explain the present invention and not to limit the present invention.
Fig. 1 is a flowchart of an improved method for convergence determination of newton iterations in circuit simulation according to the present invention, and the improved method for convergence determination of newton iterations in circuit simulation of the present invention will be described in detail with reference to fig. 1.
In the Newton-Raphson iterative algorithm, the convergence judgment is divided into two aspects, on one hand, whether the kirchhoff current law is satisfied, namely whether the current summation of the nodes is small enough, and whether the residual error is small enough is called; the other side is whether the variation of the node voltage is small enough in the iterative process, which is called whether the gap is small enough.
In the improved method for determining convergence of newton iterations in circuit simulation of the present invention, in step 11, the residual error and gap of newton iterations in circuit simulation are first calculated.
As described above, determining whether the residual error is small enough determines whether the current of kirchhoff's current law is small enough, and therefore, the residual error value corresponding to each newton iteration, i.e., I (v) needs to be calculated k ) Calculating residual errors corresponding to each iteration, including calculating weighted infinite norm of the whole residual errors according to the reference tolerance of each node to obtain the relative worst residual errors;
in addition, the gap for each newton iteration also needs to be calculated. The gap refers to the variation of the node voltage, which is represented by Δ V, and is equal to the voltage difference of two adjacent Newton iterations, wherein the gap corresponding to each iteration is calculated, and the weighted infinite norm of the whole gap is calculated according to the reference tolerance of each node, so that the relatively worst gap is obtained.
In step 12, the convergence of the newton iterations is determined according to the convergence criterion.
In the circuit simulation process, the method of the invention judges the convergence as follows:
1) if the residual error and the gap simultaneously meet the condition of being small enough in the iteration process, the Newton iteration at the moment is judged to meet the standard convergence condition of the Newton-Raphson iteration, and the iteration algorithm is normally terminated, as shown in the condition of FIG. 2.
The residual satisfying a sufficiently small condition means that the residual satisfies a residual convergence criterion (the goal is to satisfy kcl's equation, i.e. the node current sum is 0) as follows:
|I(v k )|≤reltol*absMaxI k +absi
wherein, I (v) k ) Refers to the sum of the currents of all branches of node k; relatol refers to the relative error (default 1 e-3); absMaxI k Refers to a reference current value (may be the maximum of the absolute value of each branch current of the current node, etc.); absi refers to an absolute error (default value 1 e-9).
A sufficiently small gap generally means that the gap meets the gap convergence criterion, which is as follows:
|Δv k |≤reltol*referenceV k +absv
where Δ V refers to the gap, i.e., the voltage difference between two adjacent Newton iterations, referenceV k A reference voltage value (the current signal history maximum value can be taken, or the maximum value of the voltage of an excitation source in a circuit and the like); absv refers to an absolute error (default value 1 e-6).
2) If the residual error is small enough but the gap is not small enough in the iteration process, the Newton iteration convergence condition is satisfied, and the iteration algorithm is normally terminated; the current iteration state can be accepted because the residual is small enough to state that kirchhoff's current law at the current operating point is satisfied. As shown in the example of fig. 3, the function changes very slowly as it approaches the solution, and even if v changes greatly, the function value does not change much, and at this time, if the function value is small, it can be considered as converged.
3) If the residual error is not small enough but the gap is small enough during the iteration, as shown in fig. 4, it is illustrated that the iteration enters a position of a local minimum point; as shown in the example of fig. 4, where the function exhibits singularities, the derivative is very large, resulting in large variations in the function values even if v varies very little, which generally corresponds to the equation smoothness of the model in spice simulation being not good. At this time, if the requirement of the circuit simulation precision is not high and the residual error is not too large, the convergence condition is also considered to be met; the iterative algorithm is normally terminated; and if the circuit simulation precision requirement is higher, the iteration is considered not to be converged.
V0, v1, and v2 in fig. 2-4 refer to voltage values for three corresponding iterations in the course of a newton iteration in the one-dimensional case.
The invention also provides a device for judging convergence of Newton iteration in circuit simulation, which comprises a memory and a processor, wherein the memory is stored with a program running on the processor, and the processor executes the steps of the improved method for judging the convergence of Newton iteration in circuit simulation when running the program.
The present invention further provides a computer-readable storage medium, on which computer instructions are stored, where the computer instructions, when executed, perform the steps of the above-mentioned method for improving the convergence determination of newton iterations in circuit simulation, and the method for improving the convergence determination of newton iterations in circuit simulation is described in the foregoing paragraphs, and is not described in detail again.
Those of ordinary skill in the art will understand that: although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that modifications may be made to the embodiments described above, or equivalents may be substituted for elements thereof. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (3)

1. An improved method for convergence determination of newton iterations in circuit simulation, comprising the steps of:
1) calculating residual errors and gaps of Newton iteration in circuit simulation;
2) judging the convergence of Newton iteration according to a convergence criterion;
in the circuit simulation, the residual error of Newton iteration is the sum of the currents of all branches of the node k, and is marked as I (v) k ) (ii) a The gap of Newton iteration in circuit simulation refers to the voltage difference of two adjacent Newton iterations, and is recorded as delta v k
Calculating the residual error of Newton iteration in circuit simulation, wherein the calculation comprises calculating weighted infinite norm of the whole residual error according to the reference tolerance of each node to obtain the relative worst residual error;
calculating the gaps of Newton iteration in circuit simulation, including calculating weighted infinite norm of the whole gap according to the reference tolerance of each node to obtain the relative worst gap;
the step 2) comprises a formula (1) and a formula (2), wherein the formula (1) is as follows:
|I(v k )|≤reltol*absMaxI k +absi (1)
wherein, I (v) k ) Refers to the sum of the currents of all branches of node k, reltol refers to the relative error, absMaxI k Referring to a reference current value which is the maximum value of the absolute value of each branch current of the current node, wherein abu refers to a first absolute error; respectively setting the reltol, the absi and the absv as different fixed values;
equation (2) is as follows:
|Δv k |≤reltol*referenceV k +absv (2)
wherein, Δ v k Is referred to as the gap, referenceV k The reference voltage value is the current signal history maximum value or the maximum value of the voltage of an excitation source in the circuit; absv means second absoluteAn error;
if the residual error meets the formula (1) and the gap meets the formula (2) in the iteration process, judging that the Newton iteration at the moment meets the standard convergence condition of the Newton-Raphson iteration, and normally terminating the iteration algorithm;
if the residual error meets the formula (1) but the gap does not meet the formula (2) in the iteration process, judging that the Newton iteration meets the Newton iteration convergence condition at the moment, and normally terminating the iteration algorithm;
and if the residual does not satisfy the formula (1) but the gap satisfies the formula (2) in the iteration process, judging whether iteration is converged according to the circuit simulation precision.
2. An apparatus for convergence determination of newton iterations in a circuit simulation, comprising a memory and a processor, the memory having stored thereon a program for execution on the processor, the processor executing the program to perform the steps of the improved method for convergence determination of newton iterations in a circuit simulation of claim 1.
3. A computer readable storage medium having computer instructions stored thereon, wherein the computer instructions when executed perform the steps of the method for improving convergence determination for newton's iterations in circuit simulation of claim 1.
CN202110389650.XA 2021-04-12 2021-04-12 Improved method for convergence judgment of Newton iteration in circuit simulation Active CN112989738B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202110389650.XA CN112989738B (en) 2021-04-12 2021-04-12 Improved method for convergence judgment of Newton iteration in circuit simulation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202110389650.XA CN112989738B (en) 2021-04-12 2021-04-12 Improved method for convergence judgment of Newton iteration in circuit simulation

Publications (2)

Publication Number Publication Date
CN112989738A CN112989738A (en) 2021-06-18
CN112989738B true CN112989738B (en) 2022-08-23

Family

ID=76337980

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202110389650.XA Active CN112989738B (en) 2021-04-12 2021-04-12 Improved method for convergence judgment of Newton iteration in circuit simulation

Country Status (1)

Country Link
CN (1) CN112989738B (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101770531A (en) * 2008-12-30 2010-07-07 北京华大九天软件有限公司 Method for improving circuit emulation run speed

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101770532A (en) * 2008-12-30 2010-07-07 北京华大九天软件有限公司 Method for improving circuit emulator convergence
US20110257943A1 (en) * 2010-04-16 2011-10-20 Texas Instruments Incorporated Node-based transient acceleration method for simulating circuits with latency
US9002692B2 (en) * 2012-03-13 2015-04-07 Synopsys, Inc. Electronic circuit simulation method with adaptive iteration
US20150168465A1 (en) * 2013-12-13 2015-06-18 General Electric Company Method and apparatus for electric power system distribution state estimations

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101770531A (en) * 2008-12-30 2010-07-07 北京华大九天软件有限公司 Method for improving circuit emulation run speed

Also Published As

Publication number Publication date
CN112989738A (en) 2021-06-18

Similar Documents

Publication Publication Date Title
Stott Power system dynamic response calculations
US11293986B2 (en) System and method for estimating temperature and heat loss in electric motors
Boggs et al. A global convergence analysis of an algorithm for large-scale nonlinear optimization problems
CN108565852B (en) Three-stage progressive fault screening and sorting method for large power grid voltage stability evaluation
Borchers Symbolic behavioral model generation of nonlinear analog circuits
US7194394B2 (en) Method and apparatus for detecting and correcting inaccuracies in curve-fitted models
US6014505A (en) Automated method for optimizing characteristics of electronic circuits
CN112989738B (en) Improved method for convergence judgment of Newton iteration in circuit simulation
JP5358668B2 (en) Power system stable equilibrium point calculation device
Shen et al. Accurate polynomial approximation of bifurcation hypersurfaces in parameter space for small signal stability region considering wind generation
Zarate et al. Fast computation of security margins to voltage collapse based on sensitivity analysis
CN113033128B (en) Method for selecting initial value of Newton iteration in circuit simulation
KR20000023565A (en) Method and arrangement for computer-aided determination of a system relationship function
Kahng et al. Optimal equivalent circuits for interconnect delay calculations using moments
CN113032722B (en) Method for reducing matrix decomposition in circuit simulation
CN113032718B (en) Method and device for solving Newton iteration algorithm dead loop in circuit simulation
CN111414724B (en) Circuit simulation optimization method
CN113255268B (en) Method for detecting and repairing transient analysis non-convergence in circuit simulation
Hashimoto et al. Timing analysis considering spatial power/ground level variation
Guibert et al. Adaptive parareal for systems of ODEs
CN113346502B (en) Adaptive variable-step-length power grid static voltage stability boundary prediction method and device
Valenta et al. Adaptive solution of the wave equation
US20240035932A1 (en) Method of Generating A Thermal Model of A System Comprising An Electrical Machine
Hu Momentum Method for Improving the Convergence of Newton-Raphson Method for Nonlinear Circuit Transient Simulations
CN114336629A (en) Coordination combination parameterization strategy applied to continuous power flow calculation

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant