CN112964974A - Semiconductor test monitoring method, device, equipment and storage medium - Google Patents
Semiconductor test monitoring method, device, equipment and storage medium Download PDFInfo
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Abstract
The embodiment of the application provides a semiconductor test monitoring method, a device, equipment and a storage medium, wherein the semiconductor test monitoring method comprises the following steps: acquiring state data and information of a tested object of a testing machine; reading a parameter configuration rule corresponding to the information of the object to be measured in a preset database; judging whether the state data accords with the parameter configuration rule or not; and when the state data does not accord with the parameter configuration rule, sending a shutdown instruction and an alarm instruction to the tester. The application realizes timely discovery of the abnormity of the testing machine and improves the accuracy of the test result.
Description
Technical Field
The present application relates to the field of semiconductor technologies, and in particular, to a method, an apparatus, a device, and a storage medium for monitoring a semiconductor test.
Background
In recent years, with the continuous development of semiconductor technology, integrated circuits are widely used in a plurality of fields such as information technology, electronic products, communication and the like, and the progress of scientific technology and the development of social economy are greatly promoted. At present, in the production process of an integrated circuit, the integrated circuit after being packaged needs to be tested for functions and appearance so as to ensure the quality of a final product, the test is generally performed by a testing machine, and different products have different quality requirements and correspond to different detection items or test parameters. In the prior art, the test content of the test machine is artificially and wrongly modified or fails, and if the test content is not found in time, the test result is abnormal, and the product quality is influenced.
Disclosure of Invention
An object of the embodiments of the present application is to provide a method, an apparatus, a device and a storage medium for monitoring a semiconductor test, so as to find an abnormality of a tester in time and improve accuracy of a test result.
A first aspect of an embodiment of the present application provides a semiconductor test monitoring method, including: acquiring state data and information of a tested object of a testing machine; reading a parameter configuration rule corresponding to the information of the object to be measured in a preset database; judging whether the state data accords with the parameter configuration rule or not; and when the state data does not accord with the parameter configuration rule, sending a shutdown instruction and an alarm instruction to the tester.
In an embodiment, the acquiring the state data and the measured object information of the testing machine includes: and when the testing machine starts to test, acquiring the state data and the information of the tested object of the testing machine.
In an embodiment, the acquiring the state data and the measured object information of the testing machine includes: and acquiring state data and information of the tested object of the tester every preset time after the tester starts testing.
In an embodiment, after sending a shutdown command and an alarm command to the tester when the status data does not meet the parameter configuration rule, the method further includes: generating alarm information, wherein the alarm information comprises abnormal state information and abnormal reasons; receiving processing feedback information input by a user according to the alarm information; and sending an alarm releasing instruction to the testing machine according to the processing feedback information.
A second aspect of the embodiments of the present application provides a semiconductor test monitoring apparatus, including: the acquisition module is used for acquiring the state data of the tester and the information of the tested object; the reading module is used for reading a parameter configuration rule corresponding to the information of the object to be measured in a preset database; the judging module is used for judging whether the state data accords with the parameter configuration rule or not; and the first sending module is used for sending a shutdown instruction and an alarm instruction to the tester when the state data does not accord with the parameter configuration rule.
In one embodiment, the obtaining module is configured to: and when the testing machine starts to test, acquiring the state data and the information of the tested object of the testing machine.
In one embodiment, the obtaining module is configured to: and acquiring state data and information of the tested object of the tester every preset time after the tester starts testing.
In one embodiment, the method further comprises: the generating module is used for generating alarm information, and the alarm information comprises abnormal state information and abnormal reasons; the receiving module is used for receiving processing feedback information input by a user according to the alarm information; and the second sending module is used for sending an alarm releasing instruction to the testing machine according to the processing feedback information.
A third aspect of embodiments of the present application provides an electronic device, including: a memory to store a computer program; a processor configured to perform the method of the first aspect of the embodiments of the present application and any of the embodiments of the present application.
A fourth aspect of embodiments of the present application provides a non-transitory electronic device-readable storage medium, including: a program which, when run by an electronic device, causes the electronic device to perform the method of the first aspect of an embodiment of the present application and any embodiment thereof.
The semiconductor test monitoring method, the device, the equipment and the storage medium provided by the embodiment of the application have at least the following beneficial effects: according to the method and the device, whether the state data accord with the parameter configuration rule or not is judged by acquiring the state data and the information of the tested object of the testing machine and the preset parameter configuration rule, if the state data do not accord with the parameter configuration rule, a shutdown instruction and an alarm instruction are sent to the testing machine to shut down the testing machine, and related technicians are informed of the existence of abnormity in the testing machine in time through alarming, so that the technicians can handle the abnormal condition in time, the accuracy of a testing result is improved, and the quality problem of finished products caused by abnormal testing is avoided.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments of the present application will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and that those skilled in the art can also obtain other related drawings based on the drawings without inventive efforts.
Fig. 1 is a schematic structural diagram of an electronic device according to an embodiment of the present application;
FIG. 2 is a schematic structural diagram of a semiconductor test monitoring system according to an embodiment of the present application;
FIG. 3 is a flowchart illustrating a semiconductor test monitoring method according to an embodiment of the present application;
FIG. 4 is a schematic flowchart illustrating a semiconductor test monitoring method according to another embodiment of the present application;
fig. 5 is a schematic structural diagram of a semiconductor test monitoring apparatus according to an embodiment of the present application.
Reference numerals:
100-electronic equipment, 110-bus, 120-processor, 130-memory, 200-semiconductor test monitoring system, 210-computer, 220-tester, 221-IO control card, 222-alarm device, 230-PLC controller, 500-semiconductor test monitoring device, 510-acquisition module, 520-reading module, 530-judgment module, 540-first sending module, 550-generation module, 560-receiving module and 570-second sending module.
Detailed Description
The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application.
In the description of the present application, the terms "first," "second," and the like are used for distinguishing between descriptions and do not denote an order of magnitude, nor are they to be construed as indicating or implying relative importance.
In the description of the present application, the terms "comprises," "comprising," and/or the like, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, steps, operations, elements, components, and/or groups thereof.
In the description of the present application, the terms "mounted," "disposed," "provided," "connected," and "configured" are to be construed broadly unless expressly stated or limited otherwise. For example, it may be a fixed connection, a removable connection, or a unitary construction; can be mechanically or electrically connected; either directly or indirectly through intervening media, or may be internal to two devices, elements or components. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as appropriate.
Please refer to fig. 1, which is a schematic structural diagram of an electronic device 100 according to an embodiment of the present application, and includes at least one processor 120 and a memory 130, where fig. 1 illustrates one processor as an example. The processors 120 and the memory 130 are coupled by a bus 110, and the memory 130 stores instructions executable by the at least one processor 120, the instructions being executable by the at least one processor 120 to cause the at least one processor 120 to perform a semiconductor test monitoring method as in the embodiments described below.
In one embodiment, the Processor 120 may be a general-purpose Processor, including but not limited to a Central Processing Unit (CPU), a Network Processor (NP), etc., a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), an off-the-shelf Programmable Gate Array (FPGA) or other Programmable logic device, discrete Gate or transistor logic, discrete hardware components, etc. The general purpose processor may be a microprocessor or the processor may be any conventional processor or the like, and the processor 120 is the control center of the electronic device 100 and connects the various parts of the entire electronic device 100 using various interfaces and lines. The processor 120 may implement or perform the methods, steps, and logic blocks disclosed in the embodiments of the present application.
In one embodiment, the Memory 130 may be implemented by any type of volatile or non-volatile Memory device or combination thereof, including but not limited to Random Access Memory (RAM), Read Only Memory (ROM), Static Random Access Memory (SRAM), Programmable Read-Only Memory (PROM), Erasable Read-Only Memory (EPROM), electrically Erasable Read-Only Memory (EEPROM), and the like.
The structure of the electronic device 100 shown in fig. 1 is merely illustrative, and the electronic device 100 may also include more or fewer components than shown in fig. 1, or have a different configuration than shown in fig. 1. The components shown in fig. 1 may be implemented in hardware, software, or a combination thereof.
As shown in fig. 2, which is a schematic structural diagram of a semiconductor test monitoring system 200 according to an embodiment of the present disclosure, the semiconductor test monitoring system 200 may include a computer 210, a testing machine 220, and a PLC Controller 230(Programmable Logic Controller), where the computer 210 includes a host, a display, a keyboard, and a mouse, the testing machine 220 includes an IO control card 221 and an alarm device 222, the computer 210 is connected to the PLC Controller 230 through a USB (Universal Serial Bus) interface, the PLC Controller 230 is connected to the IO control card 221 of the testing machine 220 and the alarm device 222, and the IO control card 221 communicates with the computer 210 through a data line.
In one embodiment, the alarm device 222 can be, but is not limited to, a three-color light, an audible and visual alarm, a buzzer, and other alarm devices that can emit an optical signal and/or an acoustic signal.
In an embodiment, the computer 210 is installed with test software having functions of calling a test program and setting test parameters, and a technician can select a test item of the testing machine 220, set test parameters of the testing machine 220, and view a test result of the testing machine 220 through a user operation interface of the test software.
In an embodiment, the computer 210 may obtain the state data of the testing machine 220 and the information of the object to be tested, read a parameter configuration rule corresponding to the information of the object to be tested in a preset database, determine whether the state data of the testing machine 220 conforms to the parameter configuration rule, if the state data of the testing machine 220 does not conform to the parameter configuration rule, the computer 210 may generate a shutdown instruction and an alarm instruction, and send the shutdown instruction and the alarm instruction to the testing machine 220 through the PLC controller 230, so that the testing machine 220 stops testing and triggers the alarm device 222.
In an embodiment, the computer 210 may generate alarm information, where the alarm information includes abnormal state information and an abnormal reason, the alarm information may be displayed on a display in a form of a pop-up box, and a user may modify, according to the alarm information in the pop-up box, state data of the testing machine 220 that does not meet the parameter configuration rule, so that the testing machine may operate normally.
In an embodiment, the PLC controller 230 and the IO control card 221 are installed on one side of the casing of the testing machine 220, and since there is no redundant signal on the IO control card 221 that can be triggered at any time, and the signal sensor on the left door of the testing machine 220 is directly connected to the IO control card 221, which may cause software operation abnormality, the signal sensor on the left door of the testing machine 220 is connected to the input end of the PLC controller 230, and the output end of the PLC controller 230 is connected to the IO control card 221, which not only implements the alarm function when the door is opened, but also avoids other influences on the software.
As shown in fig. 3, which is a flowchart illustrating a semiconductor test monitoring method according to an embodiment of the present invention, the method may be executed by the electronic device 100 shown in fig. 1 or the computer 210 shown in fig. 2 to find an abnormality of a tester in time and improve accuracy of a test result. The method comprises the following steps:
step 310: and acquiring state data and information of the tested object of the testing machine.
In the above steps, the state data of the tester refers to the test item and the test parameter currently set in the test software, and the state data may include, but is not limited to, a specific value of the test parameter, a switch state of the test item, and the like. The information of the object to be measured includes, but is not limited to, the type, model, batch number, etc. of the object to be measured. In one embodiment, the object under test may be an integrated circuit chip.
In an embodiment, the obtaining the state data and the measured object information of the testing machine may include: when the testing machine starts to test, state data and information of the tested object of the testing machine are obtained.
In an embodiment, the obtaining the state data and the measured object information of the testing machine may include: and acquiring the state data and the information of the tested object of the testing machine every preset time after the testing machine starts testing.
In the above steps, the preset time may be five minutes, and after the test of the tester is started, a timer may be used to time, and the state data and the information of the tested object of the tester are acquired every five minutes.
Step 320: and reading a parameter configuration rule corresponding to the information of the object to be measured in a preset database.
In the above steps, the preset database stores parameter configuration rules of different articles, the parameter configuration rules correspond to article information, the parameter configuration rules can be set according to the quality requirements of the articles, the parameter configuration rules of different articles can be the same or different, and the parameter configuration rules specify test items to be performed by the articles and the value setting ranges or extreme values of the test parameters.
Step 330: and judging whether the state data accords with the parameter configuration rule.
In the above steps, it is determined whether the status data conforms to the parameter configuration rule, if the status data does not conform to the parameter configuration rule, step 340 is executed, and if the status data conforms to the parameter configuration rule, the process is ended. For example, if the parameter configuration rule specifies that a certain test item is required for the object to be tested, and the acquired state data of the tester has a switch state of 0, the state data does not conform to the parameter configuration rule, and step 340 is executed. For another example, the parameter configuration rule specifies that the plastic package time parameter of the seal cutter is 10ms to 150ms, and if the obtained state data of the testing machine includes a plastic package time parameter of 8ms, the state data does not conform to the parameter configuration rule, and step 340 is executed.
Step 340: and when the state data does not accord with the parameter configuration rule, sending a shutdown instruction and an alarm instruction to the tester.
In the above steps, the stop instruction is used to control the testing machine to stop testing, and the alarm instruction is used to control the alarm device of the testing machine to start, and send out an audible and visual signal to notify the relevant technicians, so as to timely handle the abnormality of the testing machine.
In the method, whether the state data accords with the parameter configuration rule or not is judged by acquiring the state data and the information of the tested object of the testing machine and the parameter configuration rule corresponding to the information of the tested object, if the state data does not accord with the parameter configuration rule, a shutdown instruction and an alarm instruction are sent to the testing machine, the testing machine can immediately stop testing when the testing machine is abnormal, and related technical personnel can be timely notified to process abnormal conditions through alarming, so that the accuracy of a test result is improved, and the condition that a large number of integrated circuit chips are scrapped due to long-time abnormal testing is avoided.
As shown in fig. 4, which is a flowchart illustrating a semiconductor test monitoring method according to an embodiment of the present invention, the method may be executed by the electronic device 100 shown in fig. 1 or the computer 210 shown in fig. 2 to find an abnormality of a tester in time and improve accuracy of a test result. The method comprises the following steps:
step 410: and acquiring state data and information of the tested object of the testing machine. See the description of step 310 in the above embodiments for details.
Step 420: and reading a parameter configuration rule corresponding to the information of the object to be measured in a preset database. See the description of step 320 in the above embodiment for details.
Step 430: and judging whether the state data accords with the parameter configuration rule.
In the above steps, it is determined whether the status data conforms to the parameter configuration rule, if the status data does not conform to the parameter configuration rule, step 440 is executed, and if the status data conforms to the parameter configuration rule, the process is ended.
Step 440: and when the state data does not accord with the parameter configuration rule, sending a shutdown instruction and an alarm instruction to the tester. For details, see the description of step 340 in the above embodiment.
Step 450: and generating alarm information.
In the above steps, the alarm information includes abnormal state information and an abnormal reason, the abnormal state information may include one or more test items and/or test parameters that do not comply with the parameter configuration rule, and the abnormal reason refers to a reason why the test items and/or test parameters in the abnormal state information do not comply with the parameter configuration rule, for example: not within the preset numerical range.
In one embodiment, the alarm information may be displayed on the display through a pop-up window.
Step 460: and receiving processing feedback information input by the user according to the alarm information.
In the above steps, a user (technician) modifies the test items and/or test parameters that do not conform to the parameter configuration rule according to the alarm information, and inputs processing feedback information, where the processing feedback information refers to an abnormal processing result, and if all the abnormal test items and/or test parameters have been modified, the processing feedback information input by the user is received as completed, and if the abnormal test items and/or test parameters cannot be modified due to a fault, the processing feedback information input by the user is received as not completed.
Step 470: and sending an alarm releasing instruction to the testing machine according to the processing feedback information.
In the above steps, if the received processing feedback information is complete, an alarm releasing instruction is sent to the test machine, and the alarm releasing instruction is used for controlling the test machine to stop alarming and restart the test.
As shown in fig. 5, which is a schematic structural diagram of a semiconductor test monitoring apparatus 500 according to an embodiment of the present application, the apparatus can be applied to the electronic device 100 shown in fig. 1, and includes: an obtaining module 510, a reading module 520, a judging module 530 and a first sending module 540. The principle relationship of the modules is as follows:
the obtaining module 510 is configured to obtain state data of the testing machine and information of the object to be tested.
The reading module 520 is configured to read a parameter configuration rule corresponding to the information of the object to be measured in a preset database.
The determining module 530 is configured to determine whether the status data conforms to the parameter configuration rule.
And the first sending module 540 is configured to send a shutdown instruction and an alarm instruction to the tester when the state data does not meet the parameter configuration rule.
In one embodiment, the obtaining module 510 is configured to: when the testing machine starts to test, state data and information of the tested object of the testing machine are obtained.
In one embodiment, the obtaining module 510 is configured to: and acquiring the state data and the information of the tested object of the testing machine every preset time after the testing machine starts testing.
In one embodiment, the semiconductor test monitoring apparatus 500 further includes: the system comprises a generating module 550, a receiving module 560 and a second sending module 570, wherein the generating module 550 is used for generating alarm information, and the alarm information comprises abnormal state information and abnormal reasons; the receiving module 560 is configured to receive processing feedback information input by a user according to the alarm information; and a second sending module 570, configured to send an alarm release instruction to the testing machine according to the processing feedback information.
For a detailed description of the semiconductor test monitoring apparatus 500, please refer to the description of the related method steps in the above embodiments.
An embodiment of the present invention further provides a storage medium readable by an electronic device, including: a program that, when run on an electronic device, causes the electronic device to perform all or part of the procedures of the methods in the above-described embodiments. The storage medium may be a magnetic Disk, an optical Disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a Flash Memory (Flash Memory), a Hard Disk (Hard Disk Drive, abbreviated as HDD), a Solid State Drive (SSD), or the like. The storage medium may also comprise a combination of memories of the kind described above.
In the embodiments provided in the present application, the disclosed apparatus and method can be implemented in other ways. The apparatus embodiments described above are merely illustrative, and for example, the flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of apparatus, methods and computer program products according to various embodiments of the present application. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s).
In some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
In addition, functional modules in the embodiments of the present application may be integrated together to form an independent part, or each module may exist separately, or two or more modules may be integrated to form an independent part.
The embodiments in the present specification are described in a progressive manner, and the same and similar parts among the embodiments are referred to each other, and each embodiment focuses on the differences from the other embodiments. The above description is only a preferred embodiment of the present application, and is only for the purpose of illustrating the technical solutions of the present application, and not for the purpose of limiting the present application. Any modification, equivalent replacement, improvement or the like, which would be obvious to one of ordinary skill in the art and would be within the spirit and principle of the present application, should be included within the scope of the present application.
Claims (10)
1. A method for monitoring semiconductor testing, comprising:
acquiring state data and information of a tested object of a testing machine;
reading a parameter configuration rule corresponding to the information of the object to be measured in a preset database;
judging whether the state data accords with the parameter configuration rule or not;
and when the state data does not accord with the parameter configuration rule, sending a shutdown instruction and an alarm instruction to the tester.
2. The method of claim 1, wherein the obtaining of the state data and the measured object information of the testing machine comprises:
and when the testing machine starts to test, acquiring the state data and the information of the tested object of the testing machine.
3. The method of claim 1, wherein the obtaining of the state data and the measured object information of the testing machine comprises:
and acquiring state data and information of the tested object of the tester every preset time after the tester starts testing.
4. The method of claim 1, wherein after sending a shutdown command and an alarm command to the tester when the status data does not meet the parameter configuration rule, further comprising:
generating alarm information, wherein the alarm information comprises abnormal state information and abnormal reasons;
receiving processing feedback information input by a user according to the alarm information;
and sending an alarm releasing instruction to the testing machine according to the processing feedback information.
5. A semiconductor test monitoring apparatus, comprising:
the acquisition module is used for acquiring the state data of the tester and the information of the tested object;
the reading module is used for reading a parameter configuration rule corresponding to the information of the object to be measured in a preset database;
the judging module is used for judging whether the state data accords with the parameter configuration rule or not;
and the first sending module is used for sending a shutdown instruction and an alarm instruction to the tester when the state data does not accord with the parameter configuration rule.
6. The apparatus of claim 5, wherein the obtaining module is configured to:
and when the testing machine starts to test, acquiring the state data and the information of the tested object of the testing machine.
7. The apparatus of claim 5, wherein the obtaining module is configured to:
and acquiring state data and information of the tested object of the tester every preset time after the tester starts testing.
8. The apparatus of claim 5, further comprising:
the generating module is used for generating alarm information, and the alarm information comprises abnormal state information and abnormal reasons;
the receiving module is used for receiving processing feedback information input by a user according to the alarm information;
and the second sending module is used for sending an alarm releasing instruction to the testing machine according to the processing feedback information.
9. An electronic device, comprising:
a memory to store a computer program;
a processor to perform the method of any one of claims 1 to 4.
10. A non-transitory electronic device readable storage medium, comprising: program which, when run by an electronic device, causes the electronic device to perform the method of any one of claims 1 to 4.
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| CN107678917A (en) * | 2017-09-21 | 2018-02-09 | 平安科技（深圳）有限公司 | Test machine automatic management method, apparatus, equipment and storage medium |
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