CN112951151A

CN112951151A - MLED driver, MLED display driving system and driving method thereof

Info

Publication number: CN112951151A
Application number: CN202110183965.9A
Authority: CN
Inventors: 刘克远; 郑俊杰; 张程龙
Original assignee: Huayuan Zhixin Semiconductor Shenzhen Co ltd
Current assignee: Huayuan Zhixin Semiconductor Shenzhen Co ltd
Priority date: 2021-02-10
Filing date: 2021-02-10
Publication date: 2021-06-11
Anticipated expiration: 2041-02-10
Also published as: CN112951151B

Abstract

The invention discloses an MLED driver, which is used for driving a.b MLEDs arranged in an array, at least provided with a serial input interface and a serial output interface, wherein a short-circuit switch is arranged between the serial input interface and the serial output interface, the positive electrodes of the b MLEDs in each row are connected to a scanning line so that the a.b MLEDs are respectively connected to the a scanning lines, the negative electrodes of the a MLEDs in each column are connected to a data line so that the a.b MLEDs are respectively connected to the b data lines, each scanning line can be respectively connected to a power supply, and each data line can be respectively connected to a first discharging circuit or a current output circuit through a first selection switch. The invention also discloses an MLED display driving system and a driving method thereof. The MLED driver, the MLED display driving system and the driving method thereof provided by the invention not only reduce the layout and wiring, but also thoroughly eliminate the ghost phenomenon.

Description

MLED driver, MLED display driving system and driving method thereof

Technical Field

The present invention relates to the field of LED (Light Emitting Diode) display control and driving, and in particular, to an MLED driver, an MLED display driving system and a driving method thereof.

Background

In the LCD (Liquid crystal display) display device, the brightness is controlled by the deflection of the Liquid crystal, which takes time, generally microseconds(1μs＝10^-6s) level. Under the condition of fast moving of the image, the phenomenon of trailing of the image is easy to occur. The tailing phenomenon occurs as long as the moving speed of the object exceeds the limit response speed of the display device, and the tailing phenomenon of the LCD display system is an inherent phenomenon, and is generally reduced by an Over-driving technique (Over-driving) in the driving technique, but cannot be eliminated.

Therefore, a novel display system, mini-LED/Micro-LED (Micro Light Emitting Diode, collectively called MLED) display technology, has been developed.

A conventional LED driving system is shown in fig. 1, and includes a Timing Controller (Timing _ Controller), a gate driver (GateDriver), a column driver (SourceDriver), and a display array composed of multiple MLEDs, which are usually arranged in a matrix. The horizontal direction is generally defined as Gateline (GL), such as GL1, GL2, …, GLm in fig. 1, and the vertical direction is defined as Sourceline (SL), such as SL1, SL2, …, SLn in fig. 1. The anode of each MLED is connected to GateLine and the cathode is connected to SourceLine. Only one scanning line (GateLine) and one data line (SourceLine) are opened at a time, so that the controlled light emission of the LEDs in the row and column selection is completed.

Since the metal wire is wired, each row of the scanning lines (GateLine) has a parasitic capacitance, and each LED also has a parasitic capacitance, so that these two are equivalent to Cg1, Cg2, …, Cgm. Each column data line (SourceLine) also has a parasitic capacitance Cs1, Cs2, …, Csn.

Since the scan lines (GateLine) are turned on and off sequentially, the scan lines are generally designed to be turned on and off sequentially in order to improve the reliability of the circuit and reduce the design complexity. As shown in fig. 2, GL1 is first opened for a period of time, then GL1 is closed, then GL2 is opened for a period of time, then GL2 is closed, and the process is repeated. Due to the existence of the equivalent parasitic capacitances Cg1, Cg2, … and Cgm on the scanning line (GateLine), each time the corresponding scanning line (GateLine) is turned on (such as GL1 line), the corresponding equivalent parasitic capacitance (such as Cg1) is charged, and when the corresponding equivalent parasitic capacitance (Cg1) is discharged, the part of the electric quantity stored in the Cg1 is completely wasted if the part is not utilized. In addition, due to the existence of equivalent parasitic capacitance on the scan line (GateLine) and the data line (SourceLine), the LED also has abnormal bright spots during displaying, and these abnormal spots are referred to as ghost images (ghost images) in the industry. Such as: when GL1 is open, the parasitic capacitance Cg1 on GL1 is charged to a high potential; when GL1 is turned off and is switched to GL2 for turning on, if a Z22 lamp on GL2 is lighted, and SL2 is low in potential, the high potential of the charge stored in Cg1 passes through Z12 to SL2, and Z12 is lighted, the lighting time is related to the charge stored in parasitic capacitor Cg1, and at the moment Z12 is expected to be extinguished, Z12 is called an abnormal bright point and is also called a ghost.

The above background disclosure is only for the purpose of assisting understanding of the concept and technical solution of the present invention and does not necessarily belong to the prior art of the present patent application, and should not be used for evaluating the novelty and inventive step of the present application in the case that there is no clear evidence that the above content is disclosed at the filing date of the present patent application.

Disclosure of Invention

In order to solve the above technical problems, the present invention provides an MLED driver, an MLED display driving system and a driving method thereof, which not only reduce the layout and wiring, but also completely eliminate the ghost phenomenon.

In order to achieve the purpose, the invention adopts the following technical scheme:

the MLED driver is used for driving a and b MLEDs arranged in an array, and at least comprises a serial input interface and a serial output interface, wherein a short-circuit switch is arranged between the serial input interface and the serial output interface, the positive poles of the b MLEDs in each row are connected to a scanning line, so that the a and b MLEDs are respectively connected to a scanning line, the negative poles of the a MLEDs in each column are connected to a data line, so that the a and b MLEDs are respectively connected to b data lines, each scanning line can be respectively connected to a power supply, and each data line can be respectively connected to a first discharging circuit or a current output circuit through a first selection switch.

Preferably, each of the scan lines may be connected to the power supply or the second discharge circuit through a second selection switch, respectively.

Preferably, a clock signal interface and a data signal interface are optionally provided.

Preferably, a pull-up resistor or a pull-down resistor is arranged inside the serial input interface.

Another embodiment of the present invention discloses an MLED display driving system, including a timing controller and a plurality of MLED drivers arranged in an array, wherein each MLED driver is configured to drive a plurality of MLEDs arranged in an array, each MLED driver at least has a serial input interface and a serial output interface, a shorting switch is disposed between the serial input interface and the serial output interface, the serial input interfaces and the serial output interfaces between a plurality of MLED drivers of each string are sequentially connected to each other, and the serial input interfaces and the serial output interfaces at two ends of the plurality of MLED drivers of each string, which are sequentially connected to each other, are respectively connected to first interfaces and second interfaces of the plurality of MLED drivers of each string on the timing controller.

Preferably, each of the MLED drivers further optionally has a clock signal interface and a data signal interface, and the plurality of clock signal interfaces and the plurality of data signal interfaces of the plurality of MLED drivers of each string, which are sequentially connected to each other by the serial input interface and the serial output interface, are respectively connected to the third interface and the fourth interface of the plurality of MLED drivers of each string on the timing controller to form a clock signal-data signal bus.

Still another embodiment of the present invention discloses an MLED driving method using the MLED display driving system described above, including:

s2: the short-circuit switches between the serial input interfaces and the serial output interfaces of all the MLED drivers are turned off by default at the initial time (at the time of power-on), and the timing controller sends addressing instructions to the MLED drivers connected with the corresponding first interfaces through each first interface simultaneously so as to complete the address determination of each string of the MLED drivers and enable each MLED driver to obtain the addressing information of the MLED driver; if the addressing fails, ending the process, and if the addressing is successful, executing step S3;

s3: closing the shorting switch between the serial input interface and the serial output interface of all the MLED drivers to short the serial input interface and the serial output interface of each of the MLED drivers together such that each string of the MLED drivers forms a serial input-output bus;

s4: the timing controller receives control data of an image control system, the first interface of each MLED driver respectively sends the data of each MLED driver to the serial input/output bus of each MLED driver, and each MLED driver parallelly acquires command data on the serial input/output bus according to addressing information of the MLED driver;

s5: and each MLED driver executes corresponding action according to the acquired command data on the serial input/output bus.

In another embodiment of the present invention, an MLED driving method using the MLED display driving system includes:

s4: the timing controller receives control data of an image control system, and respectively sends data of each corresponding MLED driver to the clock signal-data signal bus of each MLED driver through the third interface and the fourth interface of each MLED driver, and each MLED driver parallelly acquires command data on the clock signal-data signal bus according to addressing information of the MLED driver;

s5: and each MLED driver executes corresponding action according to the acquired command data on the clock signal-data signal bus.

Preferably, the MLED driving method further includes:

s1: configuring all of the MLED drivers to enable or disable a scan function;

further, the step S1, when configuring all the MLED drivers to enable the scan function, specifically includes:

s11: initializing all scanning lines to be closed, wherein the positive electrode of each row of MLEDs in each MLED driver is connected to one scanning line;

s12: opening the scanning line corresponding to the ith row of MLEDs to complete data display of all columns of the ith row of MLEDs, and charging the parasitic capacitance Cgi;

s13: after the first preset time, closing the scanning line corresponding to the ith row of MLEDs;

s14: short-circuiting the scanning line corresponding to the ith row of MLEDs with the scanning line corresponding to the (i +1) th row of MLEDs to share charges, and completing voltage pre-charging of the (i +1) th row of MLEDs;

s15: after second preset time, disconnecting the short circuit between the scanning line corresponding to the ith row of MLEDs and the scanning line corresponding to the (i +1) th row of MLEDs;

s16: discharging the residual charge of the i-th row MLED;

s17: after a third predetermined time, making i ═ i + 1;

and repeating the steps S12-S17 until the opening and closing of the MLEDs of all the lines are completed.

Preferably, a pull-up resistor or a pull-down resistor is disposed inside the serial input interface, wherein in step S2, when the shorting switch between the serial input interface and the serial output interface of all the MLED drivers is turned off, the serial input interface is connected to the pull-up resistor or the pull-down resistor; in step S3, when the shorting switch between the serial input interface and the serial output interface of all the MLED drivers is closed, the serial input interface is disconnected from the pull-up resistor or the pull-down resistor.

Compared with the prior art, the invention has the beneficial effects that: the MLED driver disclosed by the invention is short-circuited together after addressing is finished by arranging the serial input interface and the serial output interface to be used as a bus, and can receive signals in parallel to drive a plurality of MLEDs arranged in an array simultaneously, so that the data transmission time is reduced, the controlled display speed of the MLEDs is accelerated, and the MLED driver arranged in the array and the time schedule controller can be connected together only through the serial input interface and the serial output interface, so that the wiring quantity is reduced to the maximum extent, and the optimization of a system is realized; and the scanning lines and the data lines can be respectively connected with internal discharge circuits to release charges, so that the purpose of eliminating ghost points is achieved.

Further, the invention has the following advantages:

(1) in the invention, the discharge circuit in the MLED driver can be integrated in the IC chip without additionally adding a discharge circuit on the display panel, thereby saving the cost and the design complexity of the display panel and improving the manufacturing reliability.

(2) The serial input interface is internally provided with a pull-up resistor or a pull-down resistor, so that the serial input interface has a pull-up function or a pull-down function, and further, the addressing action can be executed by the time schedule controller only by pulling up (when the serial input interface is internally pulled down) or pulling down (when the serial input interface is internally pulled up), so that the addressing purpose can be achieved without using a communication protocol in the addressing stage process, the addressing operation flow is simplified, and the power-on initialization process is accelerated.

(3) The MLED driver can also complete the addressing function and the data transmission function simultaneously when only having a serial input interface and a serial output interface, and a short-circuit switch is arranged between the serial input interface and the serial output interface, wherein in the addressing stage, the short-circuit switch between the serial input interface and the serial output interface of each MLED driver is disconnected, and data is sent and received in a section; in the data transmission stage, the short-circuit switch between the serial input interface and the serial output interface of each MLED driver is connected, data are transmitted on an equivalent bus, all the MLED drivers can see all the data simultaneously, then the data of the MLED drivers are acquired according to address information, the data acquisition time of the MLED drivers is accelerated, and further an image control system at the front end can control the MLED drivers at a higher frequency to clearly display tracks of moving objects with ultrahigh speed.

(4) The MLED driver is provided with a serial input interface, a serial output interface, a clock signal interface and a data signal interface at the same time, can realize the simultaneous transmission of clock and data, has very high data throughput and is suitable for certain high-speed application places; the communication protocols on the clock signal-data signal bus (clk-data bus) and the serial input and output bus (si-so bus) can be the same, so that the time schedule controller is simpler to realize, and the clk-data bus and the si-so bus can be mutually backed up, thereby enhancing the robustness of the system.

(5) In the MLED driving method, when an MLED driver enables a scanning function, a scanning line corresponding to an i-th row of MLEDs is closed, and a scanning line corresponding to an i + 1-th row of MLEDs is opened, so that the scanning line corresponding to the i-th row of MLEDs is in short circuit with the scanning line corresponding to the i + 1-th row of MLEDs, and the charge sharing between the capacitance corresponding to the i-th row of MLEDs and the capacitance corresponding to the i + 1-th row of MLEDs is realized, therefore, the charge charged by the capacitance corresponding to the i-th row of MLEDs when the scanning line corresponding to the i-th row of MLEDs is opened is transferred to a part of the capacitance corresponding to the i + 1-th row of MLEDs, the pre-charging of the capacitance corresponding to the i + 1-th row of MLEDs is achieved, and then the scanning line corresponding to the i + 1-th row of MLED; on the other hand, the charging time is shorter, the charging electric energy consumption is less, and the effect of saving electric energy is achieved.

(6) In the MLED driving method, the scanning function can be omitted, so that the MLED driver does not need to be charged and discharged frequently, screen flicker is reduced, the screen refresh rate is improved, damage to human eyes is small, and the MLED driving method is a final solution of a screen-flicker-free system.

Drawings

FIG. 1 is a schematic diagram of a common LED drive system;

FIG. 2 is a schematic diagram of a common GateLine timing switch;

FIG. 3 is a schematic diagram of an MLED display driving system in accordance with a preferred embodiment of the present invention;

FIG. 4 is a schematic diagram of the MLED driver of FIG. 3;

FIG. 5 is a schematic diagram of a scan timing of an MLED driver;

FIG. 6 is a schematic diagram of scan line voltage variation for an MLED driver;

FIG. 7 is a flow diagram of the addressing function of an MLED driver;

FIG. 8 is an embodiment of SPB interface communication horizontal direction driving with scan function;

FIG. 9 is an embodiment of SPB interface communication vertical direction driving with scan function;

FIG. 10 is a clk-data interface horizontal direction driving example with scan function;

FIG. 11 is a vertical direction driving example of clk-data interface with scan function;

FIG. 12 is an embodiment of SPB interface communication horizontal direction driver without scan function;

FIG. 13 is an embodiment of SPB interface communication vertical direction drive without scan function;

FIG. 14 is a clk-data interface horizontal direction driving example without scan function;

fig. 15 is a clk-data interface vertical direction drive example without scan function.

Detailed Description

In order to make the technical problems, technical solutions and advantageous effects to be solved by the embodiments of the present invention more clearly apparent, the present invention is further described in detail below with reference to the accompanying drawings and the embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

It will be understood that when an element is referred to as being "secured to" or "disposed on" another element, it can be directly on the other element or be indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or be indirectly connected to the other element. In addition, the connection may be for either a fixing function or a circuit connection function.

It is to be understood that the terms "length," "width," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," and the like are used in an orientation or positional relationship indicated in the drawings for convenience in describing the embodiments of the present invention and to simplify the description, and are not intended to indicate or imply that the referenced device or element must have a particular orientation, be constructed in a particular orientation, and be in any way limiting of the present invention.

Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the embodiments of the present invention, "a plurality" means two or more unless specifically limited otherwise.

As shown in fig. 3, the MLED display driving system includes a Timing Controller (Timing Controller) and p × q MLED drivers (mdrivers) of the array arrangement, each MLED driver is configured to drive a × b MLEDs of the array arrangement, the Timing Controller interacts information with a front-end device (image control system SOC) through a control signal (ctrl _ signal) and a data transmission channel (e.g., SPI interface in fig. 3), provides an address signal addr _ o x (1 ≦ x ≦ q) and addr _ i x (1 ≦ x ≦ q) and/or a clock signal clk and a data signal data for command and data transmission to the MLED drivers, and the MLED drivers parse the information and complete configuration of the MLED drivers themselves and/or drive corresponding MLED lamps according to command types, thereby completing brightness control of the MLED. If the MLED lamp is three primary colors of Red/Green/Blue, the display of a full color image can be completed; if the MLED lamp is Red or Green or Blue monochrome, a monochrome image display can be completed, where a × p ═ m and b × q ═ n, so that the MLED display driving system of fig. 3 can control m × n MLEDs (min-LEDs or micro-LEDs) arranged in an array.

As shown in fig. 3, in the present embodiment, the serial input interface (si) and the serial output interface (so) between p mdrives in each column are sequentially connected to each other, and the serial input interface (si) and the serial output interface (so) at two ends of the p mdrives in each column are respectively connected to the first addressing signal interface (addr _ o x) and the second addressing signal interface (addr _ i x) on the timing controller corresponding to each column of mdrives, so that the clock signal interface (clk) and the data signal interface (data) of the p mdrives in each column are selectively connected to the clock signal interface (clkx) and the data signal interface (data x) on the timing controller corresponding to each column of mdrives, where x is greater than or equal to 1 and less than or equal to q; furthermore, all Mdriver LED power supply interfaces (vled) are connected to the input power supply (DC-DC).

As shown in fig. 4, the MLED driver is configured to drive a × b MLEDs arranged in an array, and has an LED power supply interface (VLED), a serial input interface (si), a serial output interface (so), a clock signal interface (clk), and a data signal interface (data), a connection switch is disposed between the serial input interface (si) and the serial output interface (so), wherein anodes of b MLEDs in each row are connected to a scan line (GL y) (1 ≦ y ≦ a), cathodes of a MLEDs in each column are connected to a data line (SL z) (1 ≦ z ≦ b), in this embodiment, an end of each scan line (GL y) corresponds to a scan interface (scan y) (1 ≦ y ≦ a), and each scan interface (scan y) is connected to a Discharge circuit (Discharge) or a power supply interface (VLED) through a second selection switch, respectively; each data line (SL z) (1 & ltz & gt & lt b) can be respectively connected to a Discharge circuit (Discharge) or a current input circuit through a first selection switch (S z) (1 & ltz & lt b & gt), wherein the current source has the capability of setting the output current size and can be a PWM (Pulse Width modulation) controlled current source

The MLED driver employed in the present embodiment has the following functions:

A. a scan (scan) function of whether a scan line (GateLine) is enabled or not may be configured;

B. the charge rebalancing (also called charge sharing) function of the scanning line is used for achieving the purpose of saving power consumption;

C. the Discharge function of the scanning line is used for completing the charge Discharge stored by an equivalent parasitic capacitor on the scanning line (GateLine) and eliminating ghost;

D. a data line (SourceLine) DC current setting for setting an output DC current;

E. the PWM current output function of a data line (SourceLine) completes the control output of a brightness signal according to the PWM duty ratio;

F. the Discharge function of the data line (SourceLine) is used for completing the charge Discharge stored by the equivalent parasitic capacitor on the data line (SourceLine), so that the reverse voltage of the charges on the MLED lamp is eliminated, and the service life loss of the MLED is reduced;

G. the MLED open circuit (open) detection function is provided, and whether the MLED is open or not is detected;

H. the method has the function of detecting the short circuit of the MLED and detects whether the MLED is short-circuited or not;

I. the temperature measuring and compensating function is provided, the temperature of the chip is measured, and the temperature compensation is carried out;

J. the method comprises the steps of having an addressing (addr) function, determining the address of the current Mdriver in a string of Mdrivers;

K. the method has the function of measuring the VLED voltage at the current position, and is generally used for a time schedule controller to monitor the VLED voltage state so as to determine whether to adjust the output voltage of an input power supply (DC-DC).

The L, communication interface has Serial Parallel Broadcast interface (SPB interface for short, as Si and So in fig. 4) for addressing and data communication purposes.

M, in order to further improve the data communication rate, the parallel interface can adopt another parallel interface called clk-data interface instead of the si-so bus. One going clock, called clk line, and one going data, called data line. Of course, the user may use only the si-so single-wire interface without this interface according to actual situations (e.g., less partitions, limited wiring, etc.).

For "configurable scan function" in function a, it is meant that the scan function of the scan line (GateLine) may be configured to be on or not on. When a configuration scanning (scan) function is closed, the VLED pin and Scanx (x is more than or equal to 1 and less than or equal to q) pin are shorted together in the Mdriver, at the moment, an external application circuit can connect the VLED pin to the VLED power supply, the Scanx pin to the anode of the MLED, or all the MLED anodes can be directly shorted together to the VLED power supply without the VLED pin and the Scanx pin; when the scan (scan) function is turned on, the MLED driver is required to turn on and turn off the scan lines (GateLine) in sequence according to a certain timing sequence, which is shown in fig. 5, and the description steps are as follows:

a1: initializing so that all scanning lines (GateLine) are off, i.e., low;

a2: when the ith row is on, it is high. At this time, all the column data display of the ith row is completed, and the parasitic capacitance Cgi is charged;

a3: after a period of time, closing the ith row;

a4: then, short-circuiting the scanning lines (GateLine) of the ith row and the (i +1) th row, carrying out charge sharing (charge sharing), carrying out charge rebalancing on the charge Q stored in Cgi between the Cgi and the Cgi +1, and finishing voltage pre-charging (pre _ charge) of the (i +1) th row;

a5: disconnecting the GateLine short circuit of the ith row and the (i +1) th row;

a6: discharging (discharging) the remaining charges of the ith row;

a7: after a period of time, let i ═ i + 1;

repeating A2 through A7 until the opening and closing of MLEDs for all rows is completed.

For the "charge sharing" function in function B, the principle description steps are as follows:

b1: when the ith row is opened and is at a high level, the parasitic capacitor Cgi is charged, and the charged charge Q is Cgi × Vled;

b2: and (3) when the ith row and the (i +1) th row of scanning lines (GateLine) are short-circuited and charge sharing is carried out, carrying out charge rebalancing on the charge Q stored in Cgi between Cgi and Cg (i +1), and when the balanced voltage is U: q ═ U (Cgi + Cg (i + 1)); according to the principle of charge conservation: cgi × Vled ═ U (Cgi + Cg (i +1)) > yielding: u ═ Vled [ Cgn/(Cgn + Cg (n +1)) ].

In an actual circuit, the materials and the widths of the horizontal wirings of the ith row of scanning lines (GateLine) and the (i +1) th row of scanning lines (GateLine) are the same, the parasitic capacitances of the MLEDs are similar and have small difference, and therefore the sizes of the equivalent parasitic capacitances are also not large difference and are basically equal. Therefore, the voltage U ≈ 1/2Vled after the charge re-balance, the voltage variation waveform of the scan line (GateLine) is shown in fig. 6, and the scan line of the ith row is taken as an example:

0 → ta: when the GLi of the ith row is closed, the voltage is kept at 0V;

ta → tb: line i-1 GL (i-1) and line i GLi charge sharing (charge sharing);

tb → tc: when GLi is turned on, the voltage starts to charge from about 1/2Vled to Vled;

tc → td: after GLi is turned on for a while, the voltage remains VLED;

td → te: after GLi is turned off, charge sharing (charging sharing) is carried out to the (i +1) th line GL (i + 1);

te → tf: GLi discharge (discharge) time.

B3: after rebalancing, the capacitor Cg (i +1) voltage is 1/2Vled, and when GL (i +1) is turned on, the capacitor Cg (i +1) voltage is recharged from 1/2Vled to Vled. Compared with a circuit without a charge sharing (charging) function, the charging time is shorter, and the charging electric energy consumption is less; therefore, the effect of saving electric energy is achieved.

For the "PWM current output function" in function E, the steps are described as follows:

e1: the time sequence controller synchronously transmits the brightness data to all Mdrivers according to a certain protocol format through a serial input and serial output bus or a clock line clk and a data line data;

e2: after receiving the data, the Mdrive takes out the data belonging to the Mdrive according to the address (device _ id) on the premise that the data verification is legal, converts the data into the duty ratio (duty) of PWM after data processing, and controls the output current, thereby controlling the display brightness.

For the "addressing (addr) function" in function J, it means that after the timing controller is powered on, it needs to confirm the address of each Mdriver in the addr _ ox (1 ≦ x ≦ q) and addr _ ix (1 ≦ x ≦ q) serial link, and the flowchart is shown in fig. 7, and the following steps are described:

j1: after the time schedule controller is powered on, firstly powering on the Mdriver;

j2: the time schedule controller determines which addressing mode is used for addressing according to the number of addressing times. If the address is first addressed, the addressing process is directly started by pulling high (when the serial input interface is internally pulled down) or pulling low (when the serial input interface is internally pulled up); if not addressing for the first time, then the time schedule controller issues a command of disconnecting si and so through addr _ ox (x is more than or equal to 1 and less than or equal to q) according to a certain protocol format, and all Mdriver receiving the command disconnects si and so; then the time sequence controller issues an addressing command according to a certain protocol format;

j3: after the transmission of the so addressing signal is finished, the self si signal and the so signal are internally short-circuited together, and the operation is circulated to the last Mdriver on the addr string;

j4: the last so signal of Mdriver is sent to the time schedule controller addr _ ix (x is more than or equal to 1 and less than or equal to q);

j5: the time schedule controller judges whether the address meets the expectation or not according to the address given by the so of the last Mdriver;

j6: if not, the addressing fails. After the addressing fails, if the number of failures does not reach the set value (for example, 3 times of addressing fails), the addressing operation is executed again from step J2; if the failure times exceed the set value, the addressing fails, and the step J9 is entered;

j8: if yes, completing addressing, and entering step J9;

j9: ending the addressing process; if the addressing fails, reporting the corresponding error level for standby processing; otherwise, reporting the addressing success.

For the "serial parallel broadcast interface (SPB interface)" in the function L, the features and functions are described as follows:

l1: the SPB interface is physically provided with 2 interfaces, one si interface is a serial input (serial input) interface, and the other so interface is a serial output (serial output) interface;

l2: the SPB interface is divided into 2 stages in behavior, wherein the first stage is called an addressing stage, and the second stage is called a transmission stage;

l3: when the addressing stage is carried out, the si and the so are disconnected, and one section of data is sent and received;

l4: in the transmission stage, the si and the so are in short circuit, data are transmitted on an equivalent bus, and all the Mdrivers can see all the data at the same time;

l5: when the power is on, the si has a pull-up function (pull up) or a pull-down function (pull down) inside, and the si interface is fixed to be a fixed level (high level when the si interface has pull up, and low level when the si interface has pull down)

L6: when the power is just powered on, the si interface and the so interface are disconnected, and an addressing signal is waited to be input;

l7: when the si receives the addressing signal, the address obtained by analysis is used as the current Mdriver local equipment address;

l8: outputting the next address (the address +1 of the equipment) from the so interface, and enabling the si to have a pull-up function or a pull-down function by arranging a pull-up resistor or a pull-down resistor in the si, so that the timing controller can execute an addressing action only by pulling up (when the si is pulled down internally) or pulling down (when the si is pulled up internally), thereby avoiding using a communication protocol in an addressing stage and simplifying the operation flow of addressing; if the si does not have a pull-up function (pull up) or a pull-down function (pull down) inside, the timing controller is required to send an addressing command according to a protocol;

l9: after addressing action is finished, the si is disconnected with an internal pull-up or pull-down resistor, then the si and the so are short-circuited together to be used as a bus, and thus all the Mdrivers are mounted on the si-so bus in parallel;

l10: and receiving a command or data sent by the timing controller by adopting a self-defined single-wire communication protocol (single-wire), acquiring own data from the si-so bus by each Mdriver according to own device _ id, and then correspondingly acting.

L11: thus, the si/so is a serial bus in the addressing stage, and the command can be sent by one section; after the addressing phase, the commands can be sent uniformly, because the si-so is a single parallel bus that is shorted together, which is the meaning of the serial parallel broadcast interface (SPB interface) in the present invention.

For the "clk-data parallel interface" in the function M, the following features are provided:

m1: the clk-data interface is provided with 2 transmission buses, one goes through a clock signal clk, and the other goes through a data signal data;

m2: the clk-data interface, as an alternative to the si-so interface in the "transmit phase", has a very high data throughput for certain high speed applications due to the simultaneous transmission of clock and data.

In the implementation, the communication protocol on the clk-data bus and the communication protocol on the si-so bus in the transmission stage are the same in the protocol layer, so that the time schedule controller is simpler to implement, and the clk-data bus and the si-so bus can be mutually backed up; the robustness of the system is enhanced.

According to the functional description of Mdriver above, the following 4 drive architectures can be adopted:

(1) the first driving structure: the Mdriver has a scan function, and only a si-so bus interface exists between the timing controller and the Mdriver, and at this time, the implementation example has the simplest wiring and the higher efficiency of bus data transmission, and the corresponding implementation example is shown in fig. 8 and 9, where fig. 8 is an implementation example of the SPB interface with the scan function driven in the horizontal direction of communication, and fig. 9 is an implementation example of the SPB interface with the scan function driven in the vertical direction of communication.

Taking fig. 8 as an example, the specific working process of the first driving architecture is described as follows:

s1: after the time sequence controller is electrified, configuring an Mdriver enable scan function;

s2: the time schedule controller sends addressing commands to the Mdriver connected with the addr _ ox through the addr _ ox (x is more than or equal to 1) to complete the determination of the Mdriver address of each string, and the addressing process is detailed in steps J1-J9;

s3: recording the failure reason after the addressing fails; after addressing is successful, the si and the so inside the Mdriver are in short circuit together to form a si-so bus, and the next step is carried out;

s4: the time schedule controller starts to receive data sent by a front-end SOC image control system through a serial peripheral bus (SPI), carries out verification according to an SPI packet data format, discards the received data when the verification fails, records error reasons, and enters related subsequent processing of the time schedule controller when the verification succeeds;

s5: after the time schedule controller finishes processing the received data, data of each string of Mdriver is sent to the si-so bus through an addr _ ox (x is more than or equal to 1) pin, and the Mdriver acquires the data on the clk _ data bus according to own device _ id;

s6: the Mdriver performs corresponding actions according to the attribute of the received command, such as pushing the received data to the MLED for display, performing Mdriver configuration, or returning to Mdriver status.

Under the structure, the timing controller provides an addressing signal, a clock signal and a data signal to Mdriver through addr _ o x (1 is less than or equal to x and less than or equal to q) and addr _ i x (1 is less than or equal to x and less than or equal to q) pins, namely two interfaces of addr _ o x (1 is less than or equal to x and less than or equal to q) and addr _ i x (1 is less than or equal to x and less than or equal to q) are simultaneously used as interfaces for providing the addressing signal and the clock signal and the data signal.

(2) A second driving framework: the Mdriver has a scan function, and there are a si-so bus interface and a clk-data bus interface between the timing controller and the Mdriver, and at this time, there are relatively simple wirings and the most efficient bus data transmission, and the corresponding implementation examples are shown in fig. 10 and fig. 11, where fig. 10 is an example of driving the clk-data interface with the scan function in the horizontal direction, and fig. 11 is an example of driving the clk-data interface with the scan function in the vertical direction.

Taking fig. 10 as an example, the specific working process of the driving architecture two is described as follows:

s5: after the time sequence controller finishes processing the received data, transmitting data to each string of Mdriver to the clk-data bus through a clkx-datax (x is more than or equal to 1) pin, and acquiring the data on the clk-data bus by the Mdriver according to own device _ id;

Under the structure, the timing controller provides an addressing signal to Mdriver through an addr _ o x (1 is less than or equal to x and less than or equal to q) pin and an addr _ i x (1 is less than or equal to x and less than or equal to q) pin, and provides a clock signal and a data signal to Mdriver through a clkx-datax pin.

The difference between the driving architecture and the driving architecture I is that the driving architecture is provided with a si-so bus and simultaneously introduces a clk-data bus, so that the refresh rate is improved, and the driving architecture is suitable for ultra-high-speed running pictures.

(3) A driving framework III: the Mdriver does not have a scan function, namely the VLED pin and the Scanx pin are short-circuited together inside the Mdriver at the moment, or the VLED pin and the Scanx pin are not used, and all MLED anodes are directly short-circuited together outside and connected to a VLED power supply; in addition, only a si-so bus interface is arranged between the time schedule controller and the Mdriver, so that the driving structure I has the advantages of saving the discharge function of a scanning line of the Mdriver, reducing the power consumption and the process of the Mdriver without the VLED voltage passing through the Mdriver, reducing the Flicker (Flicker) of a screen and improving the refresh Rate (Frame Rate); as shown in fig. 12 and 13, fig. 12 is an implementation example of the SPB interface communication horizontal direction driving when the scan function is not enabled, and fig. 13 is an implementation example of the SPB interface communication vertical direction driving when the scan function is not enabled.

Taking fig. 12 as an example, the specific working process of the driving architecture three is described as follows:

s1: after the time sequence controller is electrified, configuring the Mdriver to disable the scan function;

The difference between the driving architecture and the first driving architecture is that the driving architecture does not enable a scan function (since the driving method of the driving architecture disclosed in the present invention can directly implement the addressing function of each MLED, and does not need to implement the addressing function of each MLED on the basis of enabling the scan function, the driving architecture does not need to enable the scan function), and therefore, frequent charging and discharging of parasitic capacitance of a scan line (GateLine) is not needed, screen flicker is reduced, screen refresh rate is improved, and damage to human eyes is less.

(4) Driving the framework four: the Mdriver does not have a scan function, namely the VLED pin and the Scanx pin are short-circuited together inside the Mdriver at the moment, or the VLED pin and the Scanx pin are not used, and all MLED anodes are directly short-circuited together outside and connected to a VLED power supply; in addition, a si-so bus interface and a clk-data bus interface are arranged between the time sequence controller and the Mdriver, so that the driving structure II has the advantages of saving the discharge function of a scanning line of the Mdriver, reducing the power consumption of the Mdriver and the process without the VLED voltage passing through the Mdriver, reducing the Flicker (Flicker) of a screen and improving the refresh Rate (Frame Rate). As shown in fig. 14 and fig. 15, fig. 14 is an example of driving the clk-data interface in the horizontal direction when the scan function is not enabled, and fig. 15 is an example of driving the clk-data interface in the vertical direction when the scan function is not enabled.

Taking fig. 14 as an example, the specific working process of the driving architecture four is described as follows:

s3: and recording the failure reason after the addressing fails. After addressing is successful, the si and the so inside the Mdriver are in short circuit together to form a si-so bus, and the next step is carried out;

The difference between the driving architecture and the driving architecture II is that the driving architecture does not enable the scan function, so that the parasitic capacitance of a scanning line (GateLine) does not need to be charged and discharged frequently, screen flicker is reduced, the screen refresh rate is improved, and the damage to human eyes is less.

The foregoing is a more detailed description of the invention in connection with specific preferred embodiments and it is not intended that the invention be limited to these specific details. For those skilled in the art to which the invention pertains, several equivalent substitutions or obvious modifications can be made without departing from the spirit of the invention, and all the properties or uses are considered to be within the scope of the invention.

Claims

1. An MLED driver, at least comprising a serial input interface and a serial output interface, wherein a × b MLEDs are arranged in an array, a shorting switch is disposed between the serial input interface and the serial output interface, wherein the positive electrodes of b MLEDs in each row are connected to a scan line so that a × b MLEDs are respectively connected to a scan line, the negative electrodes of a MLEDs in each column are connected to a data line so that a × b MLEDs are respectively connected to b data lines, each scan line is respectively connectable to a power supply, and each data line is respectively connectable to a first discharge circuit or a current output circuit through a first selection switch.

2. The MLED driver of claim 1, wherein each of the scan lines is connectable to the power supply or the second discharge circuit through a second selection switch, respectively.

3. The MLED driver of claim 1, further having a clock signal interface and a data signal interface.

4. The MLED driver of claim 1, wherein the serial input interface has a pull-up resistor or a pull-down resistor disposed therein.

5. The MLED display driving system is characterized by comprising a time schedule controller and a plurality of MLED drivers arranged in an array, wherein each MLED driver is used for driving a plurality of MLEDs arranged in the array, each MLED driver at least comprises a serial input interface and a serial output interface, a short-circuit switch is arranged between the serial input interface and the serial output interface, the serial input interfaces and the serial output interfaces between a plurality of MLED drivers in each string are sequentially connected with each other, and the serial input interfaces and the serial output interfaces at two ends of each string of MLED drivers which are sequentially connected with each other are respectively connected to first interfaces and second interfaces of a plurality of MLED drivers corresponding to each string on the time schedule controller.

6. The MLED display driving system according to claim 5, wherein each MLED driver further has a clock signal interface and a data signal interface, the clock signal interfaces and the data signal interfaces of each string of the MLED drivers with the serial input interface and the serial output interface connected to each other in turn are connected to the third interface and the fourth interface of the corresponding each string of the MLED drivers on the timing controller, respectively, to form a clock signal-data signal bus.

7. An MLED driving method using the MLED display driving system according to claim 5, comprising:

s2: the short-circuit switches between the serial input interfaces and the serial output interfaces of all the MLED drivers are turned off initially, and the timing controller sends addressing instructions to the MLED drivers connected with the corresponding first interfaces through each first interface simultaneously to complete address determination of each string of the MLED drivers so that each MLED driver obtains addressing information of the MLED driver; if the addressing fails, ending the process, and if the addressing is successful, executing step S3;

8. An MLED driving method using the MLED display driving system according to claim 6, comprising:

9. The MLED driving method according to claim 7 or 8, further comprising:

s1: configuring all of the MLED drivers to enable or disable a scan function;

s16: discharging the residual charge of the i-th row MLED;

s17: after a third predetermined time, making i ═ i + 1;

10. The MLED driving method according to claim 7 or 8, wherein a pull-up resistor or a pull-down resistor is disposed inside the serial input interface, and wherein in step S2, when the shorting switch between the serial input interface and the serial output interface of all the MLED drivers is opened, the serial input interface is connected to the pull-up resistor or the pull-down resistor; in step S3, when the shorting switch between the serial input interface and the serial output interface of all the MLED drivers is closed, the serial input interface is disconnected from the pull-up resistor or the pull-down resistor.