CN112929252B - Parallel data transmission system and method suitable for bus port - Google Patents
Parallel data transmission system and method suitable for bus port Download PDFInfo
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- CN112929252B CN112929252B CN202110508291.5A CN202110508291A CN112929252B CN 112929252 B CN112929252 B CN 112929252B CN 202110508291 A CN202110508291 A CN 202110508291A CN 112929252 B CN112929252 B CN 112929252B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40006—Architecture of a communication node
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40006—Architecture of a communication node
- H04L12/40013—Details regarding a bus controller
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/407—Bus networks with decentralised control
Abstract
The invention provides a parallel data transmission system and method suitable for a bus port, wherein the system comprises: a master device; the slave devices are connected with a first data selector and a second data selector; the control module is connected with the first data selector and the second data selector and used for controlling the first data selector and the second data selector to switch between a selection mode and a traditional mode; in a selection mode, PSEL signals sent by the master device are sent to the first data selectors through the buses, and the first data selectors select corresponding PSEL signals to be sent to the slave devices; the PREADY signal fed back by the slave device is transmitted to the second data selector, and the second data selector selects the corresponding PREADY signal to be sent to the master device through the bus. The scheme can simultaneously send the same section of data sent by the master device to the plurality of slave devices for processing, so that time and power consumption overhead of multiple operations can be saved, and the system operation efficiency is favorably improved.
Description
Technical Field
The present invention relates to the field of communication transmission technologies, and in particular, to a parallel data transmission system and method suitable for a bus port.
Background
In 4G and 5G communication systems, situations are often encountered where the same piece of data needs to be sent to multiple modules for processing. For example, the result of channel estimation needs to be sent to the measurement module for measurement while being sent to the MIMO module for processing. One bus interface that is often used in SOC system design is the AMBA APB interface. The interface protocol is a standard bus interface protocol developed by ARM company, and is widely applied to communication and other types of SOC systems.
In general, there are 1 master device and a plurality of slave devices in the APB bus. The master device can only select one slave device to perform data transmission during each transmission, and cannot simultaneously transmit data to a plurality of slave devices. Therefore, when the APB bus is applied to the 5G communication system, when one data needs to be transmitted to a plurality of modules for processing, one data can only be repeatedly transmitted for many times, which affects transmission efficiency. Therefore, a method for enabling the same piece of data or configuration information transmitted by the master device to be transmitted to a plurality of slave devices or modules at the same time for processing is needed.
Disclosure of Invention
The invention aims to provide a parallel data transmission system and a method suitable for a bus port, which can simultaneously send the same segment of data or configuration information sent by a master device to a plurality of slave devices or modules for processing, thereby saving time and power consumption overhead of multiple operations and being beneficial to improving the operation efficiency of a system.
The technical scheme provided by the invention is as follows:
the invention provides a parallel data transmission system suitable for a bus port, which comprises:
a master device;
the slave devices are connected with a first data selector and a second data selector; and
the control module is connected with the first data selector and the second data selector and used for controlling the first data selector and the second data selector to switch between a selection mode and a traditional mode;
in a selection mode, PSEL signals sent by the master device are sent to the first data selectors through buses, and the first data selectors select corresponding PSEL signals to be sent to the slave devices;
the slave device receives a PREADY signal fed back after receiving the PSEL signal and transmits the PREADY signal to the corresponding second data selector, and the second data selector selects the corresponding PREADY signal and sends the selected PREADY signal to the master device through a bus.
Specifically, in this scheme, the master device is an APB master device, and the slave devices are APB slave devices, and in other embodiments, other devices or modules with similar functions may also be selected. The first data selector and the second data selector are MUX modules.
The PSEL signal is a bus selection indicating signal and is used for indicating the selected equipment in the current transmission; the PREADY signal is used to indicate that the current write transfer is acknowledged by the slave or that the slave has issued a valid read data onto the bus.
By arranging the control module, control signals can be sent to the first data selector and the second data selector to control the first data selector and the second data selector to switch between the selection mode and the traditional mode. Specifically, in the selection mode, the above functions can be implemented, so that the master device can simultaneously send the same piece of data or configuration information to a plurality of slave devices or modules for processing; in the conventional mode, the transmission modes of the PSEL signal and the PREADY signal can be adjusted back to the conventional mode, so that the subsequent APB read operation and the normal APB write operation are not hindered.
In the prior art, an APB bus generally has 1 master device and a plurality of slave devices, and the master device can only select one slave device to perform data transmission during each transmission, and cannot simultaneously perform transmission to the plurality of slave devices. According to the scheme, the slave devices are respectively connected with the first data selector and the second data selector, PSEL signals sent by the master device can be sent to the first data selectors through buses, the first data selectors select corresponding PSEL signals to be sent to the slave devices, correspondingly, PREADY signals fed back after the slave devices receive the PSEL signals can be transmitted to the corresponding second data selectors, the second data selectors select corresponding PREADY signals to be sent to the master devices through buses, the master devices can send the same section of data or configuration information to a plurality of slave devices or modules to be processed, time and power consumption cost of multiple operations can be saved, and system operation efficiency is improved.
It should be noted that, in order to avoid affecting the operation of the system, the present solution mainly aims at that the master device can simultaneously send write operations to a plurality of slave devices, and in other embodiments, the master device can also simultaneously send other write operations to a plurality of slave devices according to usage requirements.
Further, in a selection mode, the first data selector selects a corresponding PSEL signal from PSEL signals sent by the master device to send to the slave device, and the second data selector selects a corresponding PREADY signal from PREADY signals fed back by the slave device to send to the master device;
in the conventional mode, the first data selector only selects the PSEL signal corresponding to the slave device to pass through, and the second data selector only selects the PREADY signal corresponding to the slave device to pass through.
Further, the PCLK signal, PADDR signal, PWRITE signal, PWDATA signal, PRDATA signal, and penalty signal transmitted by the master device are directly transmitted to the respective slave devices.
Specifically, in the present scheme, the master device mainly aimed at can send write operations to multiple slave devices at the same time, and the other operations, i.e. signal transmission, still adopt the traditional way of directly sending signals to the respective slave devices.
The PCLK signal is a bus clock signal and is used for providing a clock required by the normal work of the bus equipment; the PADDR signal is a bus address signal and is used for providing a target address of bus transmission; the PWRITE signal is a bus read-write operation indicating signal and is used for indicating whether the currently transmitted operation type is write operation or read operation; the PWDATA signal is a bus write data signal used to indicate the write data information of the current write transfer; the PRDATA signal is a bus read data signal and is used for indicating the read data information of the current read transmission; the PENABLE signal is used to indicate that the second phase of transmission (i.e., data or response phase) is currently in progress.
In addition, the invention also provides a parallel data transmission method suitable for the bus port, which comprises the following steps:
a first data selector and a second data selector are arranged on each slave device connected with the master device;
switching the first data selector and the second data selector between a legacy mode and a selection mode;
in a selection mode, selecting a corresponding PSEL signal from PSEL signals transmitted by the master device through a bus through the first data selector, and transmitting the PSEL signal to the slave device;
and selecting a corresponding PREADY signal from the PREADY signals fed back after the PSEL signals are received from the slave equipment through the second data selector, and sending the corresponding PREADY signal to the master equipment through a bus.
The PSEL signals sent by the master device can be sent to the first data selectors through the buses, the first data selectors select corresponding PSEL signals to be sent to the slave devices, correspondingly, the PREADY signals fed back after the slave devices receive the PSEL signals can be transmitted to the corresponding second data selectors, the second data selectors select corresponding PREADY signals to be sent to the master device through the buses, and the master device can send the same section of data or configuration information to a plurality of slave devices or modules at the same time to be processed, so that time and power consumption cost of multiple operations can be saved, and system operation efficiency is improved.
Further, in a selection mode, the first data selector selects a corresponding PSEL signal from PSEL signals sent by the master device to send to the slave device, and the second data selector selects a corresponding PREADY signal from PREADY signals fed back by the slave device to send to the master device;
in the conventional mode, the first data selector only selects the PSEL signal corresponding to the slave device to pass through, and the second data selector only selects the PREADY signal corresponding to the slave device to pass through.
Further, the PCLK signal, PADDR signal, PWRITE signal, PWDATA signal, PRDATA signal and PENABLE signal transmitted by the master device to the slave devices are directly transmitted to the respective slave devices.
Further, the master device is an APB master device, and the slave devices are all APB slave devices.
According to the parallel data transmission system and method suitable for the bus port, the first data selector and the second data selector are respectively connected to the slave devices, so that the PSEL signals sent by the master devices can be sent to the first data selectors through the buses, the first data selectors select corresponding PSEL signals to be sent to the slave devices, correspondingly, the PREADY signals fed back after the slave devices receive the PSEL signals can be transmitted to the corresponding second data selectors, the second data selectors select corresponding PREADY signals to be sent to the master devices through the buses, the master devices can send the same piece of data or configuration information to a plurality of slave devices or modules at the same time to be processed, time and power consumption overhead of multiple operations can be saved, and system operation efficiency can be improved.
Drawings
The foregoing features, technical features, advantages and embodiments of the present invention will be further explained in the following detailed description of the preferred embodiments, which is to be read in connection with the accompanying drawings.
FIG. 1 is a schematic diagram of the overall structure of an embodiment of the present invention;
FIG. 2 is a schematic diagram of a first data selector signal selection according to an embodiment of the present invention;
FIG. 3 is a second data selector signal selection schematic of an embodiment of the present invention;
FIG. 4 is a schematic diagram of a connection structure between a master device and a slave device in the prior art;
fig. 5 is a schematic overall flow chart of an embodiment of the present invention.
Reference numbers in the figures: 1-a master device; 2-a slave device; 3-a first data selector; 4-second data selector.
Detailed Description
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following description will be made with reference to the accompanying drawings. It is obvious that the drawings in the following description are only some examples of the invention, and that for a person skilled in the art, other drawings and embodiments can be derived from them without inventive effort.
For the sake of simplicity, the drawings only schematically show the parts relevant to the present invention, and they do not represent the actual structure as a product. In addition, in order to make the drawings concise and understandable, components having the same structure or function in some of the drawings are only schematically illustrated or only labeled. In this document, "one" means not only "only one" but also a case of "more than one".
Example 1
One embodiment of the present invention, as shown in fig. 1 to 3, provides a parallel data transmission system suitable for a bus port, which includes a master device 1, a plurality of slave devices 2, and a control module.
The slave devices 2 are connected with a first data selector 3 and a second data selector 4, the first data selector 3 and the second data selector 4 are MUX modules in the figure, and any one of the data selectors can be selected according to needs in a multi-path data transmission process.
The control module is connected with the first data selector 3 and the second data selector 4 and is used for controlling the first data selector 3 and the second data selector 4 to switch between a selection mode and a traditional mode.
Preferably, in the selection mode, the first data selector 3 selects a corresponding PSEL signal from the PSEL signals transmitted by the master device 1 to transmit to the slave device 2, and the second data selector 4 selects a corresponding PREADY signal from the PREADY signals fed back from the slave device 2 to transmit to the master device 1.
In the conventional mode, the first data selector 3 selects only the PSEL signal corresponding to the slave device 2 to pass through, and the second data selector 4 selects only the PREADY signal corresponding to the slave device 2 to pass through.
By providing the control module, it is possible to send control signals to the first data selector 3 and the second data selector 4 for controlling the first data selector 3 and the second data selector 4 to switch between the selection mode and the legacy mode. Specifically, in the selection mode, the above functions can be implemented, so that the master device 1 can simultaneously send the same piece of data or configuration information to a plurality of slave devices 2 or modules for processing; in the conventional mode, the transmission modes of the PSEL signal and the PREADY signal can be adjusted back to the conventional mode, so that the subsequent APB read operation and the normal APB write operation are not hindered.
In the selection mode, the PSEL signal transmitted by the master device 1 is transmitted to each first data selector 2 through the bus, and the first data selector 2 selects the corresponding PSEL signal to transmit to the slave device.
Specifically, if the master device 1 sends the PSEL signals 1 to N to each first data selector 2 through the bus, each first data selector 2 can select the corresponding PSEL signal according to its corresponding slave device 2, so that the master device 1 only needs to send a signal once and a plurality of slave devices 2 can receive signals simultaneously.
The PREADY signal fed back after the slave device 2 receives the PSEL signal is transmitted to the corresponding second data selector 4, and the second data selector 4 selects the corresponding PREADY signal to be sent to the master device 1 through the bus.
Similarly, the PREADY signal fed back from the slave device 2 after receiving the PSEL signal can be sent to its corresponding second data selector 4, and the second data selector 4 selects the corresponding PREADY signal and sends it to the master device 1 through bus aggregation.
Specifically, in this scheme, the master device 1 is an APB master device, and the slave devices 2 are APB slave devices, and in other embodiments, other devices or modules with similar functions may also be selected.
The PSEL signal is a bus selection indicating signal and is used for indicating the selected equipment in the current transmission; the PREADY signal is used to indicate that the current write transfer is acknowledged by the slave or that the slave has issued a valid read data onto the bus.
As shown in fig. 4, in the conventional art, an APB bus generally includes 1 master device and a plurality of slave devices, and the master device can only perform data transmission by selecting one slave device at each transmission, and cannot simultaneously perform transmission to the plurality of slave devices.
According to the scheme, the slave device 2 is respectively connected with the first data selector 3 and the second data selector 4, so that PSEL signals sent by the master device 1 can be sent to the first data selectors 3 through buses, the first data selector 3 selects corresponding PSEL signals to be sent to the slave device 2, correspondingly, PREADY signals fed back after the slave device 2 receives the PSEL signals can be transmitted to the corresponding second data selector 4, the second data selector 4 selects corresponding PREADY signals to be sent to the master device 1 through buses, the master device 1 can simultaneously send the same section of data or configuration information to a plurality of slave devices 2 or modules to be processed, time and power consumption overhead of multiple operations can be saved, and system operation efficiency is improved.
It should be noted that, in order to avoid affecting the operation of the system, the present solution is mainly directed to the master device 1 being capable of sending write operations to multiple slave devices 2 at the same time, and in other embodiments, the master device 1 may also be capable of sending other write operations to multiple slave devices 2 at the same time according to the use requirement.
Example 2
In an embodiment of the present invention, on the basis of embodiment 1, the PCLK signal, PADDR signal, PWRITE signal, PWDATA signal, PRDATA signal, and penalty signal transmitted by the master device 1 are directly transmitted to the respective slave devices 2.
Specifically, in the present solution, the master device 1 mainly aimed at can send write operations to multiple slave devices 2 at the same time, while the other operations, i.e. signal transmission, still adopt the traditional way of directly sending signals to the respective slave devices 2.
The PCLK signal is a bus clock signal and is used for providing a clock required by the normal work of the bus equipment; the PADDR signal is a bus address signal and is used for providing a target address of bus transmission; the PWRITE signal is a bus read-write operation indicating signal and is used for indicating whether the currently transmitted operation type is write operation or read operation; the PWDATA signal is a bus write data signal used to indicate the write data information of the current write transfer; the PRDATA signal is a bus read data signal and is used for indicating the read data information of the current read transmission; the PENABLE signal is used to indicate that the second phase of transmission (i.e., data or response phase) is currently in progress.
Example 3
An embodiment of the present invention, as shown in fig. 5, further provides a parallel data transmission method suitable for a bus port, including the steps of:
and S1, arranging a first data selector and a second data selector on each slave device connected with the master device.
Preferably, the master device is an APB master device, and the slave devices are all APB slave devices, and in other embodiments, other devices or modules with similar functions may also be selected.
And S2, switching the first data selector and the second data selector between a traditional mode and a selection mode.
In the selection mode, the first data selector selects a corresponding PSEL signal from PSEL signals sent by the master device and sends the PSEL signal to the slave device, and the second data selector selects a corresponding PREADY signal from PREADY signals fed back by the slave device and sends the PREADY signal to the master device.
In the conventional mode, the first data selector only selects the PSEL signal corresponding to the slave device to pass through, and the second data selector only selects the PREADY signal corresponding to the slave device to pass through.
By switching the first data selector and the second data selector between a traditional mode and a selection mode, the master device can simultaneously send the same piece of data or configuration information to a plurality of slave devices or modules for processing in the selection mode; in the conventional mode, the transmission modes of the PSEL signal and the PREADY signal can be adjusted back to the conventional mode, so that the subsequent APB read operation and the normal APB write operation are not hindered.
S3, in the selection mode, the first data selector selects a corresponding PSEL signal from the PSEL signals transmitted from the master device through the bus to transmit to the slave device.
Specifically, if the master device sends 1-N PSEL signals to each first data selector through the bus, each first data selector can select a corresponding PSEL signal according to its corresponding slave device, so that the master device only needs to send a signal once and a plurality of slave devices can receive the signal simultaneously.
And S4, selecting a corresponding PREADY signal from the PREADY signals fed back after the PSEL signals are received from the slave device through the second data selector, and sending the corresponding PREADY signal to the master device through the bus.
Similarly, the PREADY signal fed back by the slave device after receiving the PSEL signal can be sent to its corresponding second data selector, and the second data selector selects the corresponding PREADY signal and sends the same to the master device through the bus summary.
The PSEL signal is a bus selection indicating signal and is used for indicating the selected equipment in the current transmission; the PREADY signal is used to indicate that the current write transfer is acknowledged by the slave or that the slave has issued a valid read data onto the bus.
As shown in fig. 4, in the conventional art, an APB bus generally includes 1 master device and a plurality of slave devices, and the master device can only perform data transmission by selecting one slave device at each transmission, and cannot simultaneously perform transmission to the plurality of slave devices.
According to the scheme, the slave devices are respectively connected with the first data selector and the second data selector, PSEL signals sent by the master device can be sent to the first data selectors through buses, the first data selectors select corresponding PSEL signals to be sent to the slave devices, correspondingly, PREADY signals fed back after the slave devices receive the PSEL signals can be transmitted to the corresponding second data selectors, the second data selectors select corresponding PREADY signals to be sent to the master devices through buses, the master devices can send the same section of data or configuration information to a plurality of slave devices or modules to be processed, time and power consumption cost of multiple operations can be saved, and system operation efficiency is improved.
It should be noted that, in order to avoid affecting the operation of the system, the present solution mainly aims at that the master device can simultaneously send write operations to a plurality of slave devices, and in other embodiments, the master device can also simultaneously send other write operations to a plurality of slave devices according to usage requirements.
Example 4
An embodiment of the present invention, based on embodiment 3, directly transmits the PCLK signal, PADDR signal, PWRITE signal, PWDATA signal, PRDATA signal, and capable signal transmitted from the master device to the slave devices to the respective slave devices.
Specifically, in the present scheme, the master device mainly aimed at can send write operations to multiple slave devices at the same time, and the other operations, i.e. signal transmission, still adopt the traditional way of directly sending signals to the respective slave devices.
The PCLK signal is a bus clock signal and is used for providing a clock required by the normal work of the bus equipment; the PADDR signal is a bus address signal and is used for providing a target address of bus transmission; the PWRITE signal is a bus read-write operation indicating signal and is used for indicating whether the currently transmitted operation type is write operation or read operation; the PWDATA signal is a bus write data signal used to indicate the write data information of the current write transfer; the PRDATA signal is a bus read data signal and is used for indicating the read data information of the current read transmission; the PENABLE signal is used to indicate that the second phase of transmission (i.e., data or response phase) is currently in progress.
It should be noted that the above embodiments can be freely combined as necessary. The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.
Claims (8)
1. A parallel data transmission system adapted for use with a bus port, comprising:
a master device;
the slave devices are connected with a first data selector and a second data selector; and
the control module is connected with the first data selector and the second data selector and used for controlling the first data selector and the second data selector to switch between a selection mode and a traditional mode;
in a selection mode, PSEL signals sent by the master device are sent to the first data selectors through buses, and the first data selectors select corresponding PSEL signals to be sent to the slave devices;
the slave device receives a PREADY signal fed back after receiving the PSEL signal and transmits the PREADY signal to the corresponding second data selector, and the second data selector selects the corresponding PREADY signal and sends the selected PREADY signal to the master device through a bus.
2. A parallel data transmission system adapted for use with a bus port as claimed in claim 1, wherein: in a selection mode, the first data selector selects a corresponding PSEL signal from PSEL signals sent by the master device and sends the PSEL signal to the slave device, and the second data selector selects a corresponding PREADY signal from PREADY signals fed back by the slave device and sends the PREADY signal to the master device;
in the conventional mode, the first data selector only selects the PSEL signal corresponding to the slave device to pass through, and the second data selector only selects the PREADY signal corresponding to the slave device to pass through.
3. A parallel data transmission system adapted for use with a bus port as claimed in claim 1, wherein: the PCLK signal, PADDR signal, PWRITE signal, PWDATA signal, PRDATA signal and PENABLE signal sent by the master device are directly sent to each of the slave devices.
4. A parallel data transmission system adapted for use with a bus port as claimed in claim 1, wherein: the master device is an APB master device, and the slave devices are APB slave devices.
5. A parallel data transmission method suitable for a bus port is characterized by comprising the following steps:
a first data selector and a second data selector are arranged on each slave device connected with the master device;
switching the first data selector and the second data selector between a legacy mode and a selection mode;
in a selection mode, selecting a corresponding PSEL signal from PSEL signals transmitted by the master device through a bus through the first data selector, and transmitting the PSEL signal to the slave device;
and selecting a corresponding PREADY signal from the PREADY signals fed back after the PSEL signals are received from the slave equipment through the second data selector, and sending the corresponding PREADY signal to the master equipment through a bus.
6. The method of claim 5, wherein the bus port comprises at least one of: in a selection mode, the first data selector selects a corresponding PSEL signal from PSEL signals sent by the master device and sends the PSEL signal to the slave device, and the second data selector selects a corresponding PREADY signal from PREADY signals fed back by the slave device and sends the PREADY signal to the master device;
in the conventional mode, the first data selector only selects the PSEL signal corresponding to the slave device to pass through, and the second data selector only selects the PREADY signal corresponding to the slave device to pass through.
7. The method of claim 5, wherein the bus port comprises at least one of: and directly transmitting a PCLK signal, a PADDR signal, a PWRITE signal, a PWDATA signal, a PRDATA signal and a PENABLE signal which are transmitted to the slave devices by the master device to the respective slave devices.
8. The method of claim 5, wherein the bus port comprises at least one of: the master device is an APB master device, and the slave devices are APB slave devices.
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