CN112928937B

CN112928937B - MMC modulation method aiming at quality optimization of AC/DC voltage

Info

Publication number: CN112928937B
Application number: CN202110090428.XA
Authority: CN
Inventors: 王继慷; 王一; 马彦宾; 张�浩; 李思; 刘树; 操丰梅; 梅红明; 王皆庆; 游涛; 王立超
Original assignee: Baoding Sifang Electric Power Control Equipment Co ltd; Beijing Sifang Automation Co Ltd; Beijing Sifang Engineering Co Ltd
Current assignee: Baoding Sifang Electric Power Control Equipment Co ltd; Beijing Sifang Automation Co Ltd; Beijing Sifang Engineering Co Ltd
Priority date: 2021-01-22
Filing date: 2021-01-22
Publication date: 2022-07-22
Anticipated expiration: 2041-01-22
Also published as: CN112928937A

Abstract

Aiming at an MMC modulation method for optimizing the quality of alternating current and direct current voltages, the method solves the problem that a large number of modules simultaneously switch large fluctuation of output voltage caused by dead zones during voltage sharing through a double-threshold voltage sharing algorithm; switching between the optimization aiming at the quality of alternating current voltage and the optimization aiming at the quality of direct current voltage is realized by adjusting the relative phase of PWM (pulse width modulation) carriers of the upper bridge arm and the lower bridge arm. The invention introduces a double-threshold voltage-sharing method, controls the sequencing output of the modules by using two threshold values when the modulation output is unchanged, only performs the switching of one module when the maximum value of the voltage deviation of the module is larger than the preset secondary threshold value of the switching of a single module, reduces the overlarge voltage fluctuation caused by dead zones when a plurality of modules are switched simultaneously, and performs the full-sequencing switching when the voltage deviation is larger than the preset primary threshold value of the full-sequencing switching, thereby achieving the effect of controlling the maximum value of the voltage deviation of the modules.

Description

MMC modulation method aiming at quality optimization of AC/DC voltage

Technical Field

The invention belongs to the field of direct-current power distribution networks, and particularly relates to an MMC modulation method aiming at alternating-current and direct-current voltage quality optimization.

Background

Modular Multilevel Converters (MMC) are basic devices constituting a direct-current power distribution network, and an accurate and effective modulation mode is a basic condition for stable and efficient operation of the MMC. The MMC mainly has two modulation modes: nearest Level Modulation (NLM) and Carrier Phase shift Modulation (CPS-SPWM).

Recently, level approximation modulation is mainly used for large-scale submodule voltage-sharing control in flexible direct-current transmission, due to the fact that the number of submodules is enough, a good approximation effect can be achieved by adjusting the number of input submodules, the electric energy quality of alternating current voltage and direct current can meet requirements, and the method has the advantages of being simple in calculation, controllable in voltage sharing, convenient in module bypass and the like. However, in the application of the power distribution network, the voltage grade is lower than that of power transmission, the number of MMC sub-modules is small, the harmonic distortion rate in the output voltage is obviously increased, the output current distortion rate is increased, and the requirement of the power quality of the power distribution network cannot be met.

The carrier phase shift modulation mode has wide application in medium and low voltage cascade SVG, and the equivalent switching frequency can be controlled in a higher range by the ratio of the module number and the module switching frequency, so that the harmonic distortion rate of output voltage and current can meet the requirement of a power distribution network. However, compared with the recent level approximation, the carrier phase shift modulation is obviously insufficient when the processing modules are voltage-equalized, an additional voltage-equalizing control ring needs to be added to perform voltage-equalizing control on each module in the bridge arm, and the resource requirement of the controller is greatly increased. Meanwhile, the MMC applied to the distribution network as a series device puts higher requirements on reliability, the sub-module redundancy bypass is a necessary function, and when CPS-SPWM is adopted, because sub-module carriers need to be accurately matched to realize the improvement of equivalent switching frequency, when the sub-module redundancy bypass in a certain bridge arm exits from operation, the bridge arm needs to update the carriers of the sub-modules, and the difficulty and complexity of control are obviously increased.

In addition, in order to prevent the short circuit caused by the simultaneous conduction of an upper tube and a lower tube in the same half bridge when the power electronic device is switched, dead zone control must be introduced, however, the condition that a plurality of modules of the same bridge arm are switched simultaneously may occur in a traditional modulation method based on the recent level approximation, which causes that the plurality of modules enter the dead zone simultaneously to cause the output voltage of the bridge arm modules to fluctuate greatly, and the quality of electric energy is influenced.

Disclosure of Invention

The patent combines the advantages of the two modulation modes and overcomes the defects of the two modulation modes. An optimized sequencing modulation method is provided; and the double-threshold voltage-sharing method is provided to overcome the large voltage fluctuation caused by dead zones, and finally, the optimal switching of alternating current and direct current voltages is realized by changing the PWM carrier wave characteristics.

According to the optimized sorting method, on the basis of the traditional nearest level approximation, a single sub-module is added for PWM control, so that the accurate output of modulation in a single control period is realized, and the aim of reducing the harmonic distortion rate is fulfilled. Because the voltage equalization is still carried out in the whole modulation process in a sequencing mode, the problem of submodule bypass exit caused by carrier phase shift is solved. The method and the device have the advantage that the modulation effect is better in the distribution network MMC.

The invention specifically adopts the following technical scheme:

an MMC modulation method aiming at quality optimization of alternating current and direct current voltages is characterized by comprising the following steps:

step 1: collecting modulation voltage output of an upper bridge arm and a lower bridge arm of an MMC module, bridge arm currents of six three-phase bridge arms and module voltages of all modules of the MMC;

step 2: calculating an integer modulation part N _ on and a PWM modulation part N _ on _ rem of the modulation output of the bridge arm according to the modulation voltage output acquired in the step 1 and the average value of the module voltage;

and 3, step 3: judging the integer modulation part N _ on and the integer modulation part N _ on calculated by last control_oldComparing whether the number is changed or not, or whether the total investment is available or not; when the integer modulation part N _ on and the integer modulation part N _ on calculated by last control_oldWhen the number is compared with the change number, the output module is directly determined in a full-sequencing switching mode, and step 9 is executed; when the input is full, the output module is determined directly in a full-sequencing switching mode, and the modulation process is completed; otherwise, executing step 4;

and 4, step 4: judging the positive and negative of the integer modulation part N _ on when N is_allWhen N _ on is more than or equal to 0, the full-bridge module and the half-bridge module are in the same position, positive voltage or zero voltage is input, namely all modules are input and cut off under the same condition, and step 5 is executed; when Nfull is less than N _ on and less than 0, cutting off all half-bridge modules, only putting in the full-bridge modules, and executing the step 6; wherein, N_allThe number of all sub-modules of one bridge arm is referred to; n is a radical of hydrogen_fullThe number of full-bridge sub-modules of one bridge arm is indicated;

and 5: judging the magnitude relation between the maximum value of the voltage deviation of the module and a preset full-sequencing switching primary threshold value; when maximum value of module voltage deviation delta U_maxThe preset full-sequencing switching primary threshold value delta U is larger than_{max_ref1}Then, performing full-sequencing switching, and executing the step 9; otherwise, executing step 7;

and 6: judging the magnitude relation between the maximum value of the voltage deviation of the module and a preset full-sequencing switching primary threshold value; when maximum value of module voltage deviation delta U_maxThe preset full-sequencing switching primary threshold value delta U is larger than_{max_ref1}Then, performing full-sequencing switching, and executing the step 9; otherwise, executing step 8;

and 7: calculating the variation N of the input submodule_diff(ii) a Judging the variation N of the input submodule_diffWhether the value is 0; when the variation N of the sub-modules is inputted_diffWhen the voltage is 0, the maximum value delta U is obtained according to the voltage deviation of the module_maxSwitching a secondary threshold value delta with a preset single module_{Umax_ref2}Determining the number of input modules according to the size relationship between the input modules and the input modules, and executing the step 9; otherwise, selecting | N according to the positive and negative conditions of the variable quantity of the input sub-modules_diffI, inputting modules;

and step 8: calculating the variation N of the input submodule_diff(ii) a Judging the variation N of the input submodule_diffWhether the value is 0; when the variation N of the sub-module is input_diffWhen the voltage is 0, the maximum value delta U is obtained according to the voltage deviation of the module_maxSwitching a secondary threshold value delta with a preset single module_{Umax_ref2}Determining the number of input modules according to the size relationship between the input modules and the input modules, and executing the step 9; otherwise, selecting | N according to the positive and negative conditions of the variable quantity of the input sub-module_diffI, inputting modules;

and step 9: judging whether the decimal modulation part is equal to zero or not, and when N _ on _ rem is equal to 0, putting in no PWM module;

and when N _ on _ rem is not equal to 0, selecting one module which is most favorable for voltage equalization of the sub-modules from all the rest modules according to the iarm direction as a PWM module, and finishing modulation.

The invention further adopts the following preferred technical scheme:

in step 1, the collected voltage output comprises a DC interelectrode voltage modulation output U_dcAnd three-phase alternating voltage modulation output U_acjWherein j represents one of the phases a, b, c.

In step 2, the calculation is performed by the following formula:

N_on_jp＝[(0.5U_dc-u_acj)/U_m]

N_on_rem_jp＝(0.5U_dc-u_acj)/U_m-N_on_jp

N_on_jn＝[(0.5U_dc+u_acj)/U_m]

N_on_rem_jn＝(0.5U_dc+u_acj)/U_m-N_on_jn

n _ on is an integer modulation part, namely the number of input modules, N _ on _ rem is a PWM modulation part, subscript j represents phases a, b and c, and p \ N is an upper bridge arm and a lower bridge arm; um is the module voltage rating U_dcModulating and outputting the voltage between the direct current poles; u shape_acjThe three-phase alternating voltage is output in a modulation mode.

In step 3, when the current control is the first control, the integer modulation part N _ on is positive or negative compared with 0, and 0 is default to be positive.

In step 3, the integer modulation part N _ on and the integer modulation part N _ on calculated by the last control_oldPhase change, and N_allIf the voltage is more than N _ on and more than 0, selecting N _ on modules which are most beneficial to voltage sharing from all the modules of the bridge arm to be put into operation, and executing the step 9;

N_fullif the voltage is more than N _ on and less than 0, selecting | N _ on | modules which are most beneficial to voltage sharing from the bridge arm full-bridge module to carry out negative input, and executing the step 9;

when N _ on is positive, the module most beneficial to module voltage sharing refers to the module with the highest module voltage when the corresponding bridge arm current iarm is larger than or equal to 0, and the module with the lowest module voltage when iarm is smaller than 0;

when N _ on is negative, the module most beneficial to module voltage sharing is the module with the lowest module voltage when the corresponding bridge arm current iarm is larger than or equal to 0, and the module with the highest module voltage when iarm is smaller than 0;

in step 3, the judgment result is full investment, and N _ on is more than or equal to N_allThen, all the modules of the bridge arm are put into operation, and the modulation process is completed at the same time;

N_on≤-N_fulland then, all the full-bridge modules of the bridge arm are negatively input, and the modulation process is completed at the same time.

In step 5, the maximum module voltage deviation Δ U_maxMore than preset full-sequencing switching primary threshold value delta U_{max_ref1}According to the current bridge arm current i_armN _ on positive voltage inputs of the modules which are most beneficial to module voltage balance are selected in the direction, and zero voltage inputs of other modules of the bridge arm are selectedAnd step 9 is executed.

In step 6, the maximum module voltage deviation Δ U_maxMore than preset full-sequencing switching primary threshold value delta U_{max_ref1}According to the current bridge arm current i_armAnd selecting | N _ on | modules which are most beneficial to the voltage balance of the modules in the direction, inputting negative voltage, and inputting zero voltage of other modules of the bridge arm, and executing the step 9.

In step 7, the variation N of the submodule is inputted by the following formula_diff：

Ndiff＝N_on-N_on_old

Wherein N is_diffRefers to the amount of variation put into the sub-module.

In step 7, when the number of input modules changes by an amount N _diff0 and maximum module voltage deviation Δ U_maxMore than preset single module switching secondary threshold value delta_{Umax_ref2}Selecting a module zero voltage input which is most harmful to module voltage balance from the positive voltage input modules, selecting a module positive voltage input which is most favorable to module voltage balance from the zero voltage input modules, and executing the step 9;

maximum value of module voltage deviation DeltaU_maxLess than or equal to preset single-module switching secondary threshold value delta_{Umax_ref2}If the integer modulation output is not changed; and executing step 9;

when N _ on is positive, the module most harmful to module voltage sharing is the module with the lowest module voltage when the corresponding bridge arm current iarm is larger than or equal to 0, and the module with the highest module voltage when iarm is smaller than 0.

In step 7, when the number of input modules changes by an amount N_diffIs not 0, and N_diffWhen the voltage is more than 0, N is selected from submodules with zero voltage input_diffPutting a module positive voltage which is most beneficial to voltage balance of the submodules into operation, and executing the step 9;

N_diffif <0, | Ndiff | module zero voltage inputs most detrimental to sub-module voltage equalization are selected from sub-modules with positive voltage inputs, and step 9 is performed.

In step 8, the variation N of the submodules is input by the following formula_diff：

N_diff＝|N_on|-|N_on_old|

Wherein, N_diffRefers to the amount of variation put into the sub-module.

In step 8, the number of input modules is changed by the amount N _diff0, and maximum module voltage deviation Δ U_maxMore than preset single module switching secondary threshold value delta_{Umax_ref2}Selecting a module zero voltage input which is most harmful to module voltage balance from the negative voltage input modules, selecting a module negative voltage input which is most favorable to module voltage balance from the zero voltage input modules, and executing the step 9;

maximum value of module voltage deviation delta U_maxLess than or equal to preset single-module switching secondary threshold value delta_{Umax_ref2}If so, the integer modulation output is unchanged; and step 9 is executed;

when N _ on is negative, the module most beneficial to module voltage sharing is the module with the lowest module voltage when the corresponding bridge arm current iarm is larger than or equal to 0, and the module with the highest module voltage when iarm is smaller than 0; the module most harmful to module voltage sharing is the module with the highest module voltage when the corresponding bridge arm current iarm is larger than or equal to 0, and the module with the lowest module voltage when iarm is smaller than 0.

In step 8, the number of input modules is changed by the amount N_diffWhen not 0, and N_diffWhen the voltage is more than 0, selecting | N from submodules with zero voltage input_diffPutting the positive voltage of the | modules which are most beneficial to voltage balance of the sub-modules, and executing the step 9;

N_diffif <0, select | N from submodules with positive voltage input_diffAnd | the modules which are most harmful to the voltage equalization of the sub-modules have zero voltage input, and step 9 is executed.

In step 9, when N _ on _ rem ≠ 0 and N _ on _ rem > 0, it is determined that i_armThe direction of (a); when i is_armIf the voltage is less than 0, selecting the submodule with the lowest voltage as a PWM module from the rest submodules which are not put into use in the current direction; i.e. i_armWhen the voltage is more than 0, selecting the submodule with the highest voltage as a PWM module from the rest submodules which are not put into use in the current direction;

when N _ on _ rem is less than 0, judging i_armThe direction of (a); when i is_armIf the voltage is less than 0, selecting the submodule with the highest voltage as a PWM module from the rest submodules which are not put into use in the current direction; i all right angle_armWhen the voltage is greater than 0, the submodule with the lowest voltage is selected as the PWM module from the rest submodules which are not used in the current direction.

The invention has the following beneficial effects:

the invention introduces a double-threshold voltage-sharing method, controls the sequencing output of the modules by using two threshold values when the modulation output is unchanged, only performs the switching of one module when the maximum value of the voltage deviation of the modules is larger than the preset single-module switching secondary threshold value, reduces the overlarge voltage fluctuation caused by dead zones when a plurality of modules are switched simultaneously, and performs the full-sequencing switching when the voltage deviation is larger than the preset full-sequencing switching primary threshold value, thereby achieving the effect that the maximum value of the voltage deviation of the modules can be controlled. The method has the advantages of small calculation amount, high equivalent switching frequency, simple redundancy configuration and capability of optimizing the quality of alternating current or direct current voltage.

Drawings

FIG. 1 is an MMC topology.

FIG. 2(a) is a half-bridge sub-module topology; fig. 2(b) is a full-bridge sub-module topology.

Fig. 3 is a flowchart of a double-threshold voltage equalizing method and an optimized modulation selection method.

Fig. 4 is a schematic diagram of PWM modulation voltage output when the upper and lower arm PWM carriers are in phase.

Fig. 5 is a schematic diagram of PWM modulation voltage output when the upper and lower arm PWM carriers are inverted.

Detailed Description

The present invention will be described in detail with reference to the accompanying drawings and embodiments. The invention combines the advantages of two modulation modes in the prior art, overcomes the defects of the two control modes, and further provides an optimized sequencing modulation method, namely, on the basis of the traditional nearest level approximation, the traditional rounding method is abandoned for the remainder part in the level approximation, and the corresponding sub-module is selected for PWM control, so that the accurate output of modulation can be realized in one period, and the aim of reducing the harmonic distortion rate is fulfilled. Because the voltage equalization is still carried out in the whole modulation process in a sequencing mode, the problem of submodule bypass exit caused by carrier phase shift is solved.

In addition, in order to prevent the short circuit caused by the simultaneous conduction of an upper tube and a lower tube in the same half bridge when the power electronic device is switched, dead zone control must be introduced, however, the situation that multiple modules of the same bridge arm are switched simultaneously may occur based on the traditional modulation method of recent level approximation, which causes the situation that the multiple modules enter the dead zone simultaneously to cause the output voltage of the bridge arm modules to fluctuate greatly, and the quality of electric energy is affected.

The double-threshold voltage-sharing method is introduced to solve the problems, sequencing output of modules is controlled by two threshold values when modulation output is unchanged, when the maximum value of module voltage deviation is larger than a preset single-module switching secondary threshold value, switching of only one module is carried out, overlarge voltage fluctuation caused by dead zones when a plurality of modules are switched simultaneously is reduced, when the voltage deviation is larger than a preset full-sequencing switching primary threshold value, full-sequencing switching is carried out, and the effect that the maximum value of module voltage deviation is controllable is achieved.

In the present invention, as shown in fig. 1-2, the half-bridge module is turned on by the S1 tube, and the capacitor is switched on in the forward direction, i.e., the module is switched on at a positive voltage, and the half-bridge module is turned on by the S2 tube, i.e., the module is switched on at a zero voltage. For the full-bridge module, the S1 and S4 transistors are turned on, and the capacitor is switched in the positive direction, i.e. the module is switched in the positive voltage; the S1 and S3 transistors are turned on simultaneously or the S2 and S4 transistors are turned on simultaneously, the capacitor is bypassed, i.e., the module is switched to zero voltage, the S2 and S3 transistors are turned on simultaneously, and the capacitor is switched to the opposite phase, i.e., the module is switched to negative voltage.

When N _ on is positive, the module which is most beneficial to the voltage sharing of the module refers to the module with the highest module voltage when the corresponding bridge arm current iarm is larger than or equal to 0, and the module with the lowest module voltage when iarm is smaller than 0; the module which is most harmful to the module voltage sharing is the module with the lowest module voltage when the corresponding bridge arm current iarm is larger than or equal to 0, and the module with the highest module voltage when iarm is smaller than 0.

When N _ on is negative, the module which is most beneficial to the voltage sharing of the module refers to the module with the lowest module voltage when the corresponding bridge arm current iarm is larger than or equal to 0, and the module with the highest module voltage when iarm is smaller than 0; the module which is most harmful to module voltage sharing is the module with the highest module voltage when the corresponding bridge arm current iarm is larger than or equal to 0, and the module with the lowest module voltage when iarm is smaller than 0.

Specifically, as shown in fig. 3, the MMC ac/dc voltage modulation method of the present invention specifically includes the following steps:

step 1: and collecting the modulation voltage output of an upper bridge arm and a lower bridge arm of the MMC module, the bridge arm current of three-phase six bridge arms and the module voltage of all the MMC modules. Specifically, the voltage output includes a DC interelectrode voltage modulation output U_dcAnd three-phase alternating voltage modulation output U_acjWherein j represents one of the phases a, b, c. In the invention, all modules of the MMC comprise all full-bridge modules and half-bridge modules of an upper bridge arm and a lower bridge arm.

And 2, step: and (2) calculating an integer Modulation part and a PWM (Pulse Width Modulation) Modulation part of the Modulation output of the bridge arm according to the Modulation voltage output acquired in the step (1) and the average value of the module voltage. Specifically, the calculation formula is as follows:

N_on_jp＝[(0.5U_dc-u_acj)/U_m]

N_on_rem_jp＝(0.5U_dc-u_acj)/U_m-N_on_jp

N_on_jn＝[(0.5U_dc+u_acj)/U_m]

N_on_rem_jn＝(0.5U_dc+u_acj)/U_m-N_on_jn

n _ on is an integer modulation part, namely the number of input modules, N _ on _ rem is a PWM modulation part, subscript j is (a, b and c) phase, and p \ N is an upper bridge arm and a lower bridge arm; um is the module voltage rating U_dcModulating and outputting the voltage between the direct current poles; u shape_acjThe three-phase alternating voltage is output in a modulation mode. The following steps are control steps of any one of the bridge arms.

And step 3: judgment ofInteger modulation part N _ on and integer modulation part N _ on calculated by last control_oldWhether the comparison is changed in number or whether the comparison is full investment.

Specifically, when the integer modulation part N _ on is compared with the integer modulation part N _ on calculated by last control_oldAnd when the number is compared with the change number, the output module is directly determined in a full-sequencing switching mode. When N is_allAnd if the voltage is more than N _ on and more than 0, selecting N _ on modules which are most beneficial to voltage sharing from all the modules of the bridge arm to be put into operation, and executing the step 9. When N is present_full<N_on<And 0, selecting | N _ on | modules most beneficial to voltage sharing from the bridge arm full-bridge module for negative input, and executing the step 9.

And when the modulation is fully input, the output module is directly determined in a full-sequencing switching mode, and the modulation process is completed. That is N _ on ≧ N_allAnd meanwhile, all modules of the bridge arm are just put into the bridge arm, and the modulation process is completed. When N _ on is less than or equal to-N_fullAnd meanwhile, all the full-bridge modules of the bridge arm are negatively input, and the modulation process is completed.

Integral modulation part N _ on calculated by last control_oldAnd (4) executing the step 4 when the sign is not changed or the sign is not fully input. Wherein N is_allThe number of all sub-modules of a bridge arm is referred to; n is a radical of_fullRefers to the number of full bridge sub-modules of one bridge arm.

It should be noted that, in the present invention, when the current control is the first control, it is equivalent to that the integer modulation part N _ on compares positive and negative with 0, and 0 is positive by default.

And 4, step 4: judging the positive and negative of the integer modulation part N _ on, when N is_allWhen N _ on is more than or equal to 0, the full-bridge module and the half-bridge module are in the same position, positive voltage or zero voltage is input, namely all the modules are input and cut off under the same condition, and step 5 is executed.

And when-Nfull < N _ on <0, cutting off all half-bridge modules, putting in only the full-bridge modules, and executing the step 5.

And 5: and judging the size relation between the maximum value of the voltage deviation of the module and a preset full-sequencing switching primary threshold value. Specifically, when the module voltage deviation maximum value Δ U_maxThe preset full-sequencing switching is carried out in one stageThreshold value delta U_{max_ref1}Then, full-sequencing switching is carried out, namely, the current bridge arm current i is used_armAnd selecting | N _ on | modules with positive voltage input most beneficial to module voltage balance and other modules with zero voltage input in the bridge arm in the direction, and executing the step 9. When maximum value of module voltage deviation delta U_maxLess than or equal to preset full-sequencing switching primary threshold value delta U_{max_ref1}Then step 7 is performed.

And 6: and judging the size relation between the maximum value of the voltage deviation of the module and a preset full-sequencing switching primary threshold value. Specifically, when the module voltage deviation maximum value Δ U_maxMore than preset full-sequencing switching primary threshold value delta U_{max_ref1}Then, the full-sequencing switching is carried out, namely, the current bridge arm current i is used for switching_armAnd selecting | N _ on | modules which are most beneficial to the voltage balance of the modules in the direction, inputting negative voltage, and inputting zero voltage of other modules of the bridge arm, and executing the step 9. When maximum value of module voltage deviation delta U_maxLess than or equal to preset full-sequencing switching primary threshold value delta U_{max_ref1}Then step 8 is performed.

And 7: the variation N of the sub-modules is input by the following formula_diff(ii) a And judging the variation N of the input sub-module_diffWhether or not it is 0; when the variation N of the sub-modules is inputted_diffWhen the voltage is 0, the maximum value delta U is obtained according to the voltage deviation of the module_maxSwitching a secondary threshold value delta with a preset single module_{Umax_ref2}Determining the number of input modules according to the size relationship between the input modules and the input modules, and executing the step 9; otherwise, selecting | N according to the positive and negative conditions of the variable quantity of the input sub-modules_diffI, inputting modules;

N_diff＝N_on-N_on_old

wherein N is_diffRefers to the amount of variation put into the sub-module.

When the number of input modules changes by N_diffWhen equal to 0, the maximum value delta U is deviated according to the module voltage_maxSwitching a secondary threshold value delta with a preset single module_{Umax_ref2}The size relationship between the modules determines whether the modules are switched.

In particular, when the module voltage deviation maximum value ΔU_maxIs larger than the preset single-module switching secondary threshold value delta_{Umax_ref2}Then, a module zero voltage input most detrimental to module voltage equalization is selected from the positive voltage input modules, a module positive voltage input most beneficial to module voltage equalization is selected from the zero voltage input modules, and step 9 is performed.

If maximum value of module voltage deviation delta U_maxLess than or equal to preset single-module switching secondary threshold value delta_{Umax_ref2}The integer modulation output is unchanged. And step 9 is performed.

When the number of input modules changes by N_diffWhen not 0, and N_diff>At 0, select | N from submodules with zero voltage input_diffAnd | the positive voltage inputs of the modules which are most beneficial to the voltage equalization of the submodules, and executing the step 9.

N_diff<At 0, select | N from submodules thrown at positive voltage_diffAnd | the modules which are most harmful to the voltage equalization of the sub-modules have zero voltage input, and step 9 is executed.

And 8: the variation N of the submodules is input by the following formula_diff(ii) a And judging the variation N of the input sub-module_diffWhether or not it is 0; when the variation N of the sub-module is input_diffWhen the voltage is 0, the maximum value delta U is obtained according to the voltage deviation of the module_maxSwitching a secondary threshold value delta with a preset single module_{Umax_ref2}Determining the number of input modules according to the size relationship between the input modules and the input modules, and executing the step 9; otherwise, selecting | N according to the positive and negative conditions of the variable quantity of the input sub-modules_diffAnd I, inputting by the modules.

N_diff＝|N_on|-|N_on_old|

Wherein N is_diffRefers to the amount of variation put into the sub-module.

Specifically, when the module voltage deviation maximum value Δ U_maxPreset > predeterminedSingle module switching secondary threshold value delta_{Umax_ref2}And then selecting a module zero voltage input which is most harmful to module voltage balance from the negative voltage input modules, selecting a module negative voltage input which is most favorable to module voltage balance from the zero voltage input modules, and executing the step 9.

If the maximum value of the module voltage deviation is delta U_maxLess than or equal to preset single-module switching secondary threshold value delta_{Umax_ref2}The integer modulation output is unchanged. And step 9 is performed.

When the number of input modules changes by N_diffWhen not 0, and N_diff>At 0, select | N from the submodules with zero voltage input_diffAnd | the negative voltage input of the modules which is most beneficial to the voltage balance of the sub-modules. And step 9 is performed.

N_diff<At 0, | Ndiff | is selected from the submodules with negative voltage inputs that are most detrimental to submodule voltage equalization. And step 9 is performed.

And step 9: and judging whether the decimal modulation part is equal to zero or not, and when the N _ on _ rem is equal to 0, putting in no PWM module.

When N _ on _ rem is not equal to 0, selecting one module which is most favorable for voltage equalization of the sub-modules from all the rest modules as a PWM module according to the iarm direction. Specifically, N _ on _ rem > 0, and i is judged_armIn the direction of (i), i.e. when i_armIf the voltage is less than 0, selecting the submodule with the lowest voltage as a PWM module from the rest submodules which are not put into use in the current direction; i.e. i_armWhen the voltage exceeds 0, the submodule with the highest voltage is selected as the PWM module from the rest submodules which are not used in the current direction.

When N _ on _ rem is less than 0, judging i_armIn the direction of (i), i.e. when i_armIf the voltage is less than 0, selecting the submodule with the highest voltage as a PWM module from the rest submodules which are not put into use in the current direction; i.e. i_armWhen the voltage is greater than 0, the submodule with the lowest voltage is selected as the PWM module from the rest submodules which are not used in the current direction.

Through the above, an optimized modulation process is completed.

Next, an embodiment of the present invention will be explained.

The topological structure of the MMC is shown in fig. 1, the output characteristics of the MMC are determined by the topology, the equivalent alternating-current voltage output of a certain phase of the MMC is differential-mode voltage output by upper and lower bridge arms of the phase, the direct-current voltage output is common-mode voltage of the upper and lower bridge arms, and the characteristic formula (1) is shown.

Considering the superposition condition of PWM output modules of upper and lower bridge arms, the duty ratio of PWM is determined by modulation output, the output waveform is determined by carrier wave, triangular wave is adopted as the carrier wave of PWM, and the influence of the same phase and opposite phase of the PWM carrier waves of the upper and lower bridge arms on the MMC AC/DC equivalent output voltage is considered. The following analysis is performed by taking the case that the upper and lower arms N _ on _ rem are greater than 0, and assuming that the module voltages are equal to Um at this time, the other cases are similar.

The schematic diagram of the PWM modulation voltage output when the PWM carriers of the upper and lower bridge arms are in phase is shown in fig. 4, at this time, since the carriers of the upper and lower bridge arms are in phase, the PWM output positive voltages of the upper and lower bridge arms are mutually superposed, and when the PWM output positive voltages are superposed into an equivalent direct current output voltage, three levels of 0, Um and 2Um output appear; and the equivalent alternating current output voltage has two levels of 0 and 0.5Um output.

A schematic diagram of PWM modulation voltage output when PWM carriers of the upper and lower bridge arms are inverted is shown in fig. 5, at this time, because the carriers of the upper and lower bridge arms are inverted, the PWM output positive voltages of the upper and lower bridge arms are separated from each other, and when the PWM output positive voltages are superimposed to an equivalent dc output voltage, two level outputs of 0 and Um (or two level outputs of Um and 2 Um) appear; and the equivalent alternating current output voltage has three levels of-0.5 Um, 0 and 0.5Um output.

As can be seen from the comparison of the two groups of graphs, when the PWM carriers of the upper and lower bridge arms have the following characteristics of in-phase relative to reversed phase, the direct current outputs are more than one level, the alternating current outputs are less than one level, and the change times of the two groups of waveforms are consistent, namely the equivalent switching frequencies are consistent. And a larger number of levels in one control period means a worse power quality. Therefore, the PWM carriers of the upper and lower bridge arms are beneficial to the electric energy quality of the alternating current output voltage when in phase, and the PWM carriers of the upper and lower bridge arms are beneficial to the electric energy quality of the direct current output voltage when in phase reversal.

The PWM carrier phases of the upper and lower bridge arms can be adjusted according to the output requirement of the equipment to obtain a better output effect.

The invention introduces a double-threshold voltage-sharing method, controls the sequencing output of the modules by using two threshold values when the modulation output is unchanged, only performs the switching of one module when the maximum value of the voltage deviation of the modules is larger than the preset single-module switching secondary threshold value, reduces the overlarge voltage fluctuation caused by dead zones when a plurality of modules are switched simultaneously, and performs the full-sequencing switching when the voltage deviation is larger than the preset full-sequencing switching primary threshold value, thereby achieving the effect that the maximum value of the voltage deviation of the modules can be controlled. And the calculated amount is small, the equivalent switching frequency is high, the alternating current or direct current voltage quality can be optimized, and the redundancy configuration is simple. The invention combines the control mode to obtain high-quality AC/DC output voltage quality, and has more outstanding advantages in a distribution network MMC with less bridge arm modules.

The present applicant has described and illustrated embodiments of the present invention in detail with reference to the accompanying drawings, but it should be understood by those skilled in the art that the above embodiments are merely preferred embodiments of the present invention, and the detailed description is only for the purpose of helping the reader to better understand the spirit of the present invention, and not for limiting the scope of the present invention, and on the contrary, any improvement or modification made based on the spirit of the present invention should fall within the scope of the present invention.

Claims

1. An MMC modulation method aiming at quality optimization of alternating current and direct current voltages is characterized by comprising the following steps:

step 2: calculating an integer modulation part N _ on and a PWM modulation part N _ on _ rem of the bridge arm modulation output according to the modulation voltage output acquired in the step 1 and the average value of the module voltage, and calculating according to the following formula in the step 2:

N_on_jp＝[(0.5U_dc-u_acj)/U_m]

N_on_rem_jp＝(0.5U_dc-u_acj)/U_m-N_on_jp

N_on_jn＝[(0.5U_dc+u_acj)/U_m]

N_on_rem_jn＝(0.5U_dc+u_acj)/U_m-N_on_jn

n _ on is an integer modulation part, namely the number of input modules, N _ on _ rem is a PWM modulation part, subscript j represents phases a, b and c, and p and N are upper and lower bridge arms; um is the module voltage rating; u shape_dcModulating and outputting the voltage between the direct current poles; u shape_acjModulating and outputting three-phase alternating voltage;

and 3, step 3: judging the integer modulation part N _ on and the integer modulation part N _ on calculated by last control_oldComparing whether the number is changed or not, or whether the total investment is available or not; when the integer modulation part N _ on and the integer modulation part N _ on calculated by last control_oldWhen the number is compared with the change number, the output module is determined directly in a full-sequencing switching mode, and step 9 is executed; when the input is full, the output module is determined directly in a full-sequencing switching mode, and the modulation process is completed; otherwise, executing step 4;

and 4, step 4: judging the positive and negative of the integer modulation part N _ on when N is_allWhen N _ on is more than or equal to 0, the full-bridge module and the half-bridge module are in the same position, positive voltage or zero voltage is input, namely all modules are input and cut off under the same condition, and step 5 is executed; when Nfull is less than N _ on and less than 0, cutting off all half-bridge modules, only putting into the full-bridge modules, and executing the step 6; wherein, N_allThe number of all sub-modules of a bridge arm is referred to; n is a radical of hydrogen_fullThe number of full-bridge sub-modules of one bridge arm is indicated;

and 5: judging the magnitude relation between the maximum value of the voltage deviation of the module and a preset full-sequencing switching primary threshold value; when maximum value of module voltage deviation delta U_maxThe preset full-sequencing switching primary threshold valueΔU_{max_ref1}Then, full sequencing switching is carried out according to the current bridge arm current i_armSelecting N _ on modules which are most beneficial to the voltage balance of the modules to be subjected to positive voltage input and other modules of the bridge arm to be subjected to zero voltage input from the direction, and executing the step 9; otherwise, executing step 7; wherein, when N _ on is positive, the module most beneficial to module voltage sharing refers to the module with the highest module voltage when the corresponding bridge arm current iarm is larger than or equal to 0, iarm<The module with the lowest module voltage at 0;

step 6: judging the magnitude relation between the maximum value of the voltage deviation of the module and a preset full-sequencing switching primary threshold value; when maximum value of module voltage deviation delta U_maxThe preset full-sequencing switching primary threshold value delta U is larger than_{max_ref1}In time, full-sequencing switching is carried out according to the current bridge arm current i_armSelecting | N _ on | modules which are most beneficial to the voltage balance of the modules from the direction, inputting negative voltage, and inputting other modules of the bridge arm with zero voltage, and executing the step 9; otherwise, executing step 8; when N _ on is negative, the module most beneficial to module voltage sharing refers to the module with the lowest module voltage when the corresponding bridge arm current iarm is larger than or equal to 0, iarm<The module with the highest module voltage when 0;

and 7: calculating the variation N of the input submodule_diff(ii) a Judging the variation N of the input submodule_diffWhether or not it is 0; calculating the variation N of the input submodule by the following formula_diff：

N_diff＝N_on-N_on_old

Wherein, N_diffRefers to the amount of variation put into the submodule; when the variation N of the sub-module is input_diffWhen the voltage is 0, the maximum value delta U is obtained according to the voltage deviation of the module_maxSwitching a secondary threshold value delta with a preset single module_{Umax_ref2}Determining the number of input modules according to the size relationship between the input modules and the input modules, and executing the step 9; otherwise, selecting | N according to the positive and negative conditions of the variable quantity of the input sub-module_diffI, inputting modules and executing the step 9;

and step 8: calculating the variation N of the input submodule_diff(ii) a Judging the variation N of the input submodule_diffWhether the value is 0; calculating the variation N of the input submodule by the following formula_diff：

N_diff＝|N_on|-|N_on_old|

Wherein, N_diffMeans the amount of variation put into the submodule; when the variation N of the sub-modules is inputted_diffWhen the voltage is 0, the maximum value delta U is obtained according to the voltage deviation of the module_maxSwitching a secondary threshold value delta with a preset single module_{Umax_ref2}Determining the number of input modules according to the size relationship between the modules, and executing the step 9; otherwise, selecting | N according to the positive and negative conditions of the variable quantity of the input sub-module_diffI, inputting modules and executing the step 9;

and step 9: judging whether the decimal modulation part is equal to zero or not, and when N _ on _ rem is equal to 0, putting no PWM module into the decimal modulation part;

when N _ on _ rem is not equal to 0, selecting a module which is most beneficial to voltage balance of the sub-modules from all the rest modules according to the iarm direction as a PWM module to finish modulation; wherein, N _ on _ rem is not equal to 0, and when N _ on _ rem is more than 0, judge i_armThe direction of (a); when i is_armIf the voltage is less than 0, selecting the submodule with the lowest voltage as a PWM module from the rest submodules which are not put into use in the current direction; i.e. i_armWhen the voltage is greater than 0, selecting the submodule with the highest voltage as a PWM module from the rest submodules which are not put into use in the current direction;

when N _ on _ rem is less than 0, judging i_armThe direction of (a); when i is_armIf the voltage is less than 0, selecting the submodule with the highest voltage as a PWM module from the rest submodules which are not put into use in the current direction; i all right angle_armWhen the voltage exceeds 0, the submodule with the lowest voltage is selected as the PWM module from the rest submodules which are not used in the current direction.

2. The MMC modulation method for AC/DC voltage quality optimization of claim 1, wherein:

in step 1, the collected voltage output includes a DC interelectrode voltage modulation output U_dcAnd three-phase alternating voltage modulation output U_acjWherein j represents one of the phases a, b, c.

3. The MMC modulation method for AC/DC voltage quality optimization according to claim 1 or 2, characterized in that:

4. The MMC modulation method for AC/DC voltage quality optimization of claim 3, characterized in that:

in step 3, the integer modulation part N _ on and the integer modulation part N _ on calculated by the last control_oldPhase change, and N_allWhen N _ on is more than or equal to 0, selecting N _ on modules which are most beneficial to voltage sharing from all the modules of the bridge arm to be put into operation, and executing the step 9;

when N _ on is positive, the module most beneficial to module voltage sharing is the module with the highest module voltage when the corresponding bridge arm current iarm is larger than or equal to 0, and the module with the lowest module voltage when iarm is smaller than 0;

when N _ on is negative, the module most beneficial to module voltage sharing is the module with the lowest module voltage when the corresponding bridge arm current iarm is larger than or equal to 0, and the module with the highest module voltage when iarm is smaller than 0.

5. The MMC modulation method for AC/DC voltage quality optimization of claim 3, characterized in that:

in step 3, the judgment result is full investment, and N _ on is more than or equal to N_allThen, all the modules of the bridge arm are just put into the bridge arm, and the modulation process is completed at the same time;

6. The MMC modulation method for AC/DC voltage quality optimization of claim 1, wherein:

in step 7, when the number of input modules changes by an amount N_diff0 and maximum value of module voltage deviation Δ U_maxMore than preset single module switching secondary threshold value delta_{Umax_ref2}Selecting a module zero voltage input which is most harmful to module voltage balance from the positive voltage input modules, selecting a module positive voltage input which is most beneficial to module voltage balance from the zero voltage input modules, and executing the step 9;

maximum value of module voltage deviation delta U_maxLess than or equal to the preset second-level threshold value delta of single module switching_{Umax_ref2}If the integer modulation output is not changed; and step 9 is executed;

wherein, when N _ on is positive, the module most harmful to module voltage sharing refers to the module with the lowest module voltage when the corresponding bridge arm current iarm is larger than or equal to 0, and the module with the highest module voltage when iarm is smaller than 0.

7. The MMC modulation method of claim 1 for AC/DC voltage quality optimization, characterized in that:

in step 7, when the number of input modules changes by an amount N_diffIs not 0, and N_diffWhen the voltage is more than 0, N is selected from submodules with zero voltage input_diffPutting the positive voltage of the module which is most beneficial to voltage balance of the sub-modules, and executing the step 9;

N_diffif the voltage is less than 0, selecting | Ndiff | module zero voltage inputs which are most harmful to the voltage balance of the submodules from the submodules with positive voltage inputs, and executing a step 9;

8. The MMC modulation method for AC/DC voltage quality optimization of claim 1, wherein:

in step 8, the number of input modules is changed by the amount N_diff0, and maximum value of module voltage deviation Δ U_maxMore than preset single module switching secondary threshold value delta_{Umax_ref2}Then, one of the most negative voltage input modules is selectedSelecting a module negative voltage input which is most beneficial to the module voltage balance from the modules with zero voltage, and executing the step 9;

maximum value of module voltage deviation delta U_maxLess than or equal to preset single-module switching secondary threshold value delta_{Umax_ref2}If the integer modulation output is not changed; and step 9 is executed;

when N _ on is negative, the module most harmful to module voltage sharing is the module with the highest module voltage when the corresponding bridge arm current iarm is larger than or equal to 0, and the module with the lowest module voltage when iarm is smaller than 0.

9. The MMC modulation method for AC/DC voltage quality optimization of claim 1, wherein:

in step 8, the number of input modules is changed by an amount N_diffWhen not 0, and N_diffWhen the voltage is more than 0, selecting | N from submodules with zero voltage input_diffPutting positive voltage of the modules which are most beneficial to voltage balance of the sub-modules, and executing the step 9;

N_diffif <0, select | N from submodules thrown at positive voltage_diffI, putting the modules which are most harmful to the voltage balance of the sub-modules into zero voltage, and executing the step 9; wherein, when N _ on is negative, the module most harmful to module voltage sharing refers to the module with the highest module voltage when the corresponding bridge arm current iarm is more than or equal to 0, iarm<The module with the lowest module voltage at 0.