CN112906329A - Automatic optimization method for design parameters of integrated circuit based on system-level simulation - Google Patents

Automatic optimization method for design parameters of integrated circuit based on system-level simulation Download PDF

Info

Publication number
CN112906329A
CN112906329A CN202110295747.4A CN202110295747A CN112906329A CN 112906329 A CN112906329 A CN 112906329A CN 202110295747 A CN202110295747 A CN 202110295747A CN 112906329 A CN112906329 A CN 112906329A
Authority
CN
China
Prior art keywords
circuit
sub
parameters
design
parameter optimization
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202110295747.4A
Other languages
Chinese (zh)
Inventor
万景
宗钰
张征
黄益飞
房华
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Suzhou Fuhu Electronic Technology Co ltd
Original Assignee
Suzhou Fuhu Electronic Technology Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Suzhou Fuhu Electronic Technology Co ltd filed Critical Suzhou Fuhu Electronic Technology Co ltd
Priority to CN202110295747.4A priority Critical patent/CN112906329A/en
Publication of CN112906329A publication Critical patent/CN112906329A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/32Circuit design at the digital level
    • G06F30/33Design verification, e.g. functional simulation or model checking
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/32Circuit design at the digital level
    • G06F30/337Design optimisation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

The invention relates to the technical field of integrated circuit design, in particular to an automatic optimization method of integrated circuit design parameters based on system level simulation; the method comprises the following steps: a1, defining a design target; a2, fixed circuit architecture; a3, dividing the circuit into A sub-circuit modules; a4, uploading the combination of the sub-circuit module parameter optimization results as parameters to a main circuit; a5, the overall circuit utilizes the combination of the parameter optimization results of the sub-circuit modules to combine with the rest elements to carry out parameter optimization; a6, selecting a group of design parameters meeting the design target from the optimization results; and A7, updating the design. According to the method, the large-scale circuit parameter is optimized and decomposed into a plurality of sub-circuit parameters, the difficulty and time of circuit parameter optimization can be reduced, meanwhile, an optimized result library of a sub-circuit module can be established to be convenient for a designer to call, the design process is more convenient and efficient, and in the aspect of sub-circuit parameter optimization, two solutions are combined, so that the method can adapt to various conditions.

Description

Automatic optimization method for design parameters of integrated circuit based on system-level simulation
Technical Field
The invention relates to the technical field of integrated circuit design, in particular to an automatic optimization method of integrated circuit design parameters based on system level simulation.
Background
As shown in fig. 3, the general flow of optimization of design parameters of a simulation integrated circuit is as follows, and given design targets and circuit architectures of the simulation circuit, designers find design parameters meeting the design targets through their own experience or related optimization methods. Essentially, the method is a high-dimensional parameter optimization problem, and can be converted into a constrained nonlinear programming problem by using mathematical knowledge and solved by virtue of an optimization algorithm.
The nonlinear programming solution set obtained by the optimization algorithm allows a designer to make an optimal selection from a group of design indexes which conflict with each other, and is a fundamental way for solving the optimal design of the circuit. However, the nonlinear programming based on the optimization algorithm requires a large amount of computation, especially when circuit simulation software needs to be called to perform circuit performance index simulation. As the circuit scale increases, the factors affecting the performance parameters of the circuit increase, and the time required for optimization also increases exponentially, severely slowing down the optimization speed.
For a large circuit, the time for carrying out primary simulation by using the existing circuit simulation software is long, and parameter optimization by using an optimization algorithm needs to carry out a large amount of circuit simulation and performance parameter calculation. Therefore, the time consumed by single simulation is shortened, and the speed of optimizing the circuit parameters can be greatly improved.
Therefore, an automatic optimization method based on system-level simulation integrated circuit design parameters is provided.
Disclosure of Invention
The invention aims to provide an automatic optimization method for design parameters of an integrated circuit based on system-level simulation, which solves the problems that no related commercial software exists in the current industry, the single simulation of a large-scale circuit needs too long time, when the scale of the circuit is increased, factors influencing the performance parameters of the circuit are increased, the time required by optimization is exponentially increased, and the optimization speed is seriously slowed down.
In order to achieve the purpose, the technical scheme of the invention is as follows:
a method for automatically optimizing design parameters of an integrated circuit based on system level simulation comprises the following steps:
a1, defining a design target;
a2, fixed circuit architecture;
a3, dividing the circuit into A sub-circuit modules;
a4, uploading the combination of the sub-circuit module parameter optimization results as parameters to a main circuit;
a5, the overall circuit utilizes the combination of the parameter optimization results of the sub-circuit modules to combine with the rest elements to carry out parameter optimization;
a6, selecting a group of design parameters meeting the design target from the optimization results;
and A7, updating the design.
Specifically, in the step a4, the combination method for obtaining the sub-circuit module parameter optimization result includes:
the method comprises the following steps: and establishing a sub-circuit module library, storing corresponding parameter optimization results, and directly calling the parameter optimization results of the required sub-circuit modules when the required sub-circuit modules are in the library.
The second method comprises the following steps: and (4) concurrently calculating by using a computer to obtain the design parameter values of the components, and optimizing the parameters by using an optimization algorithm until the parameters meet the conditions set by a user.
Specifically, in the step a5, the method for optimizing the total circuit parameter includes:
the third method comprises the following steps: and establishing a macro model by utilizing the optimized performance parameters of the sub-circuit module to replace the original using method II of the sub-circuit module to optimize the parameters of the total circuit.
The method four comprises the following steps: and taking the combination of the optimized parameters of the sub-circuits as variables, combining with the residual elements, obtaining the design parameter values of the components through concurrent calculation of a computer, and optimizing the parameters by using an optimization algorithm until the parameters meet the conditions set by a user.
The invention has the beneficial effects that:
(1) the invention decomposes the optimization of a large-scale circuit into the optimization of a plurality of sub-circuit modules, solves the problems that when the scale of the circuit is increased, factors influencing the performance parameters of the circuit are increased, and the time required by the optimization is exponentially increased, and reduces the time consumption of the optimization.
(2) The invention can establish a sub-circuit module library, store the corresponding parameter optimization result, and directly call the parameter optimization result when the required sub-circuit module is in the library, thereby greatly improving the design efficiency.
(3) According to the invention, the macro model is established by utilizing the optimized performance parameters of the sub-circuit module to replace the original sub-circuit module to optimize the parameters of the total circuit, so that the time required by single optimization is reduced, and the optimization efficiency is improved.
Drawings
FIG. 1 is a detailed flow chart of the scheme of the present invention;
FIG. 2 is a flow chart summarizing the scheme of the present invention;
FIG. 3 is a flow chart of design parameter optimization for a simulation integrated circuit.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1, a method for automatically optimizing design parameters of an integrated circuit based on system level simulation includes the following steps:
a1, defining design targets, such as: designing a low dropout linear regulator;
a2, fixing a circuit architecture, wherein after the circuit architecture is fixed, the whole circuit can be changed into an actual electronic component or an abstract parameter size of a high-level component described by certain parameters;
a3, dividing the circuit into a sub-circuit modules, for example: the low-dropout linear regulator can be divided into an amplifier module, a band-gap reference source module, an output transistor and other scattered elements;
a4, uploading the combination of the parameter optimization results of the sub-module modules as parameters to a main circuit;
a5, the overall circuit utilizes the combination of the parameter optimization results of the sub-circuit modules to combine with the rest elements to carry out parameter optimization;
a6, selecting a group of design parameters meeting the design target from the optimization results;
and A7, updating the design.
Specifically, in the step a4, the combination method for obtaining the sub-circuit module parameter optimization result includes:
the method comprises the following steps: and establishing a sub-circuit module library, storing corresponding parameter optimization results, and directly calling the parameter optimization results of the required sub-circuit modules when the required sub-circuit modules are in the library.
The second method comprises the following steps: and (4) concurrently calculating by using a computer to obtain the design parameter values of the components, and optimizing the parameters by using an optimization algorithm until the parameters meet the conditions set by a user.
Specifically, in the step a5, the method for optimizing the total circuit parameter includes:
the third method comprises the following steps: and establishing a macro model by utilizing the optimized performance parameters of the sub-circuit module to replace the original using method II of the sub-circuit module to optimize the parameters of the total circuit.
The method four comprises the following steps: and taking the combination of the optimized parameters of the sub-circuits as variables, combining with the residual elements, obtaining the design parameter values of the components through concurrent calculation of a computer, and optimizing the parameters by using an optimization algorithm until the parameters meet the conditions set by a user.
Specifically, referring to fig. 2, a method for using an automatic optimization method based on system-level simulation integrated circuit design parameters includes the following steps:
b1, dividing the total circuit into A sub-circuit modules;
b2, uploading the combination of the sub-module parameter optimization results as parameters to the overall circuit, wherein the step comprises two methods: firstly, establishing a commonly used sub-circuit module library, storing a corresponding parameter optimization result, and directly calling the parameter optimization result when a required sub-circuit module is in the library; ② an optimization algorithm is used to guide the optimization of circuit parameters, the step can use genetic algorithm, also can use random, or any other algorithm.
B3, the overall circuit utilizes the combination of the sub-circuit parameter optimization results to combine with the rest of the components to perform parameter optimization, wherein the step has two methods: firstly, optimizing parameters by using a method II in the step B2; secondly, establishing a macro model by using the optimized performance parameters of the sub-circuit modules, wherein the macro model can be a simplification method, a construction method, a list method, a symbolic method or any other method, and the macro model can be a circuit, a symbol, a mathematical formula table or other forms. And (4) replacing the sub-circuit module with the macro model, and performing parameter optimization by using the method II in the step B2.
B4, selecting the finally optimized design parameters, wherein the design parameters can be a list or a drawing for selection;
b5, updating the design, wherein the step comprises the following steps: the design change can be direct netlist change or schema change. Of course, these can be implemented by software, and the development language can be python, or c, c + +, java, perl.
In summary, the following steps: the difference between the invention and the current mainstream policy software is as follows:
s1, when the current mainstream method is used for optimizing parameters of a large circuit, all the factors influencing performance parameters in the circuit are optimized simultaneously, and the efficiency is low. According to the invention, the optimization of a large circuit is decomposed into the optimization of a plurality of sub-circuit modules, so that the problems that when the circuit scale is increased, factors influencing the performance parameters of the circuit are increased, and the time required by the optimization is exponentially increased are solved, and the time consumption of the optimization is reduced;
s2, when designing a new circuit each time, the mainstream method needs to repeat all parameter optimization processes, the invention can establish a commonly used sub-circuit module library, store the corresponding parameter optimization result, and directly call the parameter optimization result when the required sub-circuit module is in the library, thereby greatly improving the design efficiency;
s3, for a large circuit, the time for one-time simulation by using the existing circuit simulation software is long, and the parameter optimization by using the optimization algorithm needs a large amount of circuit simulation, so that the time is long. According to the invention, the macro model is established by utilizing the optimized performance parameters of the sub-circuit module to replace the original sub-circuit module to optimize the parameters of the total circuit, so that the time required by single optimization is reduced, and the optimization efficiency is improved.
Finally, the above embodiments are only for illustrating the technical solutions of the present invention and not for limiting, although the present invention has been described in detail with reference to the preferred embodiments, it should be understood by those skilled in the art that modifications or equivalent substitutions may be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention, and all of them should be covered in the claims of the present invention.

Claims (3)

1. A method for automatically optimizing design parameters of an integrated circuit based on system level simulation is characterized by comprising the following steps:
a1, defining a design target;
a2, fixed circuit architecture;
a3, dividing the circuit into A sub-circuit modules;
a4, uploading the combination of the sub-circuit module parameter optimization results as parameters to a main circuit;
a5, the overall circuit utilizes the combination of the parameter optimization results of the sub-circuit modules to combine with the rest elements to carry out parameter optimization;
a6, selecting a group of design parameters meeting the design target from the optimization results;
and A7, updating the design.
2. The method of claim 1, wherein the step A4 of obtaining the combination of sub-circuit module parameter optimization results comprises:
the method comprises the following steps: and establishing a sub-circuit module library, storing corresponding parameter optimization results, and directly calling the parameter optimization results of the required sub-circuit modules when the required sub-circuit modules are in the library.
The second method comprises the following steps: and (4) concurrently calculating by using a computer to obtain the design parameter values of the components, and optimizing the parameters by using an optimization algorithm until the parameters meet the conditions set by a user.
3. The method of claim 1, wherein in step A5, the method for optimizing total circuit parameters comprises:
the third method comprises the following steps: and establishing a macro model by utilizing the optimized performance parameters of the sub-circuit module to replace the original using method II of the sub-circuit module to optimize the parameters of the total circuit.
The method four comprises the following steps: and taking the combination of the optimized parameters of the sub-circuits as variables, combining with the residual elements, obtaining the design parameter values of the components through concurrent calculation of a computer, and optimizing the parameters by using an optimization algorithm until the parameters meet the conditions set by a user.
CN202110295747.4A 2021-03-19 2021-03-19 Automatic optimization method for design parameters of integrated circuit based on system-level simulation Pending CN112906329A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202110295747.4A CN112906329A (en) 2021-03-19 2021-03-19 Automatic optimization method for design parameters of integrated circuit based on system-level simulation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202110295747.4A CN112906329A (en) 2021-03-19 2021-03-19 Automatic optimization method for design parameters of integrated circuit based on system-level simulation

Publications (1)

Publication Number Publication Date
CN112906329A true CN112906329A (en) 2021-06-04

Family

ID=76106690

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202110295747.4A Pending CN112906329A (en) 2021-03-19 2021-03-19 Automatic optimization method for design parameters of integrated circuit based on system-level simulation

Country Status (1)

Country Link
CN (1) CN112906329A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113239651A (en) * 2021-07-12 2021-08-10 苏州贝克微电子有限公司 Artificial intelligence implementation method and system for circuit design

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6618837B1 (en) * 2000-09-14 2003-09-09 Cadence Design Systems, Inc. MOSFET modeling for IC design accurate for high frequencies
CN1510733A (en) * 2002-12-24 2004-07-07 北京艾克赛利微电子技术有限公司 Transistor integrated circuit optimization method for process transplantation
US20040139405A1 (en) * 2002-12-27 2004-07-15 Sipec Corporation Optimizing designing apparatus of integrated circuit, optimizing designing method of integrated circuit, and storing medium in which program for carrying out optimizing designing method of integrated circuit is stored
US20100306722A1 (en) * 2009-05-29 2010-12-02 Lehoty David A Implementing A Circuit Using An Integrated Circuit Including Parametric Analog Elements
CN107742051A (en) * 2017-11-16 2018-02-27 复旦大学 The fast Optimization of FPGA circuitry transistor size
CN108875106A (en) * 2017-05-15 2018-11-23 中国科学院微电子研究所 Circuit design transplanting method and system
US20200410153A1 (en) * 2019-05-30 2020-12-31 Celera, Inc. Automated circuit generation
CN112417803A (en) * 2020-12-02 2021-02-26 苏州复鹄电子科技有限公司 Artificial intelligence algorithm-based automatic optimization scheme for design parameters of analog integrated circuit

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6618837B1 (en) * 2000-09-14 2003-09-09 Cadence Design Systems, Inc. MOSFET modeling for IC design accurate for high frequencies
CN1510733A (en) * 2002-12-24 2004-07-07 北京艾克赛利微电子技术有限公司 Transistor integrated circuit optimization method for process transplantation
US20040139405A1 (en) * 2002-12-27 2004-07-15 Sipec Corporation Optimizing designing apparatus of integrated circuit, optimizing designing method of integrated circuit, and storing medium in which program for carrying out optimizing designing method of integrated circuit is stored
US20100306722A1 (en) * 2009-05-29 2010-12-02 Lehoty David A Implementing A Circuit Using An Integrated Circuit Including Parametric Analog Elements
CN108875106A (en) * 2017-05-15 2018-11-23 中国科学院微电子研究所 Circuit design transplanting method and system
CN107742051A (en) * 2017-11-16 2018-02-27 复旦大学 The fast Optimization of FPGA circuitry transistor size
US20200410153A1 (en) * 2019-05-30 2020-12-31 Celera, Inc. Automated circuit generation
CN112417803A (en) * 2020-12-02 2021-02-26 苏州复鹄电子科技有限公司 Artificial intelligence algorithm-based automatic optimization scheme for design parameters of analog integrated circuit

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
刘琳: "集成电路宏模型的研究与构建", 《中国优秀硕士学位论文全文数据库 信息科技辑》, vol. 2009, no. 04, 15 April 2009 (2009-04-15), pages 135 - 171 *
程伟杰: "一种低压差高精度线性稳压器设计", 《中国优秀硕士学位论文全文数据库 工程科技Ⅱ辑》, vol. 2021, no. 02, 15 February 2021 (2021-02-15), pages 042 - 842 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113239651A (en) * 2021-07-12 2021-08-10 苏州贝克微电子有限公司 Artificial intelligence implementation method and system for circuit design
CN113239651B (en) * 2021-07-12 2021-09-17 苏州贝克微电子有限公司 Artificial intelligence implementation method and system for circuit design

Similar Documents

Publication Publication Date Title
CN112417803B (en) Automatic optimization method for design parameters of analog integrated circuit based on artificial intelligence algorithm
US10339137B2 (en) System and method for caching and parameterizing IR
CN110516789B (en) Method and device for processing instruction set in convolutional network accelerator and related equipment
CN104572895A (en) MPP (Massively Parallel Processor) database and Hadoop cluster data intercommunication method, tool and realization method
CN111241778B (en) FPGA automatic parameter adjustment optimization method and system based on machine learning
CN110216553B (en) Intelligent decision cloud service method and system for numerical control grinding of camshaft
CN112906329A (en) Automatic optimization method for design parameters of integrated circuit based on system-level simulation
CN112307577A (en) Aero-engine turbine disc optimization method based on novel whale optimization algorithm
CN110222129B (en) Credit evaluation algorithm based on relational database
CN115809063A (en) Storage process compiling method, system, electronic equipment and storage medium
CN116932174B (en) Dynamic resource scheduling method, device, terminal and medium for EDA simulation task
CN103617265A (en) Ontology query engine optimizing system based on ontology semantic information
CN103270512A (en) Intelligent architecture creator
CN115469931B (en) Instruction optimization method, device, system, equipment and medium of loop program
CN116976248A (en) Circuit design adjustment using redundant nodes
US20230004698A1 (en) Dividing a chip design flow into sub-steps using machine learning
CN114637752A (en) Connection query statement processing method, device, equipment and storage medium
CN113159599B (en) Structured analytic driving method for reservoir flood scheduling scheme
CN114924966A (en) Test case generation method and device based on database PL language
CN115454398A (en) Floating point calculation precision analysis method and system of C language program verifier
CN113761634A (en) Building structure design method based on multi-objective optimization
CN114676132A (en) Data table association method and device, storage medium and electronic equipment
Papa et al. Automatic large-scale integrated circuit synthesis using allocation-based scheduling algorithm
CN114580323A (en) Chip layout updating method and updating device thereof
Li et al. Machine Learning Based Framework for Fast Resource Estimation of RTL Designs Targeting FPGAs

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination