CN112904104A - Method for product function test by using graphical interface - Google Patents
Method for product function test by using graphical interface Download PDFInfo
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- CN112904104A CN112904104A CN202110051876.9A CN202110051876A CN112904104A CN 112904104 A CN112904104 A CN 112904104A CN 202110051876 A CN202110051876 A CN 202110051876A CN 112904104 A CN112904104 A CN 112904104A
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- 238000012360 testing method Methods 0.000 title claims abstract description 122
- 238000000034 method Methods 0.000 title claims abstract description 27
- 238000010586 diagram Methods 0.000 claims abstract description 17
- 230000000875 corresponding effect Effects 0.000 claims description 40
- 238000004891 communication Methods 0.000 claims description 12
- 238000011990 functional testing Methods 0.000 claims description 8
- 239000003086 colorant Substances 0.000 claims description 6
- 238000001514 detection method Methods 0.000 claims description 6
- 238000005070 sampling Methods 0.000 claims description 6
- 230000002093 peripheral effect Effects 0.000 description 5
- XYDVHKCVOMGRSY-UHFFFAOYSA-N 4-(4-benzylphenyl)-1,3-thiazol-2-amine Chemical compound S1C(N)=NC(C=2C=CC(CC=3C=CC=CC=3)=CC=2)=C1 XYDVHKCVOMGRSY-UHFFFAOYSA-N 0.000 description 2
- 101000928034 Homo sapiens Proteasomal ubiquitin receptor ADRM1 Proteins 0.000 description 2
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- 230000001276 controlling effect Effects 0.000 description 1
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01M—TESTING STATIC OR DYNAMIC BALANCE OF MACHINES OR STRUCTURES; TESTING OF STRUCTURES OR APPARATUS, NOT OTHERWISE PROVIDED FOR
- G01M99/00—Subject matter not provided for in other groups of this subclass
- G01M99/008—Subject matter not provided for in other groups of this subclass by doing functionality tests
Abstract
The invention provides a method for testing the product function by using a graphical interface, which is convenient to build, simple to operate and high in efficiency. The method comprises the following steps: establishing a testing device and establishing a testing environment; setting an equivalent graphic debugging interface on the upper computer according to a schematic diagram of the testing device, setting a plurality of input frames and a plurality of buttons equivalent to the relay on the graphic debugging interface, and establishing a corresponding relation between the buttons on the graphic debugging interface and the relay of the testing device and a corresponding relation between the input frames on the graphic debugging interface and circuit setting parameters of the testing device; and performing function test on the product to be tested by using the graphical debugging interface. The invention can be applied to the field of product function test.
Description
Technical Field
The invention relates to the field of product function test, in particular to a method for performing product function test by using a graphical interface.
Background
With the development of the times, various electronic products are more and more, and consumers have higher and higher requirements on the performance and parameters of the products when purchasing the products, so that the manufacturers are required to have detailed test data on the performance parameters of the products before the products leave the factory to ensure the stability of the product performance. Therefore, a manufacturer is very important to test a product before leaving a factory, and a traditional test method is that a tester inputs one instruction for each test item in a debugging stage to debug, so that the efficiency is very low, and an error occurrence point is difficult to find after an error occurs.
As for the function test, the time for an engineer to debug the machine on site is relatively urgent, and how to effectively improve the working efficiency is a concern for the engineer. Normally, an FCT function tester needs to send and receive commands continuously during the test process. In the prior art, during debugging, the receiving and sending instructions are manually edited one by one in a serial port or a network port and then sent. Such an approach may be used for a relatively small number of functional test items, but is less suitable for functional tests with hundreds or thousands of test items. Because too many instructions need to be sent and received, misspelling or omission of the instructions easily occurs in the process of sending the instructions; when the test result is incorrect after the instruction is issued, the problem needs to be checked. At this time, it is necessary to check whether the transmitted command has a response, which requires checking the commands one by one, which is very troublesome and inconvenient to find. The existing method has low efficiency in debugging and is not easy to find when errors occur.
Disclosure of Invention
The invention aims to overcome the defects of the prior art and provide a method for performing product function test by using a graphical interface, which is convenient to build, simple to operate and high in efficiency.
The technical scheme adopted by the invention is that the method comprises the following steps:
step a, building a testing device according to testing requirements: setting a test mainboard, setting a power supply circuit, a control circuit, a communication circuit and a sampling circuit on the test mainboard, setting a connector to be in electric signal connection with a product to be tested, and then establishing signal connection between the test mainboard and an upper computer;
b, arranging a plurality of relays on an electric signal circuit arranged on the test mainboard of the test device arranged in the step a according to the function test requirements of the product to be tested, and realizing the function test of the product to be tested by combining the on-off of the relays;
c, setting an equivalent graphic debugging interface on the upper computer according to the schematic diagram of the testing device set in the step b, setting a plurality of input frames and a plurality of buttons equivalent to the relays on the graphic debugging interface, establishing a corresponding relation between the buttons on the graphic debugging interface and the relays of the testing device and a corresponding relation between the input frames on the graphic debugging interface and circuit setting parameters of the testing device, wherein when a certain button is pressed down on the graphic debugging interface, the relay corresponding to the button generates corresponding actions, and when a corresponding numerical value is input into the input frame of the graphic debugging interface, the parameters of the circuit of the testing device corresponding to the input frame generate corresponding changes and output the results to the upper computer;
d, performing function test on the product to be tested by using the graphical debugging interface obtained in the step c, inputting parameters in a corresponding input frame on the graphical debugging interface when a certain function of the product to be tested needs to be tested, and then clicking a button capable of completing the function test on the graphical debugging interface to realize control on a relay on the testing device, establishing a function test path from the testing mainboard to the product to be tested and further performing the function test on the product to be tested;
and e, when a certain test is finished, correspondingly clicking a button currently participating in the test on the graphical debugging interface, namely finishing key resetting, and then performing the operation of the next functional test item until all functional test items are finished.
Furthermore, on the upper computer, a graphical debugging interface provided with an input frame and a graphical debugging interface which is provided with a button corresponding to the relay and is equivalent to the schematic diagram of the testing device are set into two independent interfaces.
Furthermore, buttons arranged on the graphical debugging interface have different colors for displaying when being pressed and in a reset state; after the input box inputs the parameters, the input box displays different colors until the next input box enters an input state.
Still further, a refresh button is further arranged on the graphical debugging interface, and when the refresh button is clicked, the currently executed instruction is marked as highlight.
In step d, the parameters input to the input block are voltage values and/or current values.
In addition, a detection button for detecting whether the input parameters of the input box meet the requirements is further arranged on the graphical debugging interface, the input value of the input box is provided with a numerical range, the detection button is pressed down to detect whether the parameter numerical value input into the input box meets the requirements, if not, a warning is given, the input box is automatically emptied, and the input is waited for re-input.
The invention has the beneficial effects that: in the invention, a testing device is set up according to the testing requirements, a plurality of relays are arranged on an electric signal circuit arranged on a testing mainboard of the testing device arranged in the step a according to the functional testing requirements of a product to be tested, the functional testing of the product to be tested can be realized by combining the on-off of the relays, an equivalent graphic debugging interface is arranged on an upper computer according to a schematic diagram of the testing device, a plurality of input frames and a plurality of buttons equivalent to the relays are arranged on the graphic debugging interface, the corresponding relation between the buttons on the graphic debugging interface and the relays of the testing device and the corresponding relation between the input frames on the graphic debugging interface and the circuit setting parameters of the testing device are set up, when a certain button is pressed down on the graphic debugging interface, the relay corresponding to the button generates corresponding action, when a corresponding numerical value is input into the input frame of the graphic debugging interface, the parameters of the circuit of the testing device corresponding to the input frame are correspondingly changed and output results to an upper computer, a graphical debugging interface is utilized to perform function testing on a product to be tested, when a certain function of the product to be tested needs to be tested, the parameters are input into the corresponding input frame on the graphical debugging interface, then a button capable of completing the function testing is clicked on the graphical debugging interface, a relay on the testing device is controlled, a function testing path from a testing mainboard to the product to be tested is established, further the function testing of the product to be tested is performed, when a certain testing is completed, the button which is currently involved in the testing is correspondingly clicked on the graphical debugging interface, namely, the button resetting is completed, and then the operation of the next function testing item is performed until all the function testing items are completed; therefore, the invention uses the graph debugging interface, sends the instruction to replace the graph, each graph corresponds to one instruction, when the external testing environment is well established, research and development testers can debug, only a mouse needs to click the configured block diagram button on the interface, the testing result can be generated, a universal meter does not need to be used for measuring point by point, the operation is convenient and fast, and the operation is clear at a glance.
Drawings
FIG. 1 is a functional block diagram of a test apparatus in an exemplary embodiment;
FIG. 2-1 is a circuit schematic of a first portion of a power supply circuit of the test apparatus in an exemplary embodiment;
FIG. 2-2 is a circuit schematic of a second portion of a power supply circuit of the test apparatus in an exemplary embodiment;
FIG. 3 is a circuit schematic of a communication circuit of the test apparatus in a specific embodiment;
FIG. 4-1 is a circuit schematic of a first portion of a control circuit of the test apparatus in an exemplary embodiment;
FIG. 4-2 is a circuit schematic of a second portion of the control circuit of the test apparatus in an exemplary embodiment;
4-3 are circuit schematics of a third portion of the control circuitry of the test apparatus in a particular embodiment;
FIGS. 4-4 are schematic circuit diagrams of a fourth portion of the control circuitry of the test apparatus in an exemplary embodiment;
FIG. 5 is a circuit schematic of a sampling circuit of the test apparatus in a specific embodiment;
FIG. 6 is a diagram of a graphical debugging interface with buttons equivalent to that of FIG. 1 established by the present invention;
FIG. 7 is a diagram of a graphical debugging interface with input boxes equivalent to that of FIG. 1, established by the present invention.
Detailed Description
The embodiments of the present invention are specifically as follows.
The method comprises the following steps:
step a, building a testing device according to testing requirements: setting a test mainboard, setting a power supply circuit, a control circuit, a communication circuit and a sampling circuit on the test mainboard, setting a connector to be in electric signal connection with a product to be tested, and then establishing signal connection between the test mainboard and an upper computer;
b, arranging a plurality of relays on an electric signal circuit arranged on the test mainboard of the test device arranged in the step a according to the function test requirements of the product to be tested, and realizing the function test of the product to be tested by combining the on-off of the relays;
c, setting an equivalent graphic debugging interface on the upper computer according to the schematic diagram of the testing device set in the step b, setting a plurality of input frames and a plurality of buttons equivalent to the relays on the graphic debugging interface, establishing a corresponding relation between the buttons on the graphic debugging interface and the relays of the testing device and a corresponding relation between the input frames on the graphic debugging interface and circuit setting parameters of the testing device, wherein when a certain button is pressed down on the graphic debugging interface, the relay corresponding to the button generates corresponding actions, and when a corresponding numerical value is input into the input frame of the graphic debugging interface, the parameters of the circuit of the testing device corresponding to the input frame generate corresponding changes and output the results to the upper computer;
d, performing function test on the product to be tested by using the graphical debugging interface obtained in the step c, inputting parameters in a corresponding input frame on the graphical debugging interface when a certain function of the product to be tested needs to be tested, and then clicking a button capable of completing the function test on the graphical debugging interface to realize control on a relay on the testing device, establishing a function test path from the testing mainboard to the product to be tested and further performing the function test on the product to be tested;
and e, when a certain test is finished, correspondingly clicking a button currently participating in the test on the graphical debugging interface, namely finishing key resetting, and then performing the operation of the next functional test item until all functional test items are finished.
And on the upper computer, setting a graphical debugging interface provided with an input frame and a graphical debugging interface which is provided with a button corresponding to the relay and is equivalent to the schematic diagram of the testing device into two independent interfaces. The buttons arranged on the graphical debugging interface have different colors for displaying when being pressed and in a reset state; after the input box inputs the parameters, the input box displays different colors until the next input box enters an input state. Still be provided with the refresh button on the graphical debugging interface, when clicking the refresh button, the instruction of being executed at present is marked as the highlight, plays the recognition effect, can promote work efficiency greatly like this. In the step d, the parameters input into the input box are voltage values and/or current values. And a detection button for detecting whether the input parameters of the input box meet the requirements is further arranged on the graphical debugging interface, the input value of the input box is provided with a numerical range, the detection button is pressed down to detect whether the parameter numerical value input into the input box meets the requirements, if not, a warning is sent, the input box is automatically emptied, and the input is waited for re-input.
The following is a more detailed description of the application of the method of the present invention to debugging, using specific examples.
Fig. 1 shows a schematic diagram of a test apparatus designed. The testing device consists of a Power Supply (PS for short), a communication circuit (USB Switch), a control circuit (ARM Board) and a sampling circuit. The functional role of each circuit and the inconvenience when debugging without using a graphical interface are described in turn as follows.
In fig. 1, Power Supply supplies operating voltage to each circuit module, ARM _ Board is a control part for controlling relays and communication, and the measurement part is performed by 34410a (digital multimeter).
The power supply circuit converts the input voltage into the working voltage required by each circuit module, and provides stable and low-noise power supply voltage for each module. FIGS. 2-1 and 2-2 are schematic circuit diagrams of Power supply circuits, wherein U13 and peripheral circuits convert D +5V into D +3V3, U12 and peripheral circuits convert 24V into 21V5, U15 and peripheral circuits convert 21V5 into 11V6, U16 and peripheral circuits convert 11V6 into 5V, U17 and peripheral circuits convert A +5V into A +3V3, D +3V3 provides voltage for ARM Board/USB Switch/BoIO Board, 21V6 provides voltage for Power Board, and REF5V provides reference voltage for BrickID.
Fig. 3 shows a communication circuit, in which a host computer is connected to the communication circuit through USB, where U7 is a USB-to-UART chip, and when K14 and SSR22 are turned on, a communication signal can be connected to a DUT, the host computer sends an instruction to the DUT (product to be tested), the DUT executes a corresponding action after receiving the instruction, and a corresponding result can be seen by the host computer.
The control circuit is a central control part of the design, controls the on-off of the relay, controls the output of the Power Board and communicates with a computer.
Fig. 4-1-4 show control circuits, wherein J4A-J4D are ARM (microprocessor), U25 is system reset circuit, U26 is EEPROM, U27 is temperature sensing IC for monitoring system temperature, and U24A-U25B are dual LVDS transceivers. LE0, CS0, SPI2_ MISO, SPI2_ MOSI, SPI2_ SCK are SPI communication ports of the control circuit, MCU _ SCL, MCU _ SDA are I2C communication ports of the temperature monitoring and EEPROM.
The sampling circuit uses a four wire resistor with 0.1% accuracy to ensure the accuracy of the measured voltage, as shown in fig. 5.
When power supply and communication are needed for a DUT, the following instructions need to be sent through the ARM Board, as shown in the system block diagram of FIG. 1, the following instructions are sent in the ARM1 port: "[999]exio set(1,bit14=1)”，“[999]exio set(1,bit14=1)”，“[999]exio set(1,bit14=1)”，“[999]exio set (1, bit14=1) ", i.e. closing relays K14, K22, K7, K8; sending a command for setting voltage, setting current and setting output at a PS1 port; setting a voltage command:
setting a current command:
and setting output:
setting PS output 5V/1A; each time requiring disconnection and by conventional methodsThe relay is closed by inputting instructions in an ARM1, so that the relay is complex and low in efficiency.
For example, fig. 6 is an equivalent graphical debugging interface made according to a schematic diagram, when a DUT is to be communicated, only the corresponding switch icon needs to be clicked, so that the DUT can be controlled, the switch icon turns red after the corresponding switch icon is clicked, for example, BIT7 and BIT8 are clicked, the switch icon turns red, which represents that K7 and K8 relays are closed, and the rest relays which are not actuated are black by default, so that which relays are actuated are conveniently checked, the corresponding switch icon is clicked again when the corresponding relay is closed, then the icon turns black, and the on and off of the relay are clear at a glance. As shown in fig. 7, the voltage and current required to be set are input in the red box, then there is voltage output by clicking "PsOn", the click "PsMeasVol" can check whether the set voltage is correct, and the click "PsMeasCurrHigh" can check the output current of the PS, so that there is no need to send an instruction at the PS1 port to check the state.
It can be seen from the above embodiments that the present invention uses a graphical interface, sends instructions to replace with graphics, each graphics corresponds to a command, and has a refresh function, and can pause and then click a refresh button during the test process, and at this time, the currently sent instructions are marked on the test interface, which can greatly improve the work efficiency.
The method has strong operability and simple use, and is suitable for debugging of various non-standard equipment; the method can enable unfamiliar engineers to quickly know the whole system, and project progress is not delayed due to human factors; the debugging of engineering personnel is facilitated, and the debugging time is saved.
Claims (6)
1. A method for product function test by using a graphical interface is characterized in that: the method comprises the following steps:
step a, building a testing device according to testing requirements: setting a test mainboard, setting a power supply circuit, a control circuit, a communication circuit and a sampling circuit on the test mainboard, setting a connector to be in electric signal connection with a product to be tested, and then establishing signal connection between the test mainboard and an upper computer;
b, arranging a plurality of relays on an electric signal circuit arranged on the test mainboard of the test device arranged in the step a according to the function test requirements of the product to be tested, and realizing the function test of the product to be tested by combining the on-off of the relays;
c, setting an equivalent graphic debugging interface on the upper computer according to the schematic diagram of the testing device set in the step b, setting a plurality of input frames and a plurality of buttons equivalent to the relays on the graphic debugging interface, establishing a corresponding relation between the buttons on the graphic debugging interface and the relays of the testing device and a corresponding relation between the input frames on the graphic debugging interface and circuit setting parameters of the testing device, wherein when a certain button is pressed down on the graphic debugging interface, the relay corresponding to the button generates corresponding actions, and when a corresponding numerical value is input into the input frame of the graphic debugging interface, the parameters of the circuit of the testing device corresponding to the input frame generate corresponding changes and output the results to the upper computer;
d, performing function test on the product to be tested by using the graphical debugging interface obtained in the step c, inputting parameters in a corresponding input frame on the graphical debugging interface when a certain function of the product to be tested needs to be tested, and then clicking a button capable of completing the function test on the graphical debugging interface to realize control on a relay on the testing device, establishing a function test path from the testing mainboard to the product to be tested and further performing the function test on the product to be tested;
and e, when a certain test is finished, correspondingly clicking a button currently participating in the test on the graphical debugging interface, namely finishing key resetting, and then performing the operation of the next functional test item until all functional test items are finished.
2. The method of claim 1, wherein the method comprises: and on the upper computer, setting a graphical debugging interface provided with an input frame and a graphical debugging interface which is provided with a button corresponding to the relay and is equivalent to the schematic diagram of the testing device into two independent interfaces.
3. The method of claim 2, wherein the method comprises: the buttons arranged on the graphical debugging interface have different colors for displaying when being pressed and in a reset state; after the input box inputs the parameters, the input box displays different colors until the next input box enters an input state.
4. The method of claim 1, wherein the method comprises: and a refreshing button is also arranged on the graphical debugging interface, and when the refreshing button is clicked, the currently executed instruction is marked as highlight.
5. The method of claim 3, wherein the method comprises: in the step d, the parameters input into the input box are voltage values and/or current values.
6. The method of claim 5, wherein the method comprises: and a detection button for detecting whether the input parameters of the input box meet the requirements is further arranged on the graphical debugging interface, the input value of the input box is provided with a numerical range, the detection button is pressed down to detect whether the parameter numerical value input into the input box meets the requirements, if not, a warning is sent, the input box is automatically emptied, and the input is waited for re-input.
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