CN112893195B - Direct current screening method for grid structure defects of compound semiconductor device - Google Patents
Direct current screening method for grid structure defects of compound semiconductor device Download PDFInfo
- Publication number
- CN112893195B CN112893195B CN202110043042.3A CN202110043042A CN112893195B CN 112893195 B CN112893195 B CN 112893195B CN 202110043042 A CN202110043042 A CN 202110043042A CN 112893195 B CN112893195 B CN 112893195B
- Authority
- CN
- China
- Prior art keywords
- semiconductor device
- compound semiconductor
- drain voltage
- voltage
- defects
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 150000001875 compounds Chemical class 0.000 title claims abstract description 34
- 239000004065 semiconductor Substances 0.000 title claims abstract description 34
- 230000007547 defect Effects 0.000 title claims abstract description 22
- 238000000034 method Methods 0.000 title claims abstract description 19
- 238000012216 screening Methods 0.000 title claims abstract description 14
- 238000012546 transfer Methods 0.000 claims abstract description 18
- 238000012360 testing method Methods 0.000 claims abstract description 11
- 229910002601 GaN Inorganic materials 0.000 claims description 3
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 claims description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 2
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 2
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 claims description 2
- AJNVQOSZGJRYEI-UHFFFAOYSA-N digallium;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[Ga+3].[Ga+3] AJNVQOSZGJRYEI-UHFFFAOYSA-N 0.000 claims description 2
- 229910001195 gallium oxide Inorganic materials 0.000 claims description 2
- 229910000449 hafnium oxide Inorganic materials 0.000 claims description 2
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 claims description 2
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 2
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 2
- 230000007847 structural defect Effects 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
- 230000005856 abnormality Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000000428 dust Substances 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 230000003252 repetitive effect Effects 0.000 description 1
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B07—SEPARATING SOLIDS FROM SOLIDS; SORTING
- B07C—POSTAL SORTING; SORTING INDIVIDUAL ARTICLES, OR BULK MATERIAL FIT TO BE SORTED PIECE-MEAL, e.g. BY PICKING
- B07C5/00—Sorting according to a characteristic or feature of the articles or material being sorted, e.g. by control effected by devices which detect or measure such characteristic or feature; Sorting by manually actuated devices, e.g. switches
- B07C5/34—Sorting according to other particular properties
- B07C5/344—Sorting according to other particular properties according to electric or electromagnetic properties
Abstract
The invention discloses a direct current screening method for a grid structure defect of a compound semiconductor device, which comprises the following steps in sequence: testing initial transfer characteristics of the compound semiconductor device; gradually increasing drain voltage, and testing transfer characteristics for multiple times; drawing transfer characteristic curves under different drain voltage conditions, and marking corresponding threshold voltages; judging whether the threshold voltage changes along with the rise of the drain voltage, if so, judging that the gate structure of the compound semiconductor device has defects, and if not, judging that the gate structure of the compound semiconductor device is complete.
Description
Technical Field
The invention belongs to the technical field of compound semiconductors, and particularly relates to a direct current screening method for defects of a device gate structure.
Background
The third generation wide band gap compound semiconductor material has the characteristics of large band gap, high breakdown voltage, high electron drift speed, strong radiation resistance and the like, and the GaN, gaAs, inP device has the characteristics of high temperature resistance, high voltage resistance, good high frequency and high power and the like. In recent years, the method is widely used in the fields of 5G base station communication, mobile phone amplifiers and the like.
The compound semiconductor device has no abnormality in the direct current screening process, but can suddenly fail in actual operation, and most of the compound semiconductor device is shown as sudden burning. Such failure is positively associated with defects, which are primarily derived from wafer processing defects, one of which is known as a gate structure defect. The cause of such defects may originate from sporadic dust, particles, etc. falling into the gate metal region, or repetitive gate pattern anomalies introduced by the lithographic process, eventually incomplete gate structures, and abnormal gate control capability under power-up conditions. When the wafer is subjected to dc screening, the drain voltage Vd in the transfer characteristic is usually not very high, which results in that the chip with the gate structure defect cannot be removed.
Disclosure of Invention
In order to solve the technical problems mentioned in the background art, the invention provides a direct current screening method for the defects of the grid structure of a compound semiconductor device.
In order to achieve the technical purpose, the technical scheme of the invention is as follows:
a DC screening method for gate structure defects of a compound semiconductor device comprises the following steps:
(1) Testing initial transfer characteristics of the compound semiconductor device;
(2) Gradually increasing drain voltage, and testing transfer characteristics for multiple times;
(3) Drawing transfer characteristic curves under different drain voltage conditions, and marking corresponding threshold voltages;
(4) Judging whether the threshold voltage changes along with the rise of the drain voltage, if so, judging that the gate structure of the compound semiconductor device has defects, and if not, judging that the gate structure of the compound semiconductor device is complete.
Further, in step (1), the drain voltage Vd0 is set to be between 1 and 100V, and the gate voltage is stepped from (Vp-10) V to (Vp+10) V, where Vp represents the threshold voltage.
Further, in step (1), the gate voltage is set to have a step value range of (0.001 to 0.1) V.
Further, in step (2), the drain voltages are set to be Vd1, vd2, vd3, … … Vdn in order, all the drain voltages are between 1 to 100v, and Vd0< Vd1< Vd2< Vd3< … … < Vdn.
Further, in step (1) and step (2), the source of the compound semiconductor device is brought to zero potential at the time of testing the transfer characteristic.
Further, the compound semiconductor device includes any one of silicon carbide, gallium oxide, gallium nitride, hafnium oxide, gallium arsenide, and indium phosphide, and a matched drain voltage is selected according to the type of the compound semiconductor device.
The beneficial effects brought by adopting the technical scheme are that:
the grid of the compound semiconductor device with the structural defect can cause the abnormity of electric field distribution under the power-on condition, so that the change of threshold voltage is caused, the threshold voltage can change along with the rise of drain voltage, a plurality of groups of transfer characteristic curves are tested by adjusting drain voltage Vd, a plurality of groups of threshold voltage Vp values are obtained, and the device with the structural defect of the grid is screened by comparing whether the Vp value changes or not.
Drawings
FIG. 1 is a flow chart of the method of the present invention;
FIG. 2 is a schematic diagram of the test results of example 1;
FIG. 3 is a schematic representation of the test results of example 2.
Detailed Description
The technical scheme of the present invention will be described in detail below with reference to the accompanying drawings.
The invention designs a direct current screening method for a grid structure defect of a compound semiconductor device, which comprises the following steps:
step 1: testing initial transfer characteristics of the compound semiconductor device;
step 2: gradually increasing drain voltage, and testing transfer characteristics for multiple times;
step 3: drawing transfer characteristic curves under different drain voltage conditions, and marking corresponding threshold voltages;
step 4: judging whether the threshold voltage changes along with the rise of the drain voltage, if so, judging that the gate structure of the compound semiconductor device has defects, and if not, judging that the gate structure of the compound semiconductor device is complete.
Example 1
The embodiment provides a direct current screening method for gate structure defects of a compound semiconductor device, the result of which is shown in fig. 1, wherein the abscissa is gate voltage, the range is from-8V to-2V, the step is 0.05V, the ordinate is drain current, the curve is a transfer characteristic curve under different drain voltages, the drain voltage Vd0 is 3V, the drain voltage vd1 is 6V, the drain voltage vd2 is 9V, the drain voltage vd3 is 12V, the drain voltage vd4 is 15V, the drain voltage vd5 is 18V, the drain voltage vd6 is 21V, the drain voltage vd7 is 24V, the drain voltage vd8 is 27V, and the drain voltage vd9 is 30V.
As can be seen from fig. 1, the threshold voltage Vp under different drain voltages Vd is shown in the following table 1, and the threshold voltage Vp is changed with the rise of the drain voltage Vd, and the variation is different from-0.6V to-0.1V, so as to determine that the device has a gate structure defect.
TABLE 1
| Vd(V) | 3 | 6 | 9 | 12 | 15 | 18 | 21 | 24 | 27 | 30 |
| Vp(V) | -3.4 | -3.45 | -3.5 | -3.6 | -3.7 | -3.75 | -3.8 | -3.9 | -3.95 | -4 |
Example 2
The embodiment provides a direct current screening method for gate structure defects of a compound semiconductor device, the result of which is shown in fig. 2, the abscissa is gate voltage, the range is from-8V to-2V, the step is 0.05V, the ordinate is drain current, the curve is a transfer characteristic curve under different drain voltages, the drain voltage Vd0 is 3V, the drain voltage vd1 is 6V, the drain voltage vd2 is 9V, the drain voltage vd3 is 12V, the drain voltage vd4 is 15V, the drain voltage vd5 is 18V, the drain voltage vd6 is 21V, the drain voltage vd7 is 24V, the drain voltage vd8 is 27V, and the drain voltage vd9 is 30V.
As can be seen from fig. 2, the threshold voltage Vp under different drain voltages Vd is shown in the following table 2, and as the drain voltage Vd increases, the threshold voltage Vp does not change, thereby determining that the gate structure of the device is complete.
TABLE 2
| Vd(V) | 3 | 6 | 9 | 12 | 15 | 18 | 21 | 24 | 27 | 30 |
| Vp(V) | -3.4 | -3.4 | -3.4 | -3.4 | -3.4 | -3.4 | -3.4 | -3.4 | -3.4 | -3.4 |
The embodiments are only for illustrating the technical idea of the present invention, and the protection scope of the present invention is not limited by the embodiments, and any modification made on the basis of the technical scheme according to the technical idea of the present invention falls within the protection scope of the present invention.
Claims (6)
1. The direct current screening method for the defects of the grid structure of the compound semiconductor device is characterized by comprising the following steps of:
(1) Testing initial transfer characteristics of the compound semiconductor device;
(2) Gradually increasing drain voltage, and testing transfer characteristics for multiple times;
(3) Drawing transfer characteristic curves under different drain voltage conditions, and marking corresponding threshold voltages;
(4) Judging whether the threshold voltage changes along with the rise of the drain voltage, if so, judging that the gate structure of the compound semiconductor device has defects, and if not, judging that the gate structure of the compound semiconductor device is complete.
2. The method of claim 1, wherein in the step (1), the drain voltage Vd0 is set to be 1-100V, and the gate voltage is stepped from (Vp-10) V to (Vp+10) V, wherein Vp represents the threshold voltage.
3. The method of claim 2, wherein in the step (1), the step value of the gate voltage is set to be (0.001-0.1) V.
4. The method of claim 2, wherein in the step (2), the drain voltages are Vd1, vd2, vd3, … … Vdn, all of which are 1-100V, and Vd0< Vd1< Vd2< Vd3< … … < Vdn.
5. The method for dc screening for defects in a gate structure of a compound semiconductor device according to claim 1, wherein in the step (1) and the step (2), a source electrode of the compound semiconductor device is brought to zero potential when a transfer characteristic is tested.
6. The method for dc screening for defects in a gate structure of a compound semiconductor device according to claim 1, wherein the compound semiconductor device comprises any one of silicon carbide, gallium oxide, gallium nitride, hafnium oxide, gallium arsenide, and indium phosphide, and the matched drain voltage is selected according to the type of the compound semiconductor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110043042.3A CN112893195B (en) | 2021-01-13 | 2021-01-13 | Direct current screening method for grid structure defects of compound semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110043042.3A CN112893195B (en) | 2021-01-13 | 2021-01-13 | Direct current screening method for grid structure defects of compound semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN112893195A CN112893195A (en) | 2021-06-04 |
| CN112893195B true CN112893195B (en) | 2024-01-23 |
Family
ID=76112842
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110043042.3A Active CN112893195B (en) | 2021-01-13 | 2021-01-13 | Direct current screening method for grid structure defects of compound semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN112893195B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114210605B (en) * | 2021-12-15 | 2023-06-23 | 株洲中车时代半导体有限公司 | Silicon carbide power semiconductor device testing method |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102073004A (en) * | 2009-11-25 | 2011-05-25 | 北京大学 | Method for testing reliability of semiconductor devices |
| CN103869230A (en) * | 2014-01-20 | 2014-06-18 | 南京大学 | Method for representing local distribution of interface state and oxide layer trap in small-sized CMOS device |
| CN104820178A (en) * | 2015-04-09 | 2015-08-05 | 深圳深爱半导体股份有限公司 | Method for screening field effect transistor with double-line defect in transfer characteristic curve |
| CN105428242A (en) * | 2015-12-30 | 2016-03-23 | 电子科技大学 | Method for modulating threshold voltage of III-group nitride semiconductor enhanced device |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP2884663B1 (en) * | 2013-12-13 | 2017-02-22 | IMEC vzw | Restoring OFF-state stress degradation of threshold voltage |
-
2021
- 2021-01-13 CN CN202110043042.3A patent/CN112893195B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102073004A (en) * | 2009-11-25 | 2011-05-25 | 北京大学 | Method for testing reliability of semiconductor devices |
| CN103869230A (en) * | 2014-01-20 | 2014-06-18 | 南京大学 | Method for representing local distribution of interface state and oxide layer trap in small-sized CMOS device |
| CN104820178A (en) * | 2015-04-09 | 2015-08-05 | 深圳深爱半导体股份有限公司 | Method for screening field effect transistor with double-line defect in transfer characteristic curve |
| CN105428242A (en) * | 2015-12-30 | 2016-03-23 | 电子科技大学 | Method for modulating threshold voltage of III-group nitride semiconductor enhanced device |
Non-Patent Citations (1)
| Title |
|---|
| 聂代祚.新型电力电子器件.兵器工业出版社,1994,第161-164页. * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN112893195A (en) | 2021-06-04 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN112893195B (en) | Direct current screening method for grid structure defects of compound semiconductor device | |
| CN112014666B (en) | Method for evaluating consistency of lightning current volt-ampere characteristics of zinc oxide arrester valve plate | |
| Van Brunt et al. | Reliability assessment of a large population of 3.3 kV, 45 A 4H-SIC MOSFETs | |
| Bulucea et al. | Trench DMOS transistor technology for high-current (100 A range) switching | |
| CN102435817A (en) | Measuring method for gate voltage-1/f noise curve of MOS (Metal-Oxide Semiconductor) transistor | |
| Zheng et al. | Characterization of early breakdown of SiC MOSFET gate oxide by voltage ramp tests | |
| Hayashi et al. | Accelerated aging for gate oxide of SiC MOSFETs under continuous switching conditions by applying advanced HTGB test | |
| CN110460015A (en) | Overvoltage crowbar, USB connector and the over-voltage protection method for USB connector | |
| CN116613199A (en) | Lateral PNP transistor based on polycrystalline silicon thermal grid and repairing method thereof | |
| Neyer et al. | Is there a perfect SiC MosFETs Device on an imperfect crystal? | |
| Shi et al. | Investigation of different screening methods on threshold voltage and gate oxide lifetime of SiC Power MOSFETs | |
| Ansell et al. | The effect of surface passivation and illumination on the device properties of AlGaN/GaN HFETs | |
| CN113761818B (en) | ESD simulation method and simulation circuit | |
| US3966515A (en) | Method for manufacturing high voltage field-effect transistors | |
| Crupi et al. | A comparative study of the oxide breakdown in short-channel nMOSFETs and pMOSFETs stressed in inversion and in accumulation regimes | |
| CN112599639A (en) | Laser SE processing method of solar cell | |
| Pintacuda et al. | Prototyping and characterization of radiation hardened SiC MOS structures | |
| CN211507573U (en) | Power device chip voltage withstand test structure | |
| Paine et al. | Fast-pulsed characterizations of RF GaN HEMTs during wearout | |
| CN112242444A (en) | High electron mobility transistor and manufacturing method thereof | |
| Veliadis et al. | Fabrication of a robust high-performance floating guard ring edge termination for power silicon carbide vertical junction field effect transistors | |
| CN111668126B (en) | Test structure and characterization method of hot hole effect of compound MISFET device | |
| Chang et al. | Robustness investigation by load pull measurement of industrial 0.25-μm AlGaN-GaN HEMTs | |
| Gajewski et al. | Analysis and resolution of a thermally accelerated early life failure mechanism in a 40 V GaN FET | |
| KR20090071994A (en) | Method for evaluating gate oxide integrity in a semiconductor wafer and structure for the same |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |