CN112893195A - Direct current screening method for gate structure defects of compound semiconductor device - Google Patents
Direct current screening method for gate structure defects of compound semiconductor device Download PDFInfo
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- CN112893195A CN112893195A CN202110043042.3A CN202110043042A CN112893195A CN 112893195 A CN112893195 A CN 112893195A CN 202110043042 A CN202110043042 A CN 202110043042A CN 112893195 A CN112893195 A CN 112893195A
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- 150000001875 compounds Chemical class 0.000 title claims abstract description 33
- 239000004065 semiconductor Substances 0.000 title claims abstract description 33
- 230000007547 defect Effects 0.000 title claims abstract description 21
- 238000000034 method Methods 0.000 title claims abstract description 19
- 238000012216 screening Methods 0.000 title claims abstract description 13
- 238000012546 transfer Methods 0.000 claims abstract description 18
- 238000012360 testing method Methods 0.000 claims abstract description 8
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 claims description 3
- 229910002601 GaN Inorganic materials 0.000 claims description 3
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 3
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 claims description 3
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 2
- AJNVQOSZGJRYEI-UHFFFAOYSA-N digallium;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[Ga+3].[Ga+3] AJNVQOSZGJRYEI-UHFFFAOYSA-N 0.000 claims description 2
- 229910001195 gallium oxide Inorganic materials 0.000 claims description 2
- 229910000449 hafnium oxide Inorganic materials 0.000 claims description 2
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 claims description 2
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 2
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 2
- 230000002159 abnormal effect Effects 0.000 description 3
- 230000000875 corresponding effect Effects 0.000 description 2
- 230000007847 structural defect Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000002596 correlated effect Effects 0.000 description 1
- 239000000428 dust Substances 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 230000003252 repetitive effect Effects 0.000 description 1
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B07—SEPARATING SOLIDS FROM SOLIDS; SORTING
- B07C—POSTAL SORTING; SORTING INDIVIDUAL ARTICLES, OR BULK MATERIAL FIT TO BE SORTED PIECE-MEAL, e.g. BY PICKING
- B07C5/00—Sorting according to a characteristic or feature of the articles or material being sorted, e.g. by control effected by devices which detect or measure such characteristic or feature; Sorting by manually actuated devices, e.g. switches
- B07C5/34—Sorting according to other particular properties
- B07C5/344—Sorting according to other particular properties according to electric or electromagnetic properties
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Abstract
The invention discloses a direct current screening method for grid structure defects of a compound semiconductor device, which sequentially comprises the following steps: testing the initial transfer characteristics of the compound semiconductor device; the drain voltage is gradually increased, and the transfer characteristics are tested for multiple times; drawing transfer characteristic curves under different drain voltage conditions, and marking corresponding threshold voltages; and judging whether the threshold voltage changes along with the rise of the drain voltage, if so, judging that the gate structure of the compound semiconductor device has defects, and if not, judging that the gate structure of the compound semiconductor device is complete.
Description
Technical Field
The invention belongs to the technical field of compound semiconductors, and particularly relates to a direct current screening method for device gate structure defects.
Background
The third generation wide band gap compound semiconductor material has the characteristics of large band gap, high breakdown voltage, high electron drift speed, strong radiation resistance and the like, and GaN, GaAs and InP devices have the characteristics of high temperature resistance, high voltage resistance, good high frequency and high power and the like. In recent years, the method is widely applied to the fields of 5G base station communication, mobile phone amplifiers and the like.
The compound semiconductor device has no abnormal phenomenon in the direct current screening process, but can suddenly lose efficacy in actual work, and most of the compound semiconductor devices are suddenly burnt. This failure is positively correlated with defects, primarily from wafer processing defects, one of which is known as gate structure defects. The reason for such defects may be that incidental dust, particles, and the like fall into the gate metal region, or a repetitive gate pattern introduced in the photolithography process is abnormal, and finally, the gate structure is incomplete, and the gate control capability under the power-up condition is abnormal. When the wafer is subjected to direct current screening, the drain voltage Vd in the transfer characteristic is usually not very high, which causes that the chips with the defects of the gate structure cannot be removed.
Disclosure of Invention
In order to solve the technical problems mentioned in the background art, the invention provides a direct current screening method for gate structure defects of a compound semiconductor device.
In order to achieve the technical purpose, the technical scheme of the invention is as follows:
a direct current screening method for defects of a gate structure of a compound semiconductor device comprises the following steps:
(1) testing the initial transfer characteristics of the compound semiconductor device;
(2) the drain voltage is gradually increased, and the transfer characteristics are tested for multiple times;
(3) drawing transfer characteristic curves under different drain voltage conditions, and marking corresponding threshold voltages;
(4) and judging whether the threshold voltage changes along with the rise of the drain voltage, if so, judging that the gate structure of the compound semiconductor device has defects, and if not, judging that the gate structure of the compound semiconductor device is complete.
Further, in step (1), the drain voltage Vd0 is set to be between 1V and 100V, and the gate voltage is set to be step-scanned from (Vp-10) V to (Vp +10) V, wherein Vp represents the threshold voltage.
Further, in step (1), the gate voltage is set to have a step value range of (0.001 × Vp | -0.1 × Vp |) V.
In step (2), the drain voltages are Vd1, Vd2, Vd3 and … … Vdn in sequence, all the drain voltages are between 1V and 100V, and Vd0< Vd1< Vd2< Vd3< … … < Vdn.
Further, in the step (1) and the step (2), in testing the transfer characteristics, the source of the compound semiconductor device is brought to zero potential.
Further, the compound semiconductor device includes any one of silicon carbide, gallium oxide, gallium nitride, hafnium oxide, gallium arsenide, and indium phosphide, and a matched drain voltage is selected according to the type of the compound semiconductor device.
Adopt the beneficial effect that above-mentioned technical scheme brought:
the grid of the compound semiconductor device with the structural defects can cause the abnormity of electric field distribution under the electrification condition, so that the change of threshold voltage is caused, the threshold voltage can change along with the rise of drain voltage, a plurality of groups of transfer characteristic curves are tested by adjusting the drain voltage Vd, a plurality of groups of threshold voltage Vp values are obtained, and the device with the structural defects of the grid is screened out by comparing whether the Vp values change or not.
Drawings
FIG. 1 is a flow chart of a method of the present invention;
FIG. 2 is a graph showing the test results of example 1;
FIG. 3 is a graph showing the test results of example 2.
Detailed Description
The technical scheme of the invention is explained in detail in the following with the accompanying drawings.
The invention designs a direct current screening method for defects of a gate structure of a compound semiconductor device, which comprises the following steps of:
step 1: testing the initial transfer characteristics of the compound semiconductor device;
step 2: the drain voltage is gradually increased, and the transfer characteristics are tested for multiple times;
and step 3: drawing transfer characteristic curves under different drain voltage conditions, and marking corresponding threshold voltages;
and 4, step 4: and judging whether the threshold voltage changes along with the rise of the drain voltage, if so, judging that the gate structure of the compound semiconductor device has defects, and if not, judging that the gate structure of the compound semiconductor device is complete.
Example 1
The embodiment provides a direct current screening method for defects of a gate structure of a compound semiconductor device, and the result is shown in fig. 1, wherein the abscissa is gate voltage, the range is from-8V to-2V, the step is 0.05V, the ordinate is drain current, the curve is a transfer characteristic curve under different drain voltages, the drain voltage Vd0 is 3V, the Vd1 is 6V, the Vd2 is 9V, the Vd3 is 12V, the Vd4 is 15V, the Vd5 is 18V, the Vd6 is 21V, the Vd7 is 24V, the Vd8 is 27V, and the Vd9 is 30V.
As can be seen from FIG. 1, the threshold voltage Vp under different drain voltage Vd conditions is shown in Table 1 below, and the threshold voltage Vp changes with the rise of the drain voltage Vd, and the variation varies from-0.6V to-0.1V, thereby determining that the device has gate structure defects.
TABLE 1
| Vd(V) | 3 | 6 | 9 | 12 | 15 | 18 | 21 | 24 | 27 | 30 |
| Vp(V) | -3.4 | -3.45 | -3.5 | -3.6 | -3.7 | -3.75 | -3.8 | -3.9 | -3.95 | -4 |
Example 2
The embodiment provides a direct current screening method for defects of a gate structure of a compound semiconductor device, and the result is shown in fig. 2, wherein the abscissa is gate voltage, the range is from-8V to-2V, the step is 0.05V, the ordinate is drain current, the curve is a transfer characteristic curve under different drain voltages, the drain voltage Vd0 is 3V, the Vd1 is 6V, the Vd2 is 9V, the Vd3 is 12V, the Vd4 is 15V, the Vd5 is 18V, the Vd6 is 21V, the Vd7 is 24V, the Vd8 is 27V, and the Vd9 is 30V.
As can be seen from fig. 2, the threshold voltage Vp under different drain voltage Vd conditions is as shown in table 2 below, and as the drain voltage Vd increases, the threshold voltage Vp does not change, so that the gate structure of the device is determined to be complete.
TABLE 2
| Vd(V) | 3 | 6 | 9 | 12 | 15 | 18 | 21 | 24 | 27 | 30 |
| Vp(V) | -3.4 | -3.4 | -3.4 | -3.4 | -3.4 | -3.4 | -3.4 | -3.4 | -3.4 | -3.4 |
The embodiments are only for illustrating the technical idea of the present invention, and the technical idea of the present invention is not limited thereto, and any modifications made on the basis of the technical scheme according to the technical idea of the present invention fall within the scope of the present invention.
Claims (6)
1. A direct current screening method for defects of a gate structure of a compound semiconductor device is characterized by comprising the following steps:
(1) testing the initial transfer characteristics of the compound semiconductor device;
(2) the drain voltage is gradually increased, and the transfer characteristics are tested for multiple times;
(3) drawing transfer characteristic curves under different drain voltage conditions, and marking corresponding threshold voltages;
(4) and judging whether the threshold voltage changes along with the rise of the drain voltage, if so, judging that the gate structure of the compound semiconductor device has defects, and if not, judging that the gate structure of the compound semiconductor device is complete.
2. The method of claim 1, wherein in the step (1), the drain voltage Vd0 is set to be between 1V and 100V, and the gate voltage is stepped from (Vp-10) V to (Vp +10) V, wherein Vp represents the threshold voltage.
3. The method of claim 2, wherein in step (1), the gate voltage is set to a step value in a range of (0.001 x | Vp | -0.1 x | Vp |) V.
4. The method of claim 2, wherein in the step (2), the drain voltages are Vd1, Vd2, Vd3 and … … Vdn in sequence, all the drain voltages are between 1 and 100V, and Vd0< Vd1< Vd2< Vd3< … … < Vdn.
5. The method for screening gate structure defects of a compound semiconductor device according to claim 1, wherein in the step (1) and the step (2), the source of the compound semiconductor device is brought to zero potential in testing transfer characteristics.
6. The method of claim 1, wherein the compound semiconductor device comprises any one of silicon carbide, gallium oxide, gallium nitride, hafnium oxide, gallium arsenide, and indium phosphide, and the drain voltage is selected according to the type of the compound semiconductor device.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114210605A (en) * | 2021-12-15 | 2022-03-22 | 株洲中车时代半导体有限公司 | Test method of silicon carbide power semiconductor device |
Citations (5)
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|---|---|---|---|---|
| CN102073004A (en) * | 2009-11-25 | 2011-05-25 | 北京大学 | Method for testing reliability of semiconductor devices |
| CN103869230A (en) * | 2014-01-20 | 2014-06-18 | 南京大学 | Method for representing local distribution of interface state and oxide layer trap in small-sized CMOS device |
| US20150171857A1 (en) * | 2013-12-13 | 2015-06-18 | Imec Vzw | Restoring OFF-State Stress Degradation of Threshold Voltage |
| CN104820178A (en) * | 2015-04-09 | 2015-08-05 | 深圳深爱半导体股份有限公司 | Method for screening field effect transistor with double-line defect in transfer characteristic curve |
| CN105428242A (en) * | 2015-12-30 | 2016-03-23 | 电子科技大学 | Method for modulating threshold voltage of III-group nitride semiconductor enhanced device |
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Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102073004A (en) * | 2009-11-25 | 2011-05-25 | 北京大学 | Method for testing reliability of semiconductor devices |
| US20150171857A1 (en) * | 2013-12-13 | 2015-06-18 | Imec Vzw | Restoring OFF-State Stress Degradation of Threshold Voltage |
| CN103869230A (en) * | 2014-01-20 | 2014-06-18 | 南京大学 | Method for representing local distribution of interface state and oxide layer trap in small-sized CMOS device |
| CN104820178A (en) * | 2015-04-09 | 2015-08-05 | 深圳深爱半导体股份有限公司 | Method for screening field effect transistor with double-line defect in transfer characteristic curve |
| CN105428242A (en) * | 2015-12-30 | 2016-03-23 | 电子科技大学 | Method for modulating threshold voltage of III-group nitride semiconductor enhanced device |
Non-Patent Citations (1)
| Title |
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| 华东师范大学: "MOSFET的阈值电压", pages 161 - 164, Retrieved from the Internet <URL:https：//www.docin.com/p-2305609235.html> * |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114210605A (en) * | 2021-12-15 | 2022-03-22 | 株洲中车时代半导体有限公司 | Test method of silicon carbide power semiconductor device |
| CN114210605B (en) * | 2021-12-15 | 2023-06-23 | 株洲中车时代半导体有限公司 | Silicon carbide power semiconductor device testing method |
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