CN112886542A

CN112886542A - Current protection circuit, PFC circuit and AC/DC converter

Info

Publication number: CN112886542A
Application number: CN201911203165.8A
Authority: CN
Inventors: 石磊; 李志智
Original assignee: Astec International Ltd
Current assignee: Astec International Ltd
Priority date: 2019-11-29
Filing date: 2019-11-29
Publication date: 2021-06-01

Abstract

The present disclosure provides a current protection circuit for a Power Factor Corrector (PFC) circuit, a PFC circuit having the current protection circuit, and an ac/dc converter having the PFC circuit. The current protection circuit according to the present disclosure senses a reverse current flowing through a low frequency switching transistor of a PFC circuit and transmits the sensed reverse current to a controller of the PFC, wherein the controller turns off the low frequency switching transistor and the high frequency switching transistor of the power factor corrector circuit when the sensed reverse current is greater than a preset reverse current threshold. The current protection circuit according to the present disclosure enables a short circuit to be avoided in the PFC circuit even in the case where the polarity of the input voltage changes suddenly, thereby ensuring device safety of the PFC topology.

Description

Current protection circuit, PFC circuit and AC/DC converter

Technical Field

The present disclosure relates to the field of power supplies, and more particularly, to current protection circuits for Power Factor Corrector (PFC) topologies. In addition, the present disclosure also relates to a PFC circuit having the current protection circuit and an alternating current/direct current (AC/DC) converter using the PFC circuit.

Background

A large number of electronic devices require the use of an AC/DC converter to convert low frequency mains AC power to DC power that the electronic devices can use directly. The PFC topology has advantages of a small number of components, low common mode noise, high conversion efficiency, and the like, and thus is widely used in AC/DC converters.

The PFC topology requires the switching device to be turned off before the zero crossing point of the input voltage to avoid the occurrence of a short circuit phenomenon, which causes damage to the circuit system. However, the current protection circuit for the PFC topology cannot protect an input voltage having a sudden change in polarity, for example, an input voltage having a square waveform.

Disclosure of Invention

The following presents a simplified summary of the disclosure in order to provide a basic understanding of some aspects of the disclosure. However, it should be understood that this summary is not an exhaustive overview of the disclosure. It is not intended to identify key or critical elements of the disclosure or to delineate the scope of the disclosure. Its sole purpose is to present some concepts of the disclosure in a simplified form as a prelude to the more detailed description that is presented later.

In view of the above problems, an object of at least one embodiment of the present disclosure is to provide a current protection circuit for a PFC topology, which can prevent a short circuit from occurring in the PFC circuit even in the case where the polarity of an input voltage is suddenly changed, thereby ensuring device safety of the PFC topology.

According to one aspect of the present disclosure, there is provided a current protection circuit for a Power Factor Corrector (PFC) circuit that senses a reverse current flowing through a low frequency switching transistor of the PFC circuit and transmits the sensed reverse current to a controller of the PFC circuit, wherein the controller turns off the low frequency switching transistor and a high frequency switching transistor of the PFC circuit when the sensed reverse current is greater than a preset reverse current threshold.

According to another aspect of the present disclosure, there is provided a PFC circuit including the current protection circuit according to the above aspect of the present disclosure.

According to another aspect of the present disclosure, there is provided an alternating current/direct current converter including a PFC circuit according to the above aspect of the present disclosure, a direct current/direct current (DC/DC) circuit; and a controller for controlling the PFC circuit and the DC/DC circuit.

The current protection circuit for the PFC topological structure has the advantages of simple structure, small size and quick response, and can ensure the device safety of the PFC circuit under various input voltage waveforms.

Additional aspects of the disclosed embodiments are set forth in the description section that follows, wherein the detailed description is presented to fully disclose preferred embodiments of the disclosed embodiments without imposing limitations thereon.

Drawings

The above and other objects, features and advantages of the present disclosure will be more readily understood by reference to the following description of embodiments of the present disclosure taken in conjunction with the accompanying drawings, in which:

FIG. 1 is a block diagram of a typical two-stage AC/DC converter;

fig. 2 is a circuit diagram of a typical totem-pole PFC topology circuit;

fig. 3 and 4 are schematic diagrams of the occurrence of a short circuit in a totem-pole PFC topology circuit;

fig. 5 is a schematic circuit diagram of a PFC topology incorporating a current protection circuit according to one embodiment of the present disclosure;

fig. 6 is a schematic circuit diagram of a PFC topology incorporating a current protection circuit according to another embodiment of the present disclosure;

fig. 7A is a waveform diagram showing a power supply input voltage and a drain-source current flowing through a low frequency switching transistor in a normal operation condition of a PFC circuit according to an embodiment of the present disclosure;

fig. 7B is a waveform diagram showing the drain-source current flowing through the upper arm low-frequency switching transistor and the gate-source voltage of each low-frequency switching transistor at the time of transient from the negative half-cycle to the positive half-cycle of the power supply input voltage of the PFC circuit according to the embodiment of the present disclosure; and

fig. 7C is a waveform diagram illustrating the drain-source current flowing through the lower arm low frequency switching transistor and the gate-source voltage of each low frequency switching transistor at the time of a transient from the positive half cycle to the negative half cycle of the power supply input voltage of the PFC circuit according to the embodiment of the present disclosure.

Detailed Description

Hereinafter, some embodiments of the present disclosure will be described in detail with reference to the accompanying illustrative drawings. When elements of the drawings are denoted by reference numerals, the same elements will be denoted by the same reference numerals although the same elements are shown in different drawings. Further, in the following description of the present disclosure, a detailed description of known functions and configurations incorporated herein will be omitted when it may make the subject matter of the present disclosure unclear.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used herein, the singular forms are intended to include the plural forms as well, unless the context indicates otherwise. It will be further understood that the terms "comprises," "comprising," and "having," when used in this specification, are intended to specify the presence of stated features, entities, operations, and/or components, but do not preclude the presence or addition of one or more other features, entities, operations, and/or components.

Unless otherwise defined, all terms used herein including technical and scientific terms have the same meaning as commonly understood by one of ordinary skill in the art to which the inventive concept belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure. The present disclosure may be practiced without some or all of these specific details. In other instances, to avoid obscuring the disclosure with unnecessary detail, only components that are germane to the aspects in accordance with the disclosure are shown in the drawings, while other details that are not germane to the disclosure are omitted.

Hereinafter, preferred embodiments according to the present disclosure will be described in detail with reference to the accompanying drawings.

Fig. 1 shows a block diagram of a typical two-stage AC/DC converter. As shown in fig. 1, the AC/DC converter includes a PFC circuit stage, a DC/DC circuit stage, and a controller. The PFC circuit stage is used for receiving alternating-current input voltage, executing power factor correction, enabling input current to have the same frequency and phase as the input voltage, and therefore restraining harmonic waves to avoid polluting a power grid and outputting output voltage with power frequency ripples.

The DC/DC circuit stage is used for converting the power output by the PFC circuit stage into direct current power required by electronic equipment, and meanwhile, electric isolation is achieved. For the DC/DC circuit stage, it may be implemented in the form of, for example, an LLC transformer.

The controller is for providing control signals to the PFC circuit stage and the DC/DC circuit stage. In particular, the controller is configured to provide gate drive signals to the switching transistors in the PFC circuit stage and the DC/DC circuit stage. Typically, the controller is implemented by a Digital Signal Processor (DSP).

Since two-stage AC/DC converters are known to the person skilled in the art, the circuit structure and the basic principles of a two-stage AC/DC converter will not be described in more detail here for the sake of brevity.

As an example, fig. 2 shows a typical totem-pole PFC topology circuit 200.

As shown in fig. 2, the high frequency switching transistors Q1 and Q2 constitute a high frequency leg operating in a high frequency PWM mode, and the low frequency switching transistors Q3 and Q4 constitute a low frequency leg operating at a power frequency switching cycle. In fig. 2, l (live) denotes a positive power terminal of the input ac voltage, which is connected to a first circuit node N1 between the high-frequency switching transistors Q1 and Q2 of the high-frequency arm, and N (neutral) denotes a negative power terminal of the input ac voltage, which is connected to a second circuit node N2 between the low-frequency switching transistors Q3 and Q4 of the low-frequency arm. Further, C1 denotes a load capacitor.

In some embodiments of the present disclosure, gallium nitride (GaN) transistors and silicon carbide (SiC) transistors may be used to implement the high frequency switching transistors Q1 and Q2. In addition, Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) with low on-resistance may be used to implement the low frequency switching transistors Q3 and Q4.

During operation of the circuit shown in fig. 2, the MOSFET switching transistor Q4 is on and the MOSFET switching transistor Q3 is off during positive half cycles of the input voltage, and the MOSFET switching transistor Q3 is on and the MOSFET switching transistor Q4 is off during negative half cycles of the input voltage.

The primary current path contains only one high frequency switching transistor (Q1 or Q2) and one low frequency switching transistor (Q4 or Q3) to power the load, both in the positive and negative half cycles of the input voltage of fig. 2.

In order to prevent the bridge arm from going through, it is necessary to set a dead time between the two high frequency switching transistors Q1 and Q2 of the high frequency bridge arm. In addition, the totem-pole PFC topology has the problem of current spikes near the ac voltage zero crossing. Therefore, the turn-on timings of the respective switching transistors Q1-Q4 are generally controlled at a specific timing using an external controller. As shown in fig. 2, the gates of the respective switching transistors Q1-Q4 are connected to a pulse signal source provided by a controller, and thus the switching of the respective switching transistors Q1-Q4 is controlled by the pulse signal source provided by the controller.

Since totem-pole PFC topologies are known to those skilled in the art, the basic principles of the totem-pole PFC topology will not be described in greater detail here for the sake of brevity.

For totem-pole PFC topologies, it is required to turn off each switching transistor Q1-Q4 before the ac input voltage zero crossing to avoid a short circuit.

Fig. 3 and 4 show schematic diagrams of the occurrence of a short circuit in a totem-pole PFC topology circuit 200.

As shown in fig. 3, assuming that the current input voltage to the PFC circuit 200 is in a negative half-cycle, when the MOSFET switching transistor Q3 is turned on and the MOSFET switching transistor Q4 is turned off, current flows as indicated by the dashed arrow a 1.

As shown in fig. 4, if the polarity of the input voltage suddenly changes, for example, the input voltage has a square wave waveform or a transient phenomenon occurs in the power supply line, causing the input voltage to suddenly jump from a negative half cycle to a positive half cycle while the MOSFET switching transistor Q3 may still be in a conductive state, resulting in a surge current, indicated by solid arrow a2, flowing via a freewheeling diode (not shown) connected in anti-parallel with the high frequency switching transistor Q1 or the body diode of Q1 itself, which functions as a freewheeling diode. Thus, a short circuit occurs in the PFC circuit 200, possibly causing damage to the device. At this time, the current flowing direction a2 is opposite to the current flowing direction a1 when the switching transistor Q3 is operating normally. The current in the opposite direction to the normal operating current flowing through the low frequency switching transistors Q3 and Q4 is referred to herein as the reverse current.

Although fig. 3 and 4 only illustrate the case where the polarity of the input voltage is abruptly changed from the negative half-cycle to the positive half-cycle, it will be appreciated by those skilled in the art that a short-circuit phenomenon via the switching transistor Q4 may occur in the PFC circuit 200 when the polarity of the input voltage is abruptly changed from the positive half-cycle to the negative half-cycle. The current protection circuit proposed herein is equally applicable to this short circuit phenomenon.

In the case where the ac input voltage has an ideal sinusoidal waveform, by sensing the input voltage to predict the arrival of the zero-crossing, the low frequency switching transistors Q3 and Q4 can be turned off by the controller before the zero-crossing to avoid the occurrence of a short circuit. However, in the case of a sudden change in the polarity of the input voltage as shown in fig. 3 and 4, there is a delay in the conventional protection circuit for sensing the input voltage, and a serious short-circuit problem is often generated before the controller outputs a control signal for turning off the low frequency switching transistors Q3 and Q4.

In view of the above problems, a current protection circuit for a PFC circuit is proposed herein, which can sense a sudden change in polarity of an input voltage in time and respond quickly to avoid a short circuit occurring in the PFC circuit from adversely affecting devices.

As described above with reference to fig. 3 and 4, when a short circuit occurs in the PFC circuit 200, the direction of current changes as indicated by arrows a1 and a 2.

Therefore, the current protection circuit according to the present disclosure determines whether there is a short circuit in the circuit by detecting the occurrence of a large reverse current, and controls the switching of each switching transistor accordingly.

According to an embodiment of the present disclosure, the current protection circuit may sense a reverse current flowing through the low frequency switching transistor of the PFC circuit and transmit the sensed reverse current to the controller of the PFC circuit. The controller may turn off the low frequency switching transistor and the high frequency switching transistor of the PFC circuit when the sensed reverse current is greater than a preset reverse current threshold.

Fig. 5 shows a schematic circuit diagram of a PFC circuit 500 incorporating a current protection circuit 501 according to one embodiment of the present disclosure. The same components in fig. 5 as those in fig. 2 are denoted by the same symbols.

According to an embodiment of the present disclosure, the current protection circuit 501 may sense a current flowing through a low frequency switching transistor in a low frequency leg and provide the current sensing result to a controller (not shown).

Specifically, according to an embodiment of the present disclosure, the current protection circuit 501 may include a current sense resistor R1 serving as a first current sensing unit and a current sense resistor R2 serving as a second current sensing unit.

According to an embodiment of the present disclosure, one end of the resistor R1 is connected to the source of the upper arm low frequency switching transistor Q3, and the other end is connected to the second circuit node N2. By measuring the voltage across the resistor R1, a large reverse current flowing through the upper arm low frequency switching transistor Q3 can be sensed to determine whether there is a short circuit in the circuit. The current measurement of resistor R1 is communicated to the controller.

Similarly, according to the embodiment of the present disclosure, one end of the resistor R2 is connected to the drain of the lower arm low frequency switching transistor Q4, and the other end is connected to the second circuit node N2. By measuring the voltage across resistor R2, the reverse high current flowing through the lower arm low frequency switching transistor Q4 can be sensed to determine if a short circuit exists in the circuit. The current measurement of resistor R2 is communicated to the controller.

Preferably, the resistors R1 and R2 may be high-precision resistors having a small resistance value and a small temperature coefficient. The small resistance value can avoid adverse effects on the circuit power consumption when the circuit 500 works normally, and the small temperature coefficient can eliminate the influence of temperature change on the current sensing precision as much as possible.

According to an embodiment of the present disclosure, the controller may determine whether there is a short-circuit phenomenon in the PFC circuit 500 according to current sensing results of the current sensing resistors R1 and R2. For example, a reverse current threshold may be set, which may be determined based on circuit topology or the like. For example, the reverse current threshold may be 20A.

When the reverse currents sensed by the resistors R1 and R2 are greater than the reverse current threshold, it is determined that there is a short circuit in the PFC circuit 500, and thus the controller sends control signals to the respective switching transistors Q1-Q4 to turn them off, thereby achieving protection of the circuit.

Although the embodiments of the present disclosure use the current sensing resistors R1 and R2 to sense the current flowing through the low frequency switching transistors Q3 and Q4, the present disclosure is not limited thereto. Based on the teachings of the present disclosure, one skilled in the art may envision other variations to sense the large reverse current flowing through the low frequency switching transistor. For example, detection of current to the low frequency switching transistor may be achieved by using an inductor (DCR), a current transformer, a hall device, sensing voltage across the drain-source on-resistance of the low frequency switching transistors Q3 and Q4, among other variations. Further, detection of the current flowing through the low frequency switching transistor may also be accomplished using different circuit topologies that connect a current sense resistor in parallel with the low frequency switching transistor, for example. All such variations are intended to be within the scope of the present disclosure.

According to an embodiment of the present disclosure, when a large reverse current is reset, the controller may turn on each of the switching transistors Q1-Q4 again after a predetermined delay time. According to embodiments of the present disclosure, the delay time may be determined according to a specific circuit topology, which is, for example, 1 ms.

Fig. 6 shows a schematic circuit diagram of a PFC circuit 600 incorporating a current protection circuit 601 according to another embodiment of the present disclosure. The same components in fig. 6 as those in fig. 2 and 5 are denoted by the same symbols.

The circuit configuration of fig. 6 is substantially the same as that of fig. 5, except that the current protection circuit 601 shown in fig. 6 further includes an inductor L1. Inductor L1 is used to reduce the impact of large reverse currents on the overall circuit, i.e., to reduce the rate of change of reverse current di/dt, where i represents the reverse current. By reducing the rate of change of the large reverse current, the controller can be given time to respond in time to a possible short circuit.

According to an embodiment of the present disclosure, the inductor L1 has one end connected to the negative power supply terminal N and the other end connected to the second circuit node N2.

The current protection circuit has the advantages of simple structure and convenience in integration. In addition, when the polarity of the alternating-current input voltage is suddenly changed, the PFC circuit adopting the current protection circuit reduces the impact of the short-circuit phenomenon on a circuit device, thereby realizing the protection of the device.

Fig. 7A shows waveforms of the power supply input voltage Vin and drain-source currents Ids-Q3 and Ids-Q4 flowing through the low frequency switching transistors Q3 and Q4 under normal operating conditions of the PFC circuit according to the embodiment of the present disclosure. Further, fig. 7B shows a waveform diagram of the drain-source current Ids-Q3 of the low frequency switching transistor Q3 and the gate-source voltages Vgs-Q3 and Vgs-Q4 of the low frequency switching transistors Q3 and Q4 when the power supply input voltage Vin of the PFC circuit according to the embodiment of the present disclosure transits from the negative half cycle to the positive half cycle, and fig. 7C shows a waveform diagram of the drain-source current Ids-Q4 of the low frequency switching transistor Q4 and the gate-source voltages Vgs-Q3 and Vgs-Q4 of the low frequency switching transistors Q3 and Q4 when the power supply input voltage Vin of the PFC circuit according to the embodiment of the present disclosure transits from the positive half cycle to the positive half cycle.

As shown in fig. 7B, it is assumed that a transient phenomenon (shown as a point a in fig. 7B) occurs in the input voltage Vin from the negative half period to the positive half period. With the current protection circuit according to the embodiment of the present disclosure, since a large reverse current occurs in the low-frequency switching transistor Q3 (reaching a reverse current threshold as shown by point B), the controller turns off all the switching transistors (particularly the low-frequency switching transistor Q3), so that the drain-source current Ids-Q3 of the low-frequency switching transistor Q3 is reduced, and the device is prevented from being damaged by a short circuit occurring in the circuit.

As shown in fig. 7C, it is assumed that a transient phenomenon (shown as a point a in fig. 7C) occurs in the input voltage Vin from the positive half period to the negative half period. With the current protection circuit according to the embodiment of the present disclosure, since a large reverse current occurs in the low-frequency switching transistor Q4 (reaching a reverse current threshold as shown by point B), the controller turns off all the switching transistors (particularly the low-frequency switching transistor Q4), so that the drain-source current Ids-Q4 of the low-frequency switching transistor Q4 is reduced, and the device is prevented from being damaged by a short circuit occurring in the circuit.

Although the current protection circuit according to embodiments of the present disclosure is described above in a totem-pole PFC topology, one skilled in the art will recognize that the current protection circuit according to embodiments of the present disclosure may be equally applied to other PFC topologies, such as a pseudo totem-pole PFC topology.

While the disclosure has been disclosed by the description of the specific embodiments thereof, it will be appreciated that those skilled in the art will be able to devise various modifications, improvements, or equivalents of the disclosure within the spirit and scope of the appended claims. Such modifications, improvements and equivalents are also intended to be included within the scope of the present disclosure.

Claims

1. A current protection circuit for a power factor corrector circuit configured to sense a reverse current flowing through a low frequency switching transistor of the power factor corrector circuit and send the sensed reverse current to a controller of the power factor corrector circuit,

wherein the controller turns off the low frequency switching transistor and the high frequency switching transistor of the power factor corrector circuit when the sensed reverse current is greater than a preset reverse current threshold.

2. The current protection circuit of claim 1, comprising:

a first current sensing unit having one end connected to a source of the upper arm low frequency switching transistor and the other end connected to a circuit node between the upper arm low frequency switching transistor and the lower arm low frequency switching transistor; and

and a second current sensing unit having one end connected to the drain of the lower arm low frequency switching transistor and the other end connected to the circuit node.

3. The current protection circuit of claim 2, wherein each of the first current sensing unit and the second current sensing unit comprises a current sensing resistor.

4. The current protection circuit of claim 2, further comprising:

and an inductor having one end connected to the negative power supply electrons and the other end connected to a circuit node between the upper arm low frequency switching transistor and the lower arm low frequency switching transistor.

5. The current protection circuit of claim 1, wherein the high frequency switching transistor is a gallium nitride transistor or a silicon carbide transistor.

6. The current protection circuit of claim 1, wherein the low frequency switching transistor is a metal oxide semiconductor field effect transistor.

7. The current protection circuit of claim 1, wherein the controller turns on the low frequency switching transistor and the high frequency switching transistor after a predetermined delay time when the sensed reverse current is reset.

8. A power factor corrector circuit comprising a current protection circuit as claimed in any one of claims 1 to 7.

9. An ac/dc converter comprising:

the power factor corrector circuit of claim 8;

a DC/DC circuit; and

a controller that controls the power factor corrector circuit and the DC/DC circuit.