CN112865728B - Reconfigurable operational amplifier - Google Patents
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Abstract
The invention discloses a reconfigurable operational amplifier, which comprises a sleeve type common-source common-gate operational amplifier structure, wherein switches are respectively connected between drain electrodes and source electrodes of partial MOS (metal oxide semiconductor) tubes in the sleeve type common-source common-gate operational amplifier structure, and the two working states of the common-source common-gate operational amplifier and a differential single-tube amplifier are switched through the closing and opening of a control switch. The invention greatly improves the reusability of the operational amplifier, reduces extra design cost, and does not increase extra power consumption because the design is designed on the basis of the cascode operational amplifier.
Description
Technical Field
The invention relates to the field of operational amplifiers, in particular to a reconfigurable operational amplifier.
Background
In the field of mixed signals, the application of an operational amplifier is very wide, one important application field is an analog-to-digital converter (ADC), the signals in the nature are mostly analog signals, the analog-to-digital converter can convert the analog signals into digital signals, the digital signals are supplied to a digital processor (DSP) for processing, at present, some mainstream ADCs such as pipeline ADC (analog-to-digital converter) and delta-sigma ADC all need to use an operational amplifier, and the precision and the speed of the ADC are greatly limited by the speed and the precision of the operational amplifier.
Pipeline analog-to-digital converter currently occupies the high-speed middle-high-precision ADC market, and is an ADC structure for obtaining digital output results through multi-step comparison. Taking a 12-Stage pipeline as an example, a basic block diagram is shown in fig. 1, each Stage of the first eleven stages Stage 1-Stage 11 is of a 1.5-bit structure, each Stage is provided with 0.5-bit redundant bits to eliminate errors caused by nonideal factors such as direct current offset of a comparator, the last Stage is a 1-bit comparator ADC, and each Stage pipeline consists of a sub ADC, a sub digital-to-analog converter (sub DAC) and a multiplier digital-to-analog converter (MDAC) module. The basic working principle of the pipelined analog-to-digital converter is as follows: the analog input is firstly sampled and held by a first stage sampling and holding circuit, the digital output of the first stage is obtained through a sub ADC of the first stage, then the analog input of the first stage subtracts the digital output of the first stage to obtain a residual signal, the residual signal is amplified by an MDAC and sampled and held as the input of the next stage, the corresponding process is repeated by the second stage, namely the digital output of the second stage is output, the digital output is subtracted from the second stage input to obtain the residual signal, the residual signal is sampled and held by the MDAC and then used as the input of the next stage, the process is continued until the final stage pipeline outputs the digital signal, and finally the digital output of each stage is aligned through a digital output alignment circuit to obtain the complete digital output. In the whole pipeline ADC working engineering, the MDAC is the most important module and comprises an operational amplifier and sampling and feedback capacitors, wherein the operational amplifier directly influences the speed and the precision of the whole ADC.
The existing pipelined ADC is generally divided into an ADC with calibration and an ADC without calibration, wherein the gain requirement of an operational amplifier is not required to be high, but a digital calibration circuit brings additional area and power consumption cost, and the calibration circuit is generally used in an ADC with higher bit number; in an ADC without calibration, inter-stage gain errors exist between the ADC stages due to the limited effect of the op amp gain, i.e., there is a deviation between the actual inter-stage gain and the ideal inter-stage gain. The magnitude of the inter-stage gain error is directly affected by the direct current gain of the operational amplifier, when the gain of the operational amplifier is low, the inter-stage gain error is larger, and the effective bit number of the whole pipeline ADC is reduced, so that the performance of the ADC is seriously affected, and therefore, in a non-calibrated circuit, the operational amplifier is generally required to have a particularly high gain.
In addition to gain, bandwidth is also an important indicator of the operational amplifier, affecting the speed of the circuit. For signals input at high speed, the operational amplifier is required to have larger bandwidth, two indexes of gain and bandwidth are tradeoffs of precision and speed, and different requirements are applied to the operational amplifier and the operational amplifier in different application scenes. If the gain and bandwidth can be reconfigured, as per the application requirements, a significant amount of design time will be saved,
currently, there has been some research into reconfigurable operational amplifiers. The conventional reconfigurable amplifier generally controls the tail current source through a switch, so as to control the transconductance, and the bandwidth is changed due to the change of the impedance of the transistor caused by the change of the current, while the gain is basically kept unchanged, so that the reconfigurable gain-bandwidth product (GBW) is realized, and the reconfigurable amplitude-frequency characteristic curve of the conventional method is shown in fig. 2.
Document 1 (1,W.Audoglio,E.Zuffetti,G.Cesura and R.Castello, "A6-10bits Reconfigurable 20MS/s Digitally Enhanced Pipelined ADC for Multi-Standard Wireless Terminals,"2006Proceedings of the 32nd European Solid-State Circuits Conference, montaux, 2006, pp.496-499, doi: 10.1109/escir.2006.307498.) proposes a reconfigurable operational amplifier with variable power consumption, in which switching on and off of some transistors is controlled by adding switches so that a circuit is switched in an operation mode of high gain and high power consumption and low gain and low power consumption. Document 2 (2,J.Jang,Y.Miao and Y.Lee, "High-bandwidth power-scalable 10-bit pipelined ADC using bandwidth-reconfigurable operational amplifier," procedures of 2010IEEE International Symposium on Circuits and Systems,Paris,2010,pp.4029-4032, doi: 10.1109/iscas.2010.5537643.) proposes an operational amplifier with reconfigurable bandwidth, wherein the bandwidth of an amplifying circuit is adjusted by controlling the number of on-state tail current tubes of the amplifier by a switch, so as to realize the reconfiguration of the bandwidth. Document 3 (3,A.Atac,C.Harder,R.Wunderlich and S.Heinen, "A low power variable GBW opamp from 60MHz to 2GHz for multi-standard receivers,"201219th IEEE International Conference on Electronics,Circuits,and Systems (ICECS 2012), seville,2012, pp.1-4, doi:10.1109/icecs.2012.6463715.) implements the reconfigurability of the operational amplifier GBW by adjusting the tail current by switching on different numbers of transistor pairs, thereby adjusting the transconductance. However, the reconfigurable operational amplifiers proposed in the above documents have a problem of insufficient reusability.
Disclosure of Invention
The invention aims to provide a reconfigurable operational amplifier so as to solve the problem of insufficient reusability of the prior art.
In order to achieve the above purpose, the technical scheme adopted by the invention is as follows:
the reconfigurable operational amplifier comprises a sleeve type common-source common-gate operational amplifier structure and is characterized in that the sleeve type common-source common-gate operational amplifier structure comprises MOS (metal oxide semiconductor) tubes, one part of the MOS tubes are MOS tubes with common source electrodes, a switch is respectively connected between the drain electrode and the source electrode of each of the other MOS tubes except the MOS tubes with common source electrodes, and the switch forms a differential single-tube amplifier when being fully closed, so that the differential single-tube amplifier is switched into the following two working states by controlling the closing and opening of the switch: a cascode operational amplifier and a differential single-tube amplifier.
The operating state of the reconfigurable operational amplifier is smaller than the bandwidth of the operating state of the differential single-tube amplifier, the gain is increased, and the gain bandwidth products of the two operating states of the common-source common-gate operational amplifier and the differential single-tube amplifier are the same.
The reconfigurable operational amplifier comprises a sleeve type common-source common-gate operational amplifier structure, wherein MOS (metal oxide semiconductor) tubes which are commonly connected in the sleeve type common-source common-gate operational amplifier structure comprise two groups of PMOS (P-channel metal oxide semiconductor) tube pairs which are commonly connected in grid, a group of NMOS tube pairs which are commonly connected in grid and a group of NMOS tube pairs which are empty in grid, each group of PMOS tube pairs which are commonly connected in grid comprises two PMOS tubes which are commonly connected in grid, each NMOS tube pair which is commonly connected in grid comprises two NMOS tubes which are empty in grid;
the drain electrodes of the PMOS tube pairs of the first group of common grid are in one-to-one correspondence with the source electrodes of the PMOS tube pairs of the second group of common grid;
the drains of the PMOS tube pairs of the second group of common grid are connected with the drains of the NMOS tube pairs of the common grid in a one-to-one correspondence manner, the sources of the NMOS tube pairs of the common grid are connected with the drains of the NMOS tube pairs with empty grid, and the sources of the two NMOS tubes in the NMOS tube pairs with empty grid are connected together to form another common source terminal, so that a serial structure of each MOS tube is formed, the grid of the two NMOS tubes in the NMOS tube pairs with empty grid is used as an input end in the serial structure, and the interconnection position of the PMOS tube pairs with empty grid and the drain of the NMOS tube pairs with common grid is used as an output end.
In the reconfigurable operational amplifier, the common source terminal of the NMOS tube pair with the empty grid is grounded through an NMOS tube.
In the reconfigurable operational amplifier, each MOS tube is respectively connected with a peripheral grid voltage bootstrap switch.
The reconfigurable operational amplifier comprises a peripheral grid voltage bootstrap switch, a power supply, a holding capacitor, a charging capacitor and a change-over switch, wherein the MOS tube forms a loop through a source electrode, a drain electrode, the holding capacitor and the power supply, and the change-over switch is used for enabling a grid electrode of the MOS tube to be switched to be connected with the ground or to be switched to be connected with the source electrode of the MOS tube through the charging capacitor.
The reconfigurable operational amplifier is characterized in that except for the MOS tubes of the common grid with the sources connected in common, the common grid ends of the MOS tubes of the other common grid are respectively connected with bias voltages through switches, and the bias voltages of the common grid ends are controlled through the switches to be switched between two working states of the common source common grid operational amplifier and the differential single-tube amplifier.
When the bias voltage of the common gate terminal is controlled through a switch, the working state of the formed common source common gate operational amplifier is increased in gain and reduced in bandwidth compared with the working state of a differential single tube amplifier.
The reconfigurable operational amplifier obtains multiple groups of gains and bandwidths by controlling the bias voltage.
The reconfigurable operational amplifier is used in a switched capacitor sampling hold circuit, and can be switched to realize the functions of a high-gain operational amplifier and a single-tube amplifier.
The invention provides an operational amplifier with reconfigurable gain and bandwidth, which has the basic principle that a switch is added between the drain electrode and the source electrode of a part of common grid MOS (metal oxide semiconductor) tubes of a common source common grid operational amplifier to control the on-off, and when the switch is on-off, an operational amplifier circuit is switched between different working modes. When the switches are all turned off, the reconfigurable operational amplifier is a cascode transport amplifier, and has the characteristics of high direct current gain and low bandwidth; when the switches are all closed, the reconfigurable operational amplifier is a differential single-tube amplifier, and has the characteristics of low DC gain and high bandwidth.
The invention also provides a further optimized scheme, and a plurality of groups of different gains and bandwidths can be obtained, namely, a switch is added to the common gate ends of the rest common gate MOS tubes except the common gate MOS tubes with the common source electrodes for controlling bias voltage, the bias voltage of the common gate ends is selected through the switch, so that the working area of the common gate MOS tubes is changed, when the common gate MOS tubes work in a saturation area, the reconfigurable operational amplifier is the common source common gate amplifier, and when the common gate MOS tubes work in a linear area, the common gate MOS tubes only play a role of conducting, and the reconfigurable operational amplifier is approximately degenerated into a single-tube amplifier. Along with different choices of bias voltages of common gate ends of the common gate MOS transistors, multiple groups of designs with different bandwidths and gains can be obtained, so that the common gate MOS transistors are applied to different scenes.
The invention greatly improves the reusability of the operational amplifier, reduces extra design cost, and does not increase extra power consumption because the design is designed on the basis of the cascode operational amplifier.
Drawings
Fig. 1 is a schematic diagram of a prior art pipelined analog-to-digital converter.
Fig. 2 is a graph showing the amplitude-frequency characteristics of a conventional reconfigurable amplifier.
Fig. 3 is a schematic diagram of a reconfigurable amplifier of the invention.
Fig. 4a is a schematic diagram of the present invention when the gate voltage bootstrapped switch is charged.
Fig. 4b is a schematic diagram of the present invention when the gate voltage bootstrapped switch remains linear.
Fig. 5a is a schematic diagram of a sampling phase of a switched capacitor sampling circuit to which the present invention is applied.
Fig. 5b is a schematic diagram of a switched capacitor sampling circuit hold phase to which the present invention applies.
Fig. 6 is a schematic diagram of a reconfigurable operational amplifier of the present invention after modification.
Fig. 7 is a graph showing the amplitude-frequency characteristics of the reconfigurable operational amplifier after improvement of the present invention.
Detailed Description
The invention will be further described with reference to the drawings and examples.
As shown in fig. 3, a reconfigurable operational amplifier comprises a telescopic cascode operational amplifier structure, wherein the telescopic cascode operational amplifier structure comprises two groups of PMOS tube pairs V1 and V2 with common grid, one group of NMOS tube pair V3 with common grid and one group of NMOS tube pair V4 with empty grid, each group of PMOS tube pair with common grid consists of two PMOS tubes with common grid, each group of NMOS tube pair V2 with common grid consists of two NMOS tubes with common grid, and each group of NMOS tube pair V4 with empty grid consists of two NMOS tubes with empty grid;
in the PMOS tube pair V1 and V2 of the two groups of common grid, the sources of the two PMOS tubes of the PMOS tube pair V1 of the first group of common grid are connected together to form a common source terminal, and the drains of the PMOS tube pair V1 of the first group of common grid are connected with the sources of the PMOS tube pair V2 of the second group of common grid in a one-to-one correspondence manner;
the drain electrodes of the PMOS tube pair V2 of the second group of common grid are in one-to-one correspondence with the drain electrodes of the NMOS tube pair V3 of the common grid, the source electrodes of the NMOS tube pair V3 of the common grid are in one-to-one correspondence with the drain electrodes of the NMOS tube pair V4 with empty grid, the source electrodes of the two NMOS tubes in the NMOS tube pair V4 with empty grid are connected together to form another common source electrode terminal, thus forming a serial structure of each MOS tube, in the serial structure, the grid electrodes of the two NMOS tubes in the NMOS tube pair V4 with empty grid are used as input ends, the input ends are respectively input with voltage VIP and VIN, and the junction of the PMOS tube pair V2 of the second group of common grid and the drain electrodes of the NMOS tube pair V3 with empty grid is used as an output end, and the output ends output voltages VON and VOP.
Except for the PMOS tube pair V1 with the source electrode connected with the common grid and the NMOS tube pair V4 with the grid electrode as the input end, a switch is respectively connected between the source electrode and the drain electrode of each MOS tube in the PMOS tube pair V2 with the common grid and between the source electrode and the drain electrode of each MOS tube in the NOMS tube pair V3 with the common grid, and a differential single-tube amplifier is formed when the switch is fully closed, so that the two working states of the common-source common-grid operational amplifier and the differential single-tube amplifier are switched through controlling the switch to be closed and opened.
The common source terminal of the NMOS transistor pair V4 with the gate as the input terminal is connected to the drain of one NMOS transistor V5, and the source of the NMOS transistor V5 is grounded.
The reconfigurable operational amplifier structure proposed by the present invention is realized by changing the circuit topology of the operational amplifier, and the schematic diagram of the structure is shown in fig. 3. The reconfigurable operational amplifier has two working modes, and the operational amplifier in the first mode has larger gain and lower bandwidth and can be applied to designs with higher precision requirements; the other mode has low gain and higher bandwidth, and is applied to the design with higher speed requirement, and the two modes can not change the GBW of the operational amplifier and do not need extra power consumption cost. The working principle of the reconfigurable operational amplifier shown in fig. 3 is as follows: when four switches in the schematic diagram are all closed, the circuit structure is a differential single-tube amplifier, the gain is Av, the bandwidth is BW, the gain bandwidth product is GBW, and the bandwidth is larger in the mode, so that the differential single-tube amplifier can be applied to high-speed ADC design; when the four switches are all disconnected, the circuit structure is changed into a sleeve type cascode operational amplifier structure, the intrinsic gain of a single tube of the MOS tube is assumed to be A, under the structure, the gain is increased by A times, the bandwidth is reduced to be 1/A originally, but GBW is unchanged, and the mode is suitable for high-precision ADC circuit design.
In the invention, each MOS tube is respectively connected with a peripheral grid voltage bootstrap switch. Taking any MOS tube Vi as an example, the peripheral circuit comprises a power supply V in Resistance R in Holding capacitor C hold The MOS tube Vi passes through the source electrode, the drain electrode and the holding capacitor C of the MOS tube Vi, the charging capacitor C and the switching switch clk hold Resistance R in Power supply V in The connection constitutes a loop, and the switching switch clk is used to switch the gate of the MOS transistor Vi to the connection ground (as shown in fig. 4 a) or to connect the source of the MOS transistor Vi through the charging capacitor C (as shown in fig. 4 b).
The use of conventional MOS switches introduces a large nonlinearity, and in order to improve the linearity of the circuit structure, the circuit of the present invention uses a Bootstrap Switch (Bootstrap Switch), as shown in fig. 4a, first charges the capacitor in the first half period, so that both ends of the capacitor maintain a constant voltage; as shown in fig. 4b, in the latter half period, the two ends of the capacitor are connected to the gate and the source of the MOS switch, so as to ensure a constant voltage between the gate and the source and ensure the linearity of the switch.
The reconfigurable operational amplifier can be used in a switched capacitor sampling hold circuit to realize the functions of a high-gain operational amplifier and a single-tube amplifier in a switching way. Operational amplifiers are commonly used in switched capacitor sample and hold circuits, which are divided into a sampling phase (as shown in fig. 5 a) and a holding phase (as shown in fig. 5 b).
In the sampling stage, input voltage is sampled, in the holding stage, charge is transferred to an output end, and the closed loop gain can be calculated according to charge conservation as follows:
wherein A is V As for the calculated gain, β is a feedback coefficient, and as can be seen from the formula, when the calculated gain is larger, the error due to the calculation of the limited gain is smaller. In the case of no correction, the gain error has a particularly large influence on the circuit accuracy, and therefore, an operational amplifier with high gain is required for an ADC requiring high accuracy. Conversely, when a larger bandwidth is required and the requirement on accuracy is not high, the switch can be adjusted to switch to the single-tube amplifier mode.
Fig. 6 shows an improved structure of a reconfigurable operational amplifier of the present invention, in which, in the telescopic cascode operational amplifier structure, except for a PMOS transistor pair V1 with a common gate connected to a source and an NMOS transistor pair V4 with a common gate connected to a source as an input end, the common gate ends of the PMOS transistor pair V2 with a common gate and the NMOS transistor pair V3 with a common gate are respectively connected to bias voltages through switches, and the bias voltages of the common gate ends are controlled by the switches to switch between two working states of the cascode operational amplifier and the differential single-tube amplifier. Compared with the working state of a differential single-tube amplifier, the working state of the formed cascode operational amplifier has the advantages of increased gain and reduced bandwidth. And multiple sets of gains and bandwidths are obtained by controlling the bias voltage magnitude.
With the improvement shown in fig. 6, multiple sets of different gains and bandwidths can be obtained. The grid bias voltages of the four common-gate tubes of the common-source common-gate amplifier are controlled by a switch instead, so that the working areas where the four common-gate tubes are positioned are controlled, and conversion under different working modes is realized. When the upper PMOS tube pair V2 grid electrode voltage is connected with the voltage Vb2, and the lower NMOS tube pair V3 grid electrode voltage is connected with the voltage Vb3, the two MOS tube pairs V2 and V3 work in a saturation region, and the circuit is of a common-source common-gate operational amplifier structure, and has large gain but smaller bandwidth; when the grid voltage of the upper PMOS tube pair V2 is connected with GND and the lower NMOS tube pair V3 is connected with VDD, the two MOS tubes work in a linear region at the moment and only play a role of a switch, the whole circuit is degenerated into a single-tube amplifier structure, and the circuit has smaller gain but large bandwidth and can be applied to the design of high speed and low precision. When the values of Vb2 and Vb3 are varied, multiple sets of gain and bandwidth can be obtained, and the improved reconfigurable amplifier amplitude-frequency characteristic is shown in fig. 7. In general, the improved reconfigurable operational amplifier has a simple structure, and the operational amplifier can be reused in different application scenes only by adding a plurality of switches, so that the operational amplifier has strong flexibility.
The embodiments of the present invention are merely described in terms of preferred embodiments of the present invention, and are not intended to limit the spirit and scope of the present invention, and various modifications and improvements made by those skilled in the art to the technical solutions of the present invention should fall within the protection scope of the present invention, and the technical content of the present invention as claimed is fully described in the claims.
Claims (6)
1. A reconfigurable operational amplifier comprising a telescopic cascode operational amplifier structure, the telescopic cascode operational amplifier structure comprising:
the PMOS transistor pair of the two groups of common grid electrodes, the NMOS transistor pair of the group of common grid electrodes and the NMOS transistor pair of the group of grid electrodes are empty, each PMOS transistor pair of the group of common grid electrodes comprises two PMOS transistors with the grid electrodes in common connection, each NMOS transistor pair of the common grid electrodes comprises two NMOS transistors with the grid electrodes in common connection, and each NMOS transistor pair of the grid electrodes in empty state comprises two NMOS transistors with the grid electrodes in empty state;
the drain electrodes of the PMOS tube pairs of the first group of common grid are in one-to-one correspondence with the source electrodes of the PMOS tube pairs of the second group of common grid;
the drains of the PMOS tube pairs of the second group of common grid are connected with the drains of the NMOS tube pairs of the common grid in a one-to-one correspondence manner, the sources of the NMOS tube pairs of the common grid are connected with the drains of the NMOS tube pairs with empty grid, and the sources of the two NMOS tubes in the NMOS tube pairs with empty grid are connected together to form another common source end, so that a serial structure of each MOS tube is formed, the grid of the two NMOS tubes in the NMOS tube pairs with empty grid is used as an input end in the serial structure, and the junction of the PMOS tube pairs with empty grid and the drain of the NMOS tube pairs with common grid is used as an output end;
except for a PMOS tube pair of a common grid connected with a source electrode and an NMOS tube pair of which the grid is taken as an input end, the source electrode and the drain electrode of each MOS tube in the PMOS tube pair of the common grid and the source electrode and the drain electrode of each MOS tube in the NOMS tube pair of the common grid are respectively connected with a peripheral grid voltage bootstrap switch;
the peripheral grid voltage bootstrap switch is switched to be in the following two working states by controlling the on and off of the peripheral grid voltage bootstrap switch: a cascode operational amplifier, a differential single tube amplifier; when the peripheral grid voltage bootstrap switches are all turned off, the reconfigurable operational amplifier is a common-source common-grid operational amplifier and has the characteristics of high direct-current gain and low bandwidth, and when the peripheral grid voltage bootstrap switches are all turned on, the reconfigurable operational amplifier is a differential single-tube amplifier and has the characteristics of low direct-current gain and high bandwidth, and the gain-bandwidth products of the two working states are the same;
besides the PMOS tube pair of the common grid electrode and the NMOS tube pair of the common grid electrode, which are connected with the source electrode in a sharing way, the common grid ends of the PMOS tube pair of the common grid electrode and the NMOS tube pair of the common grid electrode are respectively connected with bias voltages through a switch of two options, when the reconfigurable operational amplifier is a common-source common-grid operational amplifier, the grid bias voltages of the four common grid tubes of the common-source common-grid operational amplifier, namely the PMOS tube pair of the common grid electrode and the NMOS tube pair of the common grid electrode, are controlled by the switch of two options, so that the working areas where the four common grid tubes are positioned are controlled, conversion under different working modes is realized, and multiple groups of gains and bandwidths can be obtained by controlling the magnitude of the bias voltages.
2. A reconfigurable operational amplifier according to claim 1, wherein the common source terminal of the gate-free NMOS transistor pair is connected to ground through an NMOS transistor in the telescopic cascode operational amplifier configuration.
3. The reconfigurable operational amplifier according to claim 1, wherein the peripheral gate voltage bootstrap switch comprises a power supply, a holding capacitor, a charging capacitor, and a switch, wherein the MOS transistor forms a loop with the holding capacitor and the power supply through its own source and drain, and the switch is used to switch the gate of the MOS transistor to the ground or to the source of the MOS transistor connected through the charging capacitor.
4. The reconfigurable operational amplifier according to claim 1, wherein when the bias voltage of the common gate terminal is controlled by the one-out-of-two switch, the gain of the formed common-source common-gate operational amplifier is increased and the bandwidth is reduced compared with the operational state of the differential single-tube amplifier.
5. A reconfigurable operational amplifier according to claim 1, wherein the sets of gain and bandwidth are obtained by controlling the magnitude of the bias voltage.
6. Use of a reconfigurable operational amplifier according to any of claims 1-5 in a switched capacitor sample and hold circuit for switchably implementing high gain operational amplifier and single tube amplifier functions.
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