CN112864118A - Active TSV adapter plate structure and manufacturing method thereof - Google Patents

Active TSV adapter plate structure and manufacturing method thereof Download PDF

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Publication number
CN112864118A
CN112864118A CN202011634432.XA CN202011634432A CN112864118A CN 112864118 A CN112864118 A CN 112864118A CN 202011634432 A CN202011634432 A CN 202011634432A CN 112864118 A CN112864118 A CN 112864118A
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China
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layer
active
chip
tsv
manufacturing
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CN202011634432.XA
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耿菲
曹立强
张凯
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National Center for Advanced Packaging Co Ltd
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National Center for Advanced Packaging Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49838—Geometry or layout
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5221—Crossover interconnections
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5386—Geometry or layout of the interconnection structure

Abstract

The invention provides an active TSV adapter plate structure and a manufacturing method thereof, wherein the active TSV adapter plate structure comprises: forming an active functional layer on the upper surface of the first chip; forming a first TSV structure which does not penetrate through the first chip on the upper surface of the active functional layer; forming a first dielectric layer, wherein the first dielectric layer completely covers the upper surface of the active functional layer and the side wall and the bottom of the first TSV structure; filling conductive metal in the first TSV structure; leading out the electrical property of the active functional layer so as to electrically connect the active functional layer with the conductive metal; processing the lower surface of the first chip to expose the conductive metal in the first TSV structure; the electrical property of the conductive metal is led out from the lower surface of the first chip.

Description

Active TSV adapter plate structure and manufacturing method thereof
Technical Field
The invention relates to the technical field of integrated circuit packaging, in particular to an active TSV adapter plate structure and a manufacturing method thereof.
Background
With the intellectualization, miniaturization and popularization of portable equipment, the requirements on the packaging size of a chip are smaller and smaller, and the cost is also lower and lower. Three-dimensional stack-packaged semiconductor devices have been widely used as a process capable of effectively reducing the physical size of the semiconductor devices. In three-dimensional stack-packaged semiconductor devices, active circuits such as logic, memory, processor circuits, etc. are fabricated on different wafers and packages. One of the two or more packages is mounted on top of the other, i.e., stacked, to allow for higher integration of the package. In addition, the stack package semiconductor device may achieve a smaller form factor, higher cost effectiveness, enhanced performance, and lower power consumption.
In the existing 2.5D package-on-package scheme of the adapter plate, a chip is inversely installed on the upper surface of a passive adapter plate, and a bonding pad or a solder ball on the lower surface of the adapter plate is attached to a substrate to form a 2.5D package structure; this solution has the following drawbacks: 1) a layer of passive adapter plate is required to be added between the chip and the substrate to realize the switching communication of electric signals, and due to the limitation of a 2.5D packaging structure, the realization of multilayer three-dimensional stacking in the true sense is very difficult, and the packaging development trend of higher integration level is not met; 2) generally, the stacking is chip-level, the efficiency is low, and the process is complex.
Disclosure of Invention
The invention aims to provide an active TSV adapter plate structure and a manufacturing method thereof, and aims to solve the problem that the integration level of a 2.5D packaging structure formed by the existing adapter plate is difficult to improve.
In order to solve the above technical problem, the present invention provides a method for manufacturing an active TSV interposer structure, including:
forming an active functional layer on the upper surface of the first chip;
forming a first TSV structure which does not penetrate through the first chip on the upper surface of the active functional layer;
forming a first dielectric layer, wherein the first dielectric layer completely covers the upper surface of the active functional layer and the side wall and the bottom of the first TSV structure;
filling conductive metal in the first TSV structure;
leading out the electrical property of the active functional layer so as to electrically connect the active functional layer with the conductive metal;
processing the lower surface of the first chip to expose the conductive metal in the first TSV structure;
the electrical property of the conductive metal is led out from the lower surface of the first chip.
Optionally, in the manufacturing method of the active TSV adapter plate structure, the active functional layer includes an active functional layer dielectric layer and a metal layer, the metal layer has a pad layer for subsequent circuit connection, and the pad layer is exposed or covered by the active functional layer dielectric layer.
Optionally, in the method for manufacturing an active TSV adapter plate structure, forming a first TSV structure includes:
forming a first opening on the upper surface of the active functional layer, wherein the first opening is positioned in the active functional layer dielectric layer;
making the first opening completely penetrate through the active functional layer until the first chip upper surface is exposed;
and manufacturing a first through hole on the upper surface of the first chip exposed by the first opening, wherein the bottom of the first through hole has a certain distance with the lower surface of the first chip.
Optionally, in the manufacturing method of the active TSV adapter plate structure, a diameter of the first through hole is smaller than a diameter of the first opening;
when the first dielectric layer is formed, the first dielectric layer completely covers the side walls and the bottom of the first opening and the first through hole.
Optionally, in the manufacturing method of the active TSV adapter plate structure, the upper surface of the conductive metal is flush with the upper surface of the first dielectric layer.
Optionally, in the method for manufacturing an active TSV interposer structure, the leading out the electrical property of the active functional layer includes:
manufacturing a second opening at the position, matched with the pad layer, of the upper surface of the active functional layer, wherein the second opening enables the pad layer to be exposed;
and manufacturing a first wiring layer on the upper surface of the active functional layer, wherein the metal layer of the first wiring layer is filled in the second opening and is respectively and electrically connected with the pad layer and the conductive metal in the first TSV structure.
Optionally, in the method for manufacturing an active TSV adapter plate structure, the method further includes:
manufacturing a graphical second dielectric layer on the first dielectric layer and the first wiring layer, and etching the second dielectric layer to expose partial area of the first wiring layer;
and manufacturing a first bonding pad in situ on the second dielectric layer, wherein the first bonding pad is electrically connected with the first wiring layer.
Optionally, in the method for manufacturing an active TSV adapter plate structure, the processing of the lower surface of the first chip includes:
and thinning, grinding or etching the lower surface of the first chip to enable the conductive metal at the bottom of the first TSV structure to be exposed out of the lower surface of the first chip.
Optionally, in the method for manufacturing an active TSV interposer structure, the leading out an electrical property of the conductive metal from the lower surface of the first chip includes:
covering a third medium layer on the lower surface of the first chip, wherein the conductive metal at the bottom of the first TSV structure is exposed out of the lower surface of the third medium layer;
manufacturing a second wiring layer on the lower surface of the first chip, wherein the second wiring layer is electrically communicated with the conductive metal in the first TSV structure;
manufacturing a graphical fourth dielectric layer on the lower surface of the first chip, so that part of the second wiring layer is exposed;
and manufacturing a first solder ball at the opening of the fourth dielectric layer, and electrically connecting the first solder ball with the second wiring layer.
The invention also provides an active TSV adapter plate structure formed by the manufacturing method.
In the active TSV adapter plate structure and the manufacturing method thereof provided by the invention, the active function layer is formed on the upper surface of the first chip, the first TSV structure which does not penetrate through the first chip is formed on the upper surface of the active function layer, the first dielectric layer is formed, the first TSV structure is filled with the conductive metal, the electrical property of the active function layer is led out, the lower surface of the first chip is processed, the conductive metal in the first TSV structure is exposed, and the electrical property of the conductive metal is led out from the lower surface of the first chip, so that the first TSV structure is manufactured on the first chip integrated with the active function layer, namely the first TSV structure is used as a chip and a TSV adapter plate, a 3D integrated packaging structure which is tighter than a traditional 2.5D packaging structure is realized, and the integration level of a packaging body can be effectively improved. The first TSV structure is manufactured by the first chip, and the functional chip and the adapter plate are combined into a whole, so that the performance is improved, and the packaging volume is reduced;
if the sizes of the first opening and the first through hole are the same, in the etching process of the first through hole, a gap of an olecranon-shaped contact surface is formed at the section of the upper surface of the first chip and the active function layer medium layer, insulation is not easily formed at the gap when an insulating medium layer is formed subsequently, the TSV structure is likely to fail, and the risk of failure of the first TSV structure is avoided if the diameter of the first through hole is smaller than that of the first opening. The invention provides a three-dimensional stacking structure based on a TSV (through silicon via) process and a manufacturing method thereof, which at least partially overcome the problems in the prior art.
Drawings
Fig. 1 is a schematic diagram illustrating an active functional layer formed by a method for manufacturing an active TSV interposer structure according to an embodiment of the present invention;
FIG. 2 is a schematic view of a first opening formed in a method for manufacturing an active TSV adapter plate structure according to an embodiment of the present invention;
FIG. 3 is a schematic view illustrating the formation of a first through hole by the method for manufacturing an active TSV adapter plate structure according to an embodiment of the present invention;
FIG. 4 is a schematic view of a first dielectric layer formed by the method for manufacturing an active TSV adapter plate structure according to an embodiment of the present invention;
FIG. 5 is a schematic view illustrating the formation of a conductive metal layer by a method for manufacturing an active TSV adapter plate structure according to an embodiment of the present invention;
FIG. 6 is a schematic view illustrating a second opening formed by the method for manufacturing an active TSV adapter plate structure according to an embodiment of the present invention;
FIG. 7 is a schematic view illustrating a first wiring layer formed by the method for manufacturing an active TSV adapter plate structure according to an embodiment of the present invention;
FIG. 8 is a schematic view of a second dielectric layer formed by the method for manufacturing an active TSV adapter plate structure according to an embodiment of the present invention;
FIG. 9 is a schematic view of forming a first bonding pad according to a method for manufacturing an active TSV adapter structure of the present invention;
FIG. 10 is a schematic view of a method for fabricating an active TSV adapter structure according to one embodiment of the present invention processing a bottom surface of a first chip;
FIG. 11 is a schematic view of a third dielectric layer formed by the method for manufacturing an active TSV adapter plate structure according to an embodiment of the present invention;
FIG. 12 is a schematic view illustrating a second wiring layer formed by the method for manufacturing an active TSV adapter plate structure according to an embodiment of the present invention;
FIG. 13 is a schematic view of a fourth dielectric layer formed by the method for manufacturing an active TSV adapter plate structure according to an embodiment of the present invention;
FIG. 14 is a schematic view illustrating the fabrication of first solder balls by the method for fabricating an active TSV adapter plate structure according to an embodiment of the present invention;
shown in the figure: 101-a first chip; 101 a-an active functional layer; 102-a first opening; 103-a first TSV structure/first via; 104-a first dielectric layer; 105-a second opening; 106 — a first routing layer; 107-second dielectric layer; 108-a first pad; 109-a third dielectric layer; 110-a second wiring layer; 111-a fourth dielectric layer; 112-first solder balls; 113-conductive metal.
Detailed Description
The active TSV interposer structure and the manufacturing method thereof according to the present invention will be described in detail with reference to the accompanying drawings and specific embodiments. Advantages and features of the present invention will become apparent from the following description and from the claims. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.
Furthermore, features from different embodiments of the invention may be combined with each other, unless otherwise indicated. For example, a feature of the second embodiment may be substituted for a corresponding or functionally equivalent or similar feature of the first embodiment, and the resulting embodiments are likewise within the scope of the disclosure or recitation of the present application.
The core idea of the invention is to provide an active TSV adapter plate structure and a manufacturing method thereof to solve the problem that the integration level of a 2.5D packaging structure formed by the existing adapter plate packaging is difficult to improve
In order to realize the idea, the invention provides an active TSV adapter plate structure and a manufacturing method thereof, wherein the active TSV adapter plate structure comprises the following steps: forming an active functional layer on the upper surface of the first chip; forming a first TSV structure which does not penetrate through the first chip on the upper surface of the active functional layer; forming a first dielectric layer, wherein the first dielectric layer completely covers the upper surface of the active functional layer and the side wall and the bottom of the first TSV structure; filling conductive metal in the first TSV structure; leading out the electrical property of the active functional layer so as to electrically connect the active functional layer with the conductive metal; processing the lower surface of the first chip to expose the conductive metal in the first TSV structure; the electrical property of the conductive metal is led out from the lower surface of the first chip.
The present embodiment provides a method for manufacturing an active TSV interposer structure, as shown in fig. 1 to 14, including: forming an active functional layer 101a on an upper surface of the first chip 101; forming a first TSV structure 103 on the upper surface of the active functional layer 101a, which does not penetrate through the first chip 101; forming a first dielectric layer 104, wherein the first dielectric layer 104 completely covers the upper surface of the active functional layer 101a and the side wall and the bottom of the first TSV structure 103; filling a conductive metal 113 in the first TSV structure 103; leading out the electrical property of the active functional layer 101a so as to be electrically connected with the conductive metal 113; processing the lower surface of the first chip 101 to expose the conductive metal 113 in the first TSV structure 103; the electrical property of the conductive metal 113 is led out from the lower surface of the first chip 101.
In an embodiment of the present invention, in the method for manufacturing an active TSV interposer structure, the active functional layer 101a includes an active functional layer 101a dielectric layer and a metal layer, the metal layer has a pad layer for subsequent circuit connection, and the pad layer is exposed or covered by the active functional layer 101a dielectric layer. In the method for manufacturing the active TSV interposer structure, the forming of the first TSV structure 103 includes: forming a first opening 102 on the upper surface of the active functional layer 101a, wherein the first opening 102 is located in the dielectric layer of the active functional layer 101 a; the first opening 102 completely penetrates through the active functional layer 101a until the upper surface of the first chip 101 is exposed; a first via hole 103 is formed in the upper surface of the first chip 101 exposed by the first opening 102, and the bottom of the first via hole 103 is spaced from the lower surface of the first chip 101. In the method for manufacturing the active TSV adapter plate structure, the diameter of the first through hole 103 is smaller than that of the first opening 102; when the first dielectric layer 104 is formed, the first dielectric layer 104 completely covers the sidewalls and the bottom of the first opening 102 and the first via 103.
In an embodiment of the present invention, in the method for manufacturing an active TSV interposer structure, the upper surface of the conductive metal 113 is flush with the upper surface of the first dielectric layer 104. In the method for manufacturing the active TSV interposer structure, the step of electrically leading out the active functional layer 101a includes: manufacturing a second opening 105 at a position where the upper surface of the active functional layer 101a is matched with the pad layer, wherein the second opening 105 exposes the pad layer; a first wiring layer 106 is formed on the upper surface of the active functional layer 101a, and a metal layer of the first wiring layer 106 fills the second opening 105 and is electrically connected to the pad layer and the conductive metal 113 in the first TSV structure 103, respectively. In the method for manufacturing the active TSV adapter plate structure, the method further includes: manufacturing a patterned second dielectric layer 107 on the first dielectric layer 104 and the first wiring layer 106, and etching the second dielectric layer 107 to expose a partial area of the first wiring layer 106; first pads 108 are formed in situ on second dielectric layer 107, first pads 108 being electrically connected to first wiring layer 106.
In the method for manufacturing the active TSV adapter plate structure, the processing the lower surface of the first chip 101 includes: the lower surface of the first chip 101 is thinned, ground or etched, so that the conductive metal 113 at the bottom of the first TSV structure 103 is exposed from the lower surface of the first chip 101. In the method for manufacturing the active TSV interposer structure, the step of leading out the electrical property of the conductive metal 113 from the lower surface of the first chip 101 includes: covering a third dielectric layer 109 on the lower surface of the first chip 101, wherein the conductive metal 113 at the bottom of the first TSV structure 103 is exposed from the lower surface of the third dielectric layer 109; manufacturing a second wiring layer 110 on the lower surface of the first chip 101, wherein the second wiring layer 110 is electrically communicated with the conductive metal 113 in the first TSV structure 103; a patterned fourth dielectric layer 111 is manufactured on the lower surface of the first chip 101, so that a partial area of the second wiring layer 110 is exposed; and manufacturing a first solder ball 112 at the opening of the fourth dielectric layer 111, and electrically connecting the first solder ball 112 with the second wiring layer 110.
The embodiment also provides an active TSV adapter plate structure formed by the manufacturing method.
In the active TSV adapter plate structure and the manufacturing method thereof provided by the invention, the active function layer 101a is formed on the upper surface of the first chip 101, the first TSV structure 103 which does not penetrate through the first chip 101 is formed on the upper surface of the active function layer 101a, the first dielectric layer 104 is formed, the conductive metal 113 is filled in the first TSV structure 103, the electrical property of the active function layer 101a is led out, the lower surface of the first chip 101 is processed, the conductive metal 113 in the first TSV structure 103 is exposed, and the electrical property of the conductive metal 113 is led out from the lower surface of the first chip 101, so that the first TSV structure 103 is manufactured on the first chip 101 integrated with the active function layer 101a, namely, the first TSV structure is used as a TSV adapter plate, a 3D integrated packaging structure which is tighter than a traditional 2.5D packaging structure is realized, and the integration level of a packaging body can be effectively improved. The first TSV structure 103 is manufactured by using the first chip 101, and the functional chip and the adapter plate are combined into a whole, so that the performance is improved, and the packaging volume is reduced;
if the sizes of the first opening 102 and the first through hole 103 are the same, an olecranon-shaped contact surface notch appears at the cross section of the dielectric layer of the active functional layer 101a on the upper surface of the first chip 101 in the etching process of the first through hole 103, and insulation is not easily formed at the notch when an insulating dielectric layer is formed subsequently, so that the TSV structure is likely to fail, and the risk of failure of the first TSV structure 103 is avoided if the diameter of the first through hole 103 is smaller than that of the first opening 102. The invention provides a three-dimensional stacking structure based on a TSV (through silicon via) process and a manufacturing method thereof, which at least partially overcome the problems in the prior art.
The manufacturing method of the active TSV adapter plate structure provided by the invention comprises the following steps:
as shown in fig. 1, a first chip 101 is provided, an active functional layer 101a composed of a dielectric layer and a metal layer is present on the upper surface of the first chip 101, and a pad layer for subsequent circuit connection is present in the active functional layer 101a, and the pad may be exposed or covered by the dielectric layer. The pad layer of the first chip is covered by a dielectric layer in this example.
As shown in fig. 2, a first opening 102 is formed in a non-functional region (generally, a pure dielectric layer region) of the first opening active functional layer 101a, and the first opening 102 completely penetrates the active functional layer 101a and stays on the upper surface of the first chip 101.
As shown in fig. 3, a first through hole 103 and the first TSV hole 103 are formed in the first opening 102, and the bottom of the first TSV hole 103 is still a certain distance away from the lower surface of the substrate of the first chip 101, and the diameter of the first TSV hole 103 is smaller than the diameter of the first opening 102, that is, the edge of the first TSV hole 103 is a certain distance away from the edge of the first opening 102. The distance depends on the specific lithography, etching process capabilities and the actual requirements.
As shown in fig. 4, a first dielectric layer 104 covers the upper surface of the first chip 101, and the first dielectric layer 104 completely covers the upper surface of the first chip 101 and the sidewalls and the bottom of the first opening 102 and the first TSV hole 103.
As shown in fig. 5, the first opening 102 and the first TSV hole 103 are filled with a conductive metal, and the upper surface of the conductive metal is flush with the upper surface of the first dielectric layer 104.
As shown in fig. 6, a second opening 105 is formed at the position of the pad layer in the active functional layer 101a on the upper surface of the first chip 101, so that the pad layer is exposed.
As shown in fig. 7, a first wiring layer 106 is formed on the upper surface of the first chip 101, and a metal layer of the first wiring layer 106 fills the second opening 105 and is electrically connected to the pad in the active functional layer 101a and the metal in the first opening 102, respectively.
As shown in fig. 8, a patterned second dielectric layer 107 is formed on the upper surface of first chip 101, so that a partial area of first wiring layer 106 is exposed.
As shown in fig. 9, first pads 108 are formed in situ on second dielectric layer 107, and first pads 108 are electrically connected to first wiring layer 106. Different connecting structures such as bonding pads, solder balls and the like can be formed according to actual requirements.
As shown in fig. 10, the lower surface of the first chip 101 is thinned, ground, etched, and the like, so that the metal at the bottom of the first TSV hole 103 is exposed from the lower surface of the first chip 101.
As shown in fig. 11, the third dielectric layer 109 covers the lower surface of the first chip 101, and the metal at the bottom of the first TSV hole 103 is exposed from the lower surface of the third dielectric layer 109.
As shown in fig. 12, a second wiring layer 110 is formed on the lower surface of the first chip 101, and the second wiring layer 110 is electrically connected to the metal in the first TSV hole 103.
As shown in fig. 13, a patterned fourth dielectric layer 111 is formed on the lower surface of the first chip 101, so that a partial region of the second wiring layer 110 is exposed.
As shown in fig. 14, first solder balls 112 are formed at the openings of the fourth dielectric layer 111, and the first solder balls 112 are electrically connected to the second wiring layer 110. Different connecting structures such as bonding pads, solder balls and the like can be formed according to actual requirements.
In addition, under the condition that the equipment capability of the via last is the same, the limitation on the size of the TSV to be manufactured is higher than that of the manufacturing method of the invention, and the TSV hole with the high depth-to-width ratio (more than 3:1) is difficult to manufacture, and the technical method adopted by the invention can manufacture the TSV hole with the depth-to-width ratio more than 10: 1. The prior art can not carry out multilayer three-dimensional stacking, but the invention can realize multilayer (more than or equal to 2) three-dimensional stacking because a double-sided leading-out structure of the adapter plate is manufactured on the active chip without the limitation of the number of stacking layers; the invention realizes the two-in-one of the chip and the adapter plate structure and realizes the three-dimensional stacked packaging with higher density.
In summary, the above embodiments describe the active TSV adapter structure and the manufacturing method thereof in detail, but the present invention is not limited to the above embodiments, and any modifications based on the configurations provided by the above embodiments are within the scope of the present invention. One skilled in the art can take the contents of the above embodiments to take a counter-measure.
The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. For the system disclosed by the embodiment, the description is relatively simple because the system corresponds to the method disclosed by the embodiment, and the relevant points can be referred to the method part for description.
The above description is only for the purpose of describing the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention, and any variations and modifications made by those skilled in the art based on the above disclosure are within the scope of the appended claims.

Claims (10)

1. A manufacturing method of an active TSV adapter plate structure is characterized by comprising the following steps:
forming an active functional layer on the upper surface of the first chip;
forming a first TSV structure which does not penetrate through the first chip on the upper surface of the active functional layer;
forming a first dielectric layer, wherein the first dielectric layer completely covers the upper surface of the active functional layer and the side wall and the bottom of the first TSV structure;
filling conductive metal in the first TSV structure;
leading out the electrical property of the active functional layer so as to electrically connect the active functional layer with the conductive metal;
processing the lower surface of the first chip to expose the conductive metal in the first TSV structure;
the electrical property of the conductive metal is led out from the lower surface of the first chip.
2. The method of claim 1, wherein the active function layer comprises an active function layer dielectric layer and a metal layer, the metal layer has a pad layer for subsequent circuit connection, and the pad layer is exposed or covered by the active function layer dielectric layer.
3. The method of manufacturing an active TSV interposer structure of claim 2, wherein forming a first TSV structure comprises:
forming a first opening on the upper surface of the active functional layer, wherein the first opening is positioned in the active functional layer dielectric layer;
making the first opening completely penetrate through the active functional layer until the first chip upper surface is exposed;
and manufacturing a first through hole on the upper surface of the first chip exposed by the first opening, wherein the bottom of the first through hole has a certain distance with the lower surface of the first chip.
4. The method of manufacturing an active TSV interposer structure of claim 3, wherein a diameter of said first via is smaller than a diameter of said first opening;
when the first dielectric layer is formed, the first dielectric layer completely covers the side walls and the bottom of the first opening and the first through hole.
5. The method of manufacturing an active TSV interposer structure of claim 1, wherein said conductive metal top surface is flush with the top surface of the first dielectric layer.
6. The method of manufacturing an active TSV interposer structure of claim 2, wherein the electrically extracting the active functional layer comprises:
manufacturing a second opening at the position, matched with the pad layer, of the upper surface of the active functional layer, wherein the second opening enables the pad layer to be exposed;
and manufacturing a first wiring layer on the upper surface of the active functional layer, wherein the metal layer of the first wiring layer is filled in the second opening and is respectively and electrically connected with the pad layer and the conductive metal in the first TSV structure.
7. The method of manufacturing an active TSV interposer structure of claim 6, further comprising:
manufacturing a graphical second dielectric layer on the first dielectric layer and the first wiring layer, and etching the second dielectric layer to expose partial area of the first wiring layer;
and manufacturing a first bonding pad in situ on the second dielectric layer, wherein the first bonding pad is electrically connected with the first wiring layer.
8. The method of manufacturing an active TSV interposer structure of claim 1, wherein processing the first chip lower surface comprises:
and thinning, grinding or etching the lower surface of the first chip to enable the conductive metal at the bottom of the first TSV structure to be exposed out of the lower surface of the first chip.
9. The method of claim 8, wherein the step of electrically conducting the conductive metal from the bottom surface of the first chip comprises:
covering a third medium layer on the lower surface of the first chip, wherein the conductive metal at the bottom of the first TSV structure is exposed out of the lower surface of the third medium layer;
manufacturing a second wiring layer on the lower surface of the first chip, wherein the second wiring layer is electrically communicated with the conductive metal in the first TSV structure;
manufacturing a graphical fourth dielectric layer on the lower surface of the first chip, so that part of the second wiring layer is exposed;
and manufacturing a first solder ball at the opening of the fourth dielectric layer, and electrically connecting the first solder ball with the second wiring layer.
10. An active TSV interposer structure formed by the method of manufacture of any of claims 1 to 9.
CN202011634432.XA 2020-12-31 2020-12-31 Active TSV adapter plate structure and manufacturing method thereof Withdrawn CN112864118A (en)

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Application publication date: 20210528