CN112858781A - Harmonic detection system - Google Patents
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Abstract
The invention relates to a harmonic detection system, comprising: a voltage harmonic analysis module: sampling external voltage by using a voltage sampling circuit, inputting the external voltage to the MCU for analysis, storing and outputting a result; a current harmonic analysis module: sampling external voltage by using a current sampling circuit, inputting the sampled external voltage to the MCU for analysis, storing and outputting a result; an alarm module: the sizes of the current harmonic component value and the preset value are judged by inquiring the relevant state bit or the interrupt output signal in the chip, and the values are used as the conditions for calculating whether the engine is started or not. The technical scheme provided by the invention can avoid the problem of communication interference between the two chips, and only one main chip is designed to complete harmonic detection and other functions of the intelligent ammeter, so that the cost is reduced.
Description
Technical Field
The invention belongs to the technical field of electrical measurement, and particularly relates to a harmonic detection system.
Background
With the development of power systems, nonlinear loads are applied on a large scale, and a large amount of harmonic waves are injected into a power grid, so that the voltage and current waveform distortion of the power system is more and more serious, and the power quality and the power utilization safety are seriously influenced. Therefore, harmonic detection and suppression is of great practical and economic significance. At present, methods for detecting harmonics in an electric power system can be broadly classified into two broad categories, namely frequency domain-based detection methods and time domain-based detection methods. Frequency domain based detection methods are based on fourier transforms, including Fast Fourier Transform (FFT), Discrete Fourier Transform (DFT), and iterative fourier transform (RDFT).
A protection circuit of intelligent low pressure reactive compensation control system in patent publication No. CN202817707U, control system includes main control CPU and the three-phase switching circuit that links to each other with main control CPU, sampling circuit and input/output circuit, protection circuit links to each other with main control CPU, protection circuit includes the DSP control chip that links to each other with main control CPU, the relay, fundamental wave generating circuit and temperature sensor, be equipped with AD converting unit and harmonic detection unit in the DSP control chip, AD converting unit links to each other with harmonic detection unit, AD converting unit respectively with sampling circuit, fundamental wave generating circuit and temperature sensor link to each other, the relay links to each other with DSP control chip. When the equipment of the control system is in fault due to the fact that the equipment is over-temperature, abnormal in phase sequence or excessive in harmonic wave during operation, the control system sends alarm information through the DSP control chip, and the master control CPU controls the cut-off working circuit to guarantee normal operation of the system.
The harmonic detection in the above patent is realized by a DSP chip, and a main CPU is additionally needed to realize other functions of the intelligent electric meter, so that the cost is high, and the design is complex. And the communication between the two chips will have signal interference.
Disclosure of Invention
In order to solve the problems, the invention provides a harmonic detection system which can avoid the problem of communication interference between two chips, only one main chip is designed to complete harmonic detection and other functions of an intelligent electric meter, and the cost is reduced.
The technical scheme of the invention is as follows:
a harmonic detection system comprising:
a voltage harmonic analysis module: sampling external voltage by using a voltage sampling circuit, inputting the external voltage to the MCU for analysis, storing and outputting a result;
a current harmonic analysis module: sampling external voltage by using a current sampling circuit, inputting the sampled external voltage to the MCU for analysis, storing and outputting a result;
an alarm module: the sizes of the current harmonic component value and the preset value are judged by inquiring the relevant state bit or the interrupt output signal in the chip, and the values are used as the conditions for calculating whether the engine is started or not.
Preferably, the MCU utilizes a calculation engine to perform 2-32 harmonic analysis or 33-42 harmonic analysis on the input voltage and current.
Preferably, the calculation engine adopts a DFT calculation engine, and a preamplifier is arranged in front of the DFT calculation engine and is used for amplifying the input signal.
Preferably, the voltage sampling circuit and the current sampling circuit are both connected to the MCU through an AD detection port, the AD sampling frequency of the MCU is set between 1KHz and 20KHz, the DFT calculation is performed by intercepting sampling points, the number of the sampling points is set between 1028 and 8224, and the single calculation time of the DFT engine is set between 0.1 and 20 seconds.
Preferably, the specific process of 2-32 th harmonic analysis is as follows:
1) setting a DFT calculation engine, and writing the pre-amplification times of voltage and current into a register;
2) starting a DFT calculation engine, and writing 0001H into the control register;
3) detecting a DFT control register, and finishing DFT calculation when DFT _ CRUAL is equal to 0;
4) and reading the register value, and converting to obtain a harmonic component value, a fundamental voltage and a fundamental current.
Preferably, the harmonic component value is register value/163.84, and the register address is 100H to 1 BFH; the fundamental current is register value × 1.6328 × 10-3Current pre-amplification factor, register address 1C0H, 1C2H, 1C 4H; the fundamental wave voltage is equal to the register value × 1.6328 × 10-2Voltage pre-amplification factor, register addresses 1C1H, 1C3H, 1C 5H.
Preferably, the calculation formula of the harmonic component values is as follows:
where X (k) denotes the value of the kth harmonic component, and X (0) is the value of the fundamental wave.
Preferably, the specific process of 33 th-42 th harmonic analysis is as follows:
1) reading the value of the frequency register (1D 7H) and writing the value into the register (1D 4H);
2) converting the value of the frequency register (1D 7H) into an HEX format, writing high bytes into (1D 2H) and writing low bytes into (1D 3H);
3) starting a DFT calculation engine;
4) and writing the harmonic component values into the corresponding registers.
Preferably, the calculation formula of the harmonic component values is as follows:
where X (k) denotes the value of the kth harmonic component, and X (0) is the value of the fundamental wave.
Preferably, the specific process in the alarm module is as follows:
1) setting a THD + N identification mark;
2) inquiring the THD + N monitoring mark, judging whether the current harmonic component value is greater than a preset value, if so, starting a DFT calculation engine, otherwise, continuously inquiring the THD + N monitoring mark;
3) and inquiring the DFT completion identification, confirming whether the DFT calculation is completed, if so, directly reading the DFT calculation result, and otherwise, continuously inquiring the DFT completion identification.
The invention has the beneficial effects that:
according to the invention, through the design of the whole system, the problem of interference caused by communication between two chips in the traditional harmonic detection can be avoided, and only one main chip is designed to complete the harmonic detection and other functions of the intelligent ammeter, so that the cost is reduced.
Drawings
Fig. 1 is a block diagram of the overall structure of the present invention.
Fig. 2 shows a calculation flow of THD1 in the embodiment of the present invention.
Fig. 3 is a calculation flow of THD2 in the embodiment of the present invention.
Fig. 4 is a flowchart of a method in the early warning module according to an embodiment of the present invention.
Detailed Description
The embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
As shown in fig. 1, a harmonic detection system includes: the device comprises a voltage harmonic analysis module, a current harmonic analysis module and an alarm module, wherein the voltage harmonic analysis module is used for sampling external voltage by using a voltage sampling circuit, inputting the external voltage to an MCU (microprogrammed control Unit) for analysis, storing and outputting results, the current harmonic analysis module is used for sampling the external voltage by using a current sampling circuit, inputting the external voltage to the MCU for analysis, storing and outputting results, and the alarm module is used for judging the sizes of current harmonic component values and preset values by inquiring related state bits or interrupt output signals in a chip and is used as a condition for calculating whether an engine is.
In one embodiment of the invention, the MCU utilizes a calculation engine to perform 2-32 order harmonic analysis or 33-42 order harmonic analysis on the input voltage and current.
As an embodiment of the invention, the calculation engine adopts a DFT calculation engine, and a preamplifier is arranged in front of the DFT calculation engine for amplifying an input signal. The DFT calculation engine inside the MCU can complete harmonic analysis functions of 2-32 times or 33-42 times of 6 channels, and when an input signal is small, the calculation error of harmonic analysis becomes large, so that the signal needs to be processed by a preamplifier.
As an implementation mode of the invention, a voltage sampling circuit and a current sampling circuit are both connected to an MCU through an AD detection port, the AD sampling frequency of the MCU is set between 1KHz and 20KHz, DFT calculation is carried out by intercepting sampling points, the number of the sampling points is set between 1028 and 8224, and the single calculation time of the DFT engine is set between 0.1 and 20 seconds. In this embodiment, the AD sampling frequency of the MCU is set to 8KHZ, DFT computation is performed by intercepting 4096 sampling points, and the single computation time of the DFT engine is 0.5 seconds.
As an embodiment of the present invention, as shown in fig. 2, a specific flow of 2-32 th harmonic analysis is as follows:
1) setting a DFT calculation engine, and writing the pre-amplification times of voltage and current into a register;
2) starting a DFT calculation engine, and writing 0001H into the control register;
3) detecting a DFT control register, and finishing DFT calculation when DFT _ CRUAL is equal to 0;
4) and reading the register value, and converting to obtain a harmonic component value, a fundamental voltage and a fundamental current.
In this embodiment, the pre-magnification is set to 10 times.
As an embodiment of the present invention, the harmonic component value is register value/163.84, and the register address is 100H to 1 BFH; fundamental current is register value × 1.6328 × 10-3Current pre-amplification factor, register address 1C0H, 1C2H, 1C 4H; fundamental wave voltage is register value × 1.6328 × 10-2Voltage pre-amplification factor, register addresses 1C1H, 1C3H, 1C 5H.
As an embodiment of the present invention, the calculation formula of the harmonic component values is:
where X (k) denotes the value of the kth harmonic component, and X (0) is the value of the fundamental wave.
As an embodiment of the present invention, as shown in fig. 3, a specific flow of 33 th-42 th harmonic analysis is as follows:
1) reading the value of the frequency register (1D 7H) and writing the value into the register (1D 4H);
2) converting the value of the frequency register (1D 7H) into an HEX format, writing high bytes into (1D 2H) and writing low bytes into (1D 3H);
3) starting a DFT calculation engine;
4) and writing the harmonic component values into the corresponding registers.
As an embodiment of the present invention, the calculation formula of the harmonic component values is:
where X (k) denotes the value of the kth harmonic component, and X (0) is the value of the fundamental wave.
Total harmonic component THDTThe calculation formula of (2) is as follows:
as an implementation mode of the invention, in practical application, threshold alarm functions of the THDs 1-42 of three-phase voltage and current can be set, and whether the current THDs 1-42 are larger than a set value or not can be judged by inquiring related state bits or interrupt output signals in a chip. If the harmonic signal is greater than the set value, the DFT computation engine may be started to analyze and record the harmonic signal in the line, as shown in fig. 4, the specific process is as follows:
1) setting a THD + N identification mark;
2) inquiring the THD + N monitoring mark, and judging whether the current harmonic component value is greater than a preset value, wherein the preset value is 20H in the embodiment, if so, starting a DFT calculation engine, otherwise, continuously inquiring the THD + N monitoring mark;
3) and inquiring the DFT completion identification, confirming whether the DFT calculation is completed, if so, directly reading the DFT calculation result, and otherwise, continuously inquiring the DFT completion identification.
Finally, it should be noted that: the above-mentioned embodiments are only specific embodiments of the present invention, which are used for illustrating the technical solutions of the present invention and not for limiting the same, and the protection scope of the present invention is not limited thereto, although the present invention is described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: any person skilled in the art can modify or easily conceive the technical solutions described in the foregoing embodiments or equivalent substitutes for some technical features within the technical scope of the present disclosure; such modifications, changes or substitutions do not depart from the spirit and scope of the present invention in its spirit and scope. Are intended to be covered by the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (10)
1. A harmonic detection system, comprising:
a voltage harmonic analysis module: sampling external voltage by using a voltage sampling circuit, inputting the external voltage to the MCU for analysis, storing and outputting a result;
a current harmonic analysis module: sampling external voltage by using a current sampling circuit, inputting the sampled external voltage to the MCU for analysis, storing and outputting a result;
an alarm module: the sizes of the current harmonic component value and the preset value are judged by inquiring the relevant state bit or the interrupt output signal in the chip, and the values are used as the conditions for calculating whether the engine is started or not.
2. The harmonic detection system of claim 1 wherein the MCU utilizes a computational engine to perform 2-32 harmonic analysis or 33-42 harmonic analysis on the input voltage and current.
3. The harmonic detection system of claim 2 wherein the computational engine employs a DFT computational engine preceded by a preamplifier for amplifying the input signal.
4. The harmonic detection system according to claim 3, wherein the voltage sampling circuit and the current sampling circuit are both connected to the MCU through the AD detection port, the AD sampling frequency of the MCU is set between 1KHz and 20KHz, the DFT calculation is performed by intercepting sampling points, the number of the sampling points is set between 1028 and 8224, and the single calculation time of the DFT engine is set between 0.1 and 20 seconds.
5. The harmonic detection system of claim 2 wherein the specific process of the 2-32 th harmonic analysis is:
1) setting a DFT calculation engine, and writing the pre-amplification times of voltage and current into a register;
2) starting a DFT calculation engine, and writing 0001H into the control register;
3) detecting a DFT control register, and finishing DFT calculation when DFT _ CRUAL is equal to 0;
4) and reading the register value, and converting to obtain a harmonic component value, a fundamental voltage and a fundamental current.
6. The harmonic detection system of claim 5 wherein the harmonic component values are register values/163.84 with register addresses of 100H-1 BFH; the fundamental current is register value × 1.6328 × 10-3Current pre-amplification factor, register address 1C0H, 1C2H, 1C 4H; the fundamental wave voltage is equal to the register value × 1.6328 × 10-2Voltage pre-amplification factor, register addresses 1C1H, 1C3H, 1C 5H.
7. The harmonic detection system as claimed in claim 6, wherein the calculation formula of the harmonic component values is:
where X (k) denotes the value of the kth harmonic component, and X (0) is the value of the fundamental wave.
8. The harmonic detection system of claim 2, wherein the specific process of the 33 th-42 th harmonic analysis is as follows:
1) reading the value of the frequency register (1D 7H) and writing the value into the register (1D 4H);
2) converting the value of the frequency register (1D 7H) into an HEX format, writing high bytes into (1D 2H) and writing low bytes into (1D 3H);
3) starting a DFT calculation engine;
4) and writing the harmonic component values into the corresponding registers.
9. The harmonic detection system as claimed in claim 8, wherein the calculation formula of the harmonic component values is:
where X (k) denotes the value of the kth harmonic component, and X (0) is the value of the fundamental wave.
10. The harmonic detection system of claim 2, wherein the specific process in the alarm module is as follows:
1) setting a THD + N identification mark;
2) inquiring the THD + N monitoring mark, judging whether the current harmonic component value is greater than a preset value, if so, starting a DFT calculation engine, otherwise, continuously inquiring the THD + N monitoring mark;
3) and inquiring the DFT completion identification, confirming whether the DFT calculation is completed, if so, directly reading the DFT calculation result, and otherwise, continuously inquiring the DFT completion identification.
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Application publication date: 20210528 |