CN112838862A - Broadband radio frequency signal frequency detection and tracking device based on all-digital phase-locked loop - Google Patents
Broadband radio frequency signal frequency detection and tracking device based on all-digital phase-locked loop Download PDFInfo
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- H—ELECTRICITY
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- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
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- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
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- H03L7/0991—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider
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- H03L7/0991—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider
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Abstract
The invention discloses a broadband radio frequency signal frequency detection and tracking device based on an all-digital phase-locked loop, which comprises a frequency rough estimation module, a radio frequency signal frequency accurate measurement and tracking module based on the all-digital phase-locked loop and a frequency estimation algorithm module. The device effectively avoids the problem that the analog front end of a digital reconnaissance receiver is difficult to finish high-precision real-time interception of radio-frequency signals in a broadband range, adjusts the signals in the broadband range into input signals suitable for an all-digital phase-locked loop, and realizes quick detection and tracking of the frequency of the radio-frequency signals. The structure of the invention has novelty and universality, and is used for the rapid detection and tracking of radio frequency signals in a broadband range in the field of wireless communication/radar/electronic countermeasure.
Description
Technical Field
The invention relates to the field of wireless communication/radar/electronic countermeasure, in particular to a front-end frequency measuring device of a receiver.
Background
With the development of scientific technology in recent years, battlefield confrontation in the traditional sense is shifting to electronic confrontation. The frequency measurement and tracking technology plays an important role in modern electronic countermeasure, and is suitable for electronic information reconnaissance, radar alarm and the like. The efficient electronic warfare developed for the enemy can interfere with the communication link of the enemy, destroy electronic equipment of the enemy or counteract the electronic reconnaissance means of the enemy at the minimum cost. The ability to rapidly detect signal frequencies in complex modern electromagnetic environmental conditions is one of the key elements that dominates electronic warfare. In addition, in the civil communication industry, the demand for frequency measurement is gradually increased by the development and increase of various devices.
The commonly used technique for instantaneous frequency measurement, which is mentioned in jan 2007 ebschohost (reference 1), is mainly delay line phase discrimination. As shown in fig. 1, the main idea is to divide a single-frequency signal into two paths, wherein one path of signal is output after passing through a delay line, and therefore the two paths of signals have different phases. The phase difference between the two paths of signals is detected by a phase discriminator, and the relationship between frequency and delay time can be established by combining the known delay time difference, so that the frequency-phase conversion is realized; and then phase-amplitude conversion is realized by using the resistance ring, and finally, a frequency value is obtained by reversely deducing the measured amplitude information. The technology is widely applied to engineering, but has the defects of large volume and low frequency measurement precision.
The document "in detail, et al, an Instantaneous Frequency Measurement technique Based on time-to-digital converter/The echo technology of instant Frequency Measurement Based on tdc. electronic Measurement technique, vol.39, No.11, jan.2016, pp.16-25. ebschost" (ref.2), describes a digital counting Frequency Measurement technique, and The general block diagram of The system is shown in fig. 2. The technology measures the pulse envelope time and the number of the measured signal pulses in the pulse envelope by a digital method, and calculates to obtain a frequency value. In order to improve the frequency measurement precision, a clock with higher frequency is required to be used as a standard to measure the pulse envelope time, and at present, a method of performing multi-path phase shift on the standard clock is generally adopted to obtain an equivalent clock. However, when higher frequency measurement accuracy is required, it is difficult to shift the phase of the clock more accurately, and the equivalent clock frequency is also difficult to increase.
The document "wan red silk. research on X-band instantaneous frequency measuring meter" jan.2007. ebschost "(reference 3) introduces a digital instantaneous frequency measuring technology, which is based on a typical radio frequency transceiver technology, performs down-conversion and analog-to-digital conversion on a received signal, and combines a digital frequency measuring algorithm to perform instantaneous measurement on a pulse radar carrier frequency. The method has the advantages of complex system architecture, large area, high cost, high power consumption, and high requirement on the processing speed of an Analog-to-Digital Converter (ADC). The Digital frequency measurement algorithm based on a Digital Signal Processor (DSP for short) or a Field Programmable Gate Array (FPGA for short) has a slow operation speed, and if the requirement of meeting the index requirements of good instantaneity, high frequency measurement precision and narrow frequency measurement pulse width at the same time is required, a broadband high-speed high-precision ADC and a high-performance FPGA are required, but the ultra-high speed ADC is very expensive.
The document, "moccept", an All Digital Phase-locked Loop design based on a 0.18 μm CMOS process, jan.2016.ebsco "(reference 4), designs an All Digital Phase-locked Loop (ADPLL for short), which is mainly composed of four modules, namely, a Phase detector, a controller, a digitally controlled oscillator, and a programmable frequency divider. Its reference clock is provided by the system chip, typically tens of megahertz. The output frequency of the numerically controlled oscillator is subjected to N frequency division by the programmable frequency divider to obtain a frequency division clock, the frequency division clock enters a loop and is compared with the reference clock, and the output frequency of the oscillator is N times of the frequency of the reference clock after the frequency of the frequency division clock is consistent with that of the reference clock. Phase-locked loops are now used to generate stable signals of a certain frequency magnitude and have a wide range of applications in many areas such as modulation, demodulation, frequency synthesis, carrier synchronization, retiming, etc.
In summary, the existing frequency detection tracking has the problems of low detection precision, large area, high power consumption, high device requirement and the like; meanwhile, the capability of measuring and tracking the signal frequency in a broadband range needs to be improved.
Disclosure of Invention
In view of the above-mentioned shortcomings of the prior art, the frequency detection and tracking device designed by the present invention can perform fast detection and tracking of fast and agile radio frequency signals in a wideband range, and is used to guide the front end of a conventional digital reconnaissance receiver to adaptively change the bandwidth and local oscillation frequency of a channel selection filter according to the output signal of the device. Because the device can complete the rapid tracking of signal frequency change in a broadband range, the device can also directly identify the signal type of certain simple radar signals such as chirp signals.
In order to achieve the above object, the technical solution of the present invention is that an apparatus for detecting and tracking a frequency of a wideband radio frequency signal based on an ADPLL includes a frequency rough estimation module, a radio frequency signal frequency precise measurement and tracking module based on an ADPLL, and a frequency estimation algorithm module, wherein the frequency rough estimation module includes a high frequency counter CNT0, and is an adaptive adjustable frequency divider N0 for adapting to frequency detection of the wideband radio frequency signal; the frequency precision measuring and tracking module of the radio frequency signal based on the ADPLL comprises a system clock generating module C realized by using a D trigger, two counters CNT 1-CNT 2, an adder M, a loop filter LP, a time-to-digital converter TDC, a numerical control oscillator DCO, a frequency divider NC with a fixed frequency dividing ratio and an automatic frequency calibration module; the frequency estimation algorithm module calculates the frequency of the current input signal according to the frequency control word OTW of the digitally controlled oscillator DCO and the frequency division ratio of the frequency divider N0, and can make type identification for simple radar signals such as chirp signals.
The circuit input signal is FREF. The FREF is used as an input and is connected to the input end of a high-frequency counter CNT0 in the frequency rough estimation module and the input end of an adjustable frequency divider N0, and meanwhile, the frequency divider N0 receives the counting result of the counter CNT 0; the frequency divider N0 sets its frequency dividing ratio according to the input information, and adjusts FREF to be within an appropriate frequency range. The module can enable the frequency detection device to work in an environment with a wider frequency range, and make up for the defect of smaller frequency detection range in the existing frequency detection technology.
The frequency precision measuring and tracking module of the radio frequency signal based on the ADPLL has a similar working mode as a traditional phase-locked loop, and an input signal is a signal obtained by frequency division of a frequency divider N0. The output end of the frequency divider N0 is connected to the input end of a system clock generation module C realized by using a D trigger and the input end of a time-to-digital converter TDC; the output of the system clock generation module C is connected to the counter CNT1, while the counter CNT1 receives the pre-designed accumulation step FCW; the output of CNT1 is connected to adder M, whose counting result is used as one of the inputs of the automatic frequency calibration module; the output of the adder M is connected to the loop filter LP; the output end of the loop filter LP and the output end of the automatic frequency calibration module are connected to a digital controlled oscillator DCO; the output end of the digital controlled oscillator DCO is connected to a frequency divider NC with a fixed frequency dividing ratio, and the frequency dividing ratio is preset; the output of the divider NC with a fixed division ratio is connected to a system clock generation block C implemented using D flip-flops, a counter CNT2 and a time-to-digital converter TDC; the output of the counter CNT2 is connected to the adder M, the counting result of which is one of the inputs of the automatic frequency calibration module; the output of the time-to-digital converter TDC is connected to an adder M.
The frequency estimation algorithm module takes the frequency dividing ratio of the self-adaptive adjustable frequency divider N0 and the frequency control word OTW of the numerical control oscillator DCO as input, calculates to obtain the frequency estimation value FOUT of the input signal FREF, and can identify the type of a simple radar signal such as a linear frequency modulation signal according to the output of the module in a certain time.
Compared with the prior art, the invention has the following advantages:
the radar frequency detection device has the advantages that the accurate measurement of signal frequency in a broadband range can be realized, the change of the signal frequency can be tracked, the signal type identification can be carried out on certain simple radar signals such as linear frequency modulation signals, the circuit structure is simple, the circuit stability is good, the anti-interference capability is strong, the detection time is short, and the problems that the existing frequency detection technology is low in detection precision, high in device requirement, narrow in working bandwidth and the like are solved.
Drawings
Fig. 1 is a block diagram of a frequency detection device based on a delay line.
Fig. 2 is a general block diagram of a digital instantaneous frequency measuring machine.
FIG. 3 is a schematic diagram of an apparatus for detecting and tracking a frequency of a wideband RF signal based on an ADPLL according to the present invention.
Detailed Description
The present invention is further illustrated by the following examples, which are intended to be purely exemplary and are not intended to limit the scope of the invention, which is defined in the appended claims, as may be amended by those skilled in the art upon reading the present invention, and all changes that come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.
Example 1: the first exemplary embodiment of the present invention:
the invention discloses an implementation mode of a broadband radio frequency signal frequency detection and tracking device based on ADPLL, which comprises the following steps:
as shown in fig. 3, an apparatus for detecting and tracking the frequency of a wideband rf signal based on an ADPLL includes a frequency rough estimation module, an rf signal frequency precise measurement and tracking module based on an ADPLL, and a frequency estimation algorithm module. The frequency rough estimation module comprises a high-frequency counter CNT0, and is a self-adaptive adjustable frequency divider N0 for adapting to the frequency detection of the broadband radio frequency signal; the frequency precision measuring and tracking module of the radio frequency signal based on the ADPLL comprises a system clock generating module C realized by using a D trigger, two counters CNT 1-CNT 2, an adder M, a loop filter LP, a time-to-digital converter TDC, a numerical control oscillator DCO, a frequency divider NC with a fixed frequency dividing ratio and an automatic frequency calibration module; the frequency estimation algorithm module calculates the frequency of the current input signal according to the frequency control word OTW of the digitally controlled oscillator DCO and the frequency division ratio of the frequency divider N0, and can make type identification for simple radar signals such as chirp signals.
The circuit input signal is FREF. FREF is connected as input to the input of the high frequency counter CNT0 and to the input of the adjustable frequency divider N0 in the frequency coarse estimation block, while the divider N0 receives the counting result of the counter CNT 0. The frequency dividing ratio of the frequency divider N0 is calculated by equation (1).
Wherein CNT is a counting result of the counter CNT 0; Δ T is the counting time window of the counter CNT0, here 1 us.
The output of the frequency divider N0 is used as the input of the ADPLL-based radio frequency signal frequency precision measurement and tracking module, and is connected to the input of the system clock generation module C implemented by using a D flip-flop and the input of the time-to-digital converter TDC; the output of the system clock generation module C is connected to the counter CNT1, while the counter CNT1 receives the pre-designed accumulation step FCW; the output of CNT1 is connected to adder M, whose counting result is used as one of the inputs of the automatic frequency calibration module; the output of the adder M is connected to the loop filter LP; the output end of the loop filter LP and the output end of the automatic frequency calibration module are connected to a digital controlled oscillator DCO; the output end of the digital controlled oscillator DCO is connected to a frequency divider NC with a fixed frequency dividing ratio, and the frequency dividing ratio is preset; the output of the divider NC with a fixed division ratio is connected to a system clock generation block C implemented using D flip-flops, a counter CNT2 and a time-to-digital converter TDC; the output of the counter CNT2 is connected to the adder M, the counting result of which is one of the inputs of the automatic frequency calibration module; the output of the time-to-digital converter TDC is connected to an adder M.
In the embodiment, the frequency range of the input signal FREF is 30MHz-6 GHz; the accumulation step FCW of counter CNT1 is 36; the output frequency range of the DCO of the numerical control oscillator is 1-4GHz, the OTW of the control word is 13 bits (4 bits of coarse adjustment code, 5 bits of middle adjustment code and 4 bits of fine adjustment code), the step length of the coarse adjustment is 188MHz, the step length of the middle adjustment is 5.88MHz and the step length of the fine adjustment is 367.6 KHz; the TDC of the time-to-digital converter adopts 64 stages of delay chains, and Buff of each stage is 53 ps; the division ratio of the divider NC is 4.
In the detection process, the ADPLL is accelerated by using an automatic frequency calibration module (AFC). The module adopts output signals of counters CNT 1-CNT 2 as input, and determines a coarse adjustment position and a middle adjustment position of a frequency control word OTW of a numerical control LC oscillator DCO bit by using a coarse adjustment and middle adjustment process based on a binary algorithm. On the basis, the DCO correspondingly increases or decreases a minimum unit of the fine tuning code of the frequency control word OTW according to the phase error signal obtained by integrating the time-to-digital converter TDC and the loop filter LP, so as to obtain the final frequency control word OTW.
The frequency estimation algorithm module takes the frequency division ratio of the self-adaptive adjustable frequency divider N0 and the frequency control word OTW of the numerically controlled oscillator DCO as input, and calculates the current output frequency f of the numerically controlled oscillator DCO according to the formula (2)DCO。
fDCO＝fosc+OTW[12..9]×Sc+OTW[8..4]×Sm+OTW[3..0]×Sf (2)
Wherein f isoscThe initial oscillation frequency of DCO, here 1 GHz; OTW [12..9 ]]Is 9-12 bits of frequency control word OTW, OTW [8..4 ]]Is 4-8 bits of frequency control word OTW, OTW [3..0]Is 0-3 bits of the frequency control word OTW; scFor coarse step size, here 188 MHz; smFor the step size of the center adjustment, here 5.88 MHz; sfFor fine adjustment of the step size, 367.6KHz is provided here.
And (4) calculating to obtain a frequency estimation value FOUT of the input signal FREF according to the formula (3).
The module may be implemented on a computer using a programming tool such as C, on an FPGA using a hardware description language such as verilog hdl, or on an integrated circuit chip.
Simple radar signals can be identified by the output of the module in a certain time. For example, if the frequency estimation value output by the circuit in the time dimension changes according to a linear law, it can be determined that the circuit receives a frequency Modulated Continuous wave fmcw (frequency Modulated Continuous wave).
The C language simulation results of the first exemplary embodiment of the present invention are shown in table 1.
TABLE 1C language simulation results
It should be noted that the above-mentioned embodiments are only preferred embodiments of the present invention, and are not intended to limit the scope of the present invention, and all equivalent substitutions or substitutions made on the basis of the above-mentioned technical solutions belong to the scope of the present invention.
Claims (7)
1. A broadband radio frequency signal frequency detection and tracking device based on an all-digital phase-locked loop is characterized by comprising a frequency rough estimation module, a radio frequency signal frequency precise measurement and tracking module based on the all-digital phase-locked loop and a frequency estimation algorithm module;
the frequency rough estimation module has the functions of measuring a rough estimation value of the frequency in a very short time, adjusting the frequency division ratio of the frequency divider and dividing the frequency of the input signal into a frequency range suitable for the work of the radio frequency signal frequency precise measurement and tracking module based on the all-digital phase-locked loop;
the function of the radio frequency signal frequency accurate measurement and tracking module based on the all-digital phase-locked loop is to take the output signal of the frequency rough estimation module as input, and utilize the all-digital phase-locked loop circuit to maintain a special mathematical relationship between the output frequency and the input frequency of the numerically controlled oscillator so as to obtain the frequency control word of the numerically controlled oscillator;
the function of the frequency estimation algorithm module is to obtain the frequency of the current input signal according to the frequency control word of the numerically controlled oscillator.
2. The apparatus of claim 1, wherein the frequency rough estimation module comprises a high frequency counter CNT0 and an adaptive adjustable frequency divider N0 for adapting the frequency detection of the wideband rf signal; the circuit inputs are connected to the input of the high frequency counter CNT0 and the input of the adjustable frequency divider N0 in the frequency coarse estimation block, while the frequency divider N0 receives the counting result of the counter CNT 0; the adjustable frequency divider N0 sets its dividing ratio according to the input information, and adjusts the frequency of the input signal to the frequency range suitable for the precise measurement and tracking module based on the frequency of the RF signal of the ADPLL.
3. The apparatus of claim 1, wherein the adpll-based rf signal frequency precision measurement and tracking module comprises a system clock generation module C implemented by using D flip-flops, two counters CNT 1-CNT 2, an adder M, a loop filter LP, a time-to-digital converter, a digitally controlled oscillator, a divider NC with a fixed division ratio, and an automatic frequency calibration module; the input signal is a signal obtained after frequency division by an adaptive adjustable frequency divider N0; the output end of the frequency divider N0 is connected to the input end of a system clock generation module C realized by using a D trigger and the input end of a time-to-digital converter; the output of the system clock generation module C is connected to the counter CNT1, while the counter CNT1 receives the pre-designed accumulation step FCW; the output of the counter CNT1 is connected to the adder M, the counting result of which is one of the inputs of the automatic frequency calibration module; the output of the adder M is connected to the loop filter LP; the output end of the loop filter LP and the output end of the automatic frequency calibration module are connected to the numerical control oscillator; the output end of the numerical control oscillator is connected to a frequency divider NC with a fixed frequency dividing ratio, and the frequency dividing ratio is preset; the output terminal of the frequency divider NC with a fixed division ratio is connected to a system clock generation block C implemented using a D flip-flop, a counter CNT2 and a time-to-digital converter; the output of the counter CNT2 is connected to the adder M, the counting result of which is one of the inputs of the automatic frequency calibration module; the output of the time-to-digital converter is connected to an adder M.
4. The apparatus of claim 1, wherein the frequency estimation algorithm module obtains the frequency of the current input signal through a frequency estimation algorithm according to the frequency control word of the dco and the frequency division ratio of the divider N0, and can identify the type of the simple radar signal such as chirp signal.
5. The apparatus according to claim 4, wherein the frequency estimation algorithm module is implemented on a computer using a programming tool such as C.
6. The apparatus according to claim 4, wherein the frequency estimation algorithm module is implemented on FPGA using a hardware description language such as Verilog HDL.
7. The apparatus according to claim 4, wherein the coarse frequency estimation module, the precise frequency measurement and tracking module based on the ADPLL and the frequency estimation algorithm module are all implemented on an integrated circuit chip.
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| CN113341382A (en) * | 2021-05-31 | 2021-09-03 | 东南大学 | Detection, identification and development integrated platform for intelligent cognitive radio |
| CN113567933A (en) * | 2021-07-27 | 2021-10-29 | 米传科技（上海）有限公司 | Millimeter wave radar signal frequency measuring equipment and method |
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