CN112821775A - Active clamp flyback circuit and related control circuit and control method - Google Patents

Active clamp flyback circuit and related control circuit and control method Download PDF

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Publication number
CN112821775A
CN112821775A CN202110155759.7A CN202110155759A CN112821775A CN 112821775 A CN112821775 A CN 112821775A CN 202110155759 A CN202110155759 A CN 202110155759A CN 112821775 A CN112821775 A CN 112821775A
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China
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signal
voltage signal
pulse width
voltage
switch
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CN202110155759.7A
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俞秀峰
张波
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Shenzhen Biyi Microelectronics Co Ltd
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Shenzhen Biyi Microelectronics Co Ltd
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Priority to CN202110155759.7A priority Critical patent/CN112821775A/en
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/22Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/3353Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having at least two simultaneously operating switches on the input side, e.g. "double forward" or "double (switched) flyback" converter
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/32Means for protecting converters other than automatic disconnection
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

The active clamp flyback circuit is used for adjusting the conduction time of a second switching tube in a first switching tube and a second switching tube which are coupled in series, and the pulse width of a second pulse width modulation signal can be adjusted according to a valley bottom voltage signal when a first voltage signal resonates to a valley bottom position, so that the conduction time of the second switching tube can be adjusted and controlled, the negative current of an exciting current can be adjusted, the resonant state of the voltage at two ends of the first switching tube after the second switching tube is switched off is adjusted, the first switching tube can be guaranteed to resonate to a target point in zero-voltage switching control, the zero-voltage switching efficiency of the first switching tube is guaranteed, and the system efficiency is improved.

Description

Active clamp flyback circuit and related control circuit and control method
Technical Field
The invention relates to the technical field of electronic circuits, in particular to an active clamping flyback circuit, a control circuit and a control method thereof.
Background
Referring to fig. 1, an active-clamp flyback circuit 100 of the prior art includes a transformer T1 for transferring electric energy from a primary circuit to a load of a secondary circuit, the primary circuit includes an input capacitor Cin, a high-order output terminal of the input capacitor Cin provides an input power IN, the high-order output terminal of the input capacitor Cin is coupled to a first end of a primary winding Lm through an inductor Lr, a second end of the primary winding is grounded through a first switching tube Q1, the secondary circuit is connected IN series with a rectifier diode D1 and an output capacitor Cout at two ends of a secondary winding of the transformer T1, and two ends of the output capacitor Cout output a voltage to the load. The primary circuit further includes a first capacitor C1 and a second switching tube Q2, the first terminal of the first capacitor C1 is connected to the high-order output terminal of the input capacitor Cin, and the second terminal is coupled to the second terminal of the primary winding Lm through the second switching tube Q2. The first parasitic capacitor Cds1 is the drain-source parasitic capacitance of the first switch tube Q1, and the second parasitic capacitor Cds2 is the drain-source parasitic capacitance of the second switch tube Q2.
With further reference to fig. 2, the first switch Q1 is turned on and off according to the first gate driving signal PWM1, and the second switch Q2 is turned on and off according to the second gate driving signal PWM 2. In a period from t0 to t5, the first switch tube Q1 is turned on during a time period from t0 to t1, and the second switch tube Q2 is turned on during a time period from t2 to t 3. After the first switching tube Q1 is turned off, corresponding to a time period from t1 to t2, the current IQ1 on the first switching tube Q1 charges the first parasitic capacitor Cds1, and discharges the second parasitic capacitor Cds2 at the same time, so that the Voltage VQ1 across the first switching tube Q1 is increased, the Voltage VQ2 across the second switching tube Q2 is decreased, and when the Voltage VQ2 across the second switching tube Q2 is decreased to Zero, that is, at a time t2, the second switching tube Q2 is turned on, so that ZVS (Zero Voltage Switch) of the second switching tube Q2 is realized, and the switching loss of the second switching tube Q2 is reduced. Through active clamping, the available voltage of the system is higher than the voltage Vin of the input power IN by an incremental voltage Vor, and the energy utilization rate is improved.
After the second switching tube Q2 is turned off, that is, after time t3, the negative excitation current ILm is used to charge the second parasitic capacitor Cds2, discharge the first parasitic capacitor Cds1, raise the voltage VQ2 across the second switching tube Q2, lower the voltage VQ1 across the first switching tube Q1, and when the voltage VQ1 across the first switching tube Q1 is lowered to zero, turn on the first switching tube Q1, implement ZVS of the first switching tube Q1, reduce the switching loss of the first switching tube Q1, and improve the system efficiency of the active flyback clamp circuit 100. The time for the voltage VQ1 across the first switch tube Q1 to decrease from the maximum voltage Vin of the input power IN to zero corresponds to a quarter of the oscillation period Tr/4.
In practical application, according to different working requirements (different input, output and load) of the system, the requirements of the excitation current ILm are different, and the conducting time Ton of the second switching tube Q2 is correspondingly required to be adjustable.
Disclosure of Invention
In view of the foregoing problems, an object of the present invention is to provide an active clamp flyback circuit, and a control circuit and a control method thereof, so as to achieve controllability of active clamp control of the active clamp flyback circuit and improve system efficiency.
According to an aspect of the present invention, there is provided a control circuit of an active clamp flyback circuit, including:
the first switch control module is used for providing a first pulse width modulation signal for controlling the first switch tube according to the first voltage signal and the second sampling signal;
the second switch control module is used for providing a second pulse width modulation signal for controlling a second switch tube according to the first voltage signal,
wherein the second switch control module comprises:
the valley bottom position detection unit is used for detecting the first voltage signal and providing a valley bottom voltage signal representing the level when the first voltage signal resonates to the valley bottom position; and
and the second switch conduction duration adjusting circuit is used for comparing the valley voltage signal with a second reference signal to provide a first reset signal, and the first reset signal is used for adjusting the pulse width of a second pulse width modulation signal so as to adjust the conduction duration of the second switch tube.
Optionally, the control circuit further includes a first flip-flop configured to provide the second pwm signal according to the first reset signal and the first set signal, and the second switch on-time adjusting circuit includes:
the regulating unit is used for providing a first reference signal according to the valley bottom voltage signal;
and the first comparator is used for comparing the first reference signal with a ramp signal and providing the first reset signal.
Optionally, the first set signal is obtained according to the first pwm signal, or obtained according to a voltage difference state between two terminals of the second switching tube.
Optionally, the regulatory unit comprises:
a second comparator for providing a first control signal according to the valley bottom voltage signal and a second reference signal;
the circuit comprises a first current source, a second switch, a third switch and a second current source which are sequentially connected to the ground in series, wherein the control end of the second switch receives a first control signal, and the control end of the third switch receives an inverted signal of the first control signal;
a second capacitor having a first terminal connected to a middle node of the second switch and the third switch, a second terminal connected to ground, the first reference signal provided by the first terminal of the second capacitor.
Optionally, the method further comprises:
and a third capacitor connected between the output end of the valley bottom position detecting unit and ground.
Optionally, the valley bottom position detecting unit includes:
and the slope detection unit is used for detecting the slope of the first voltage signal, providing an effective second control signal when the first voltage signal resonates to the valley bottom position, controlling the conduction of the first switch according to the effective second control signal, and outputting the first voltage signal at the moment as the valley bottom voltage signal.
Optionally, the first set signal is obtained by delaying through a first turn-off delay unit according to the first pwm signal.
Optionally, the ramp signal is obtained according to the second pwm signal, and a pulse timing of the ramp signal is synchronized with a pulse timing of the second pwm signal.
Optionally, the method further comprises:
and the second turn-off delay unit is used for delaying a second delay time and then controlling the first pulse width modulation signal to be turned to a high level when the second pulse width modulation signal is turned to a low level.
According to a second aspect of the present invention, there is provided an active clamp flyback circuit comprising:
the transformer is used for transmitting electric energy from a primary side circuit to a secondary side circuit, the secondary side circuit is connected with a load, a first end of a primary side winding of the transformer is coupled to a high-order output end of the input capacitor, and a second end of the primary side winding of the transformer is grounded through a first switching tube;
a first capacitor having a first terminal connected to the high-side output terminal of the input capacitor and a second terminal connected to the second terminal of the primary winding through a second switching tube, and,
according to the control circuit provided by the invention.
According to a third aspect of the present invention, there is provided a method of controlling an active clamp flyback circuit, the active clamp flyback circuit comprising:
the transformer is used for transmitting electric energy from a primary side circuit to a secondary side circuit, the secondary side circuit is connected with a load, a first end of a primary side winding of the transformer is coupled to a high-order output end of the input capacitor, and a second end of the primary side winding of the transformer is grounded through a first switching tube;
a first capacitor, a first end of the first capacitor is connected to the high-order output end of the input capacitor, a second end of the first capacitor is connected to the second end of the primary winding through a second switching tube,
wherein the control method comprises the following steps:
controlling the on and off of the first switching tube according to a first pulse width modulation signal;
controlling the second switching tube to be switched on and off according to a second pulse width modulation signal; and the number of the first and second groups,
detecting a first voltage signal representing the voltage at two ends of the first switching tube to obtain a valley bottom voltage signal of the first voltage signal when the first voltage signal resonates to a valley bottom position;
and adjusting the pulse width of the second pulse width modulation signal according to the valley bottom voltage signal.
Optionally, the detecting a first voltage signal representing a voltage across the first switching tube to obtain a valley voltage signal of the first voltage signal when the first voltage signal resonates to a valley position includes:
and detecting the slope of the first voltage signal to judge that the first voltage signal resonates to a valley bottom position, and obtaining the valley bottom voltage signal according to a level value when the first voltage signal resonates to the valley bottom position.
Optionally, the second pulse width modulation signal is obtained by a first flip-flop according to a first reset signal and a first set signal,
the first reset signal is obtained by comparing a first reference signal with a ramp signal,
the adjusting the pulse width of the second pulse width modulated signal according to the valley bottom voltage signal comprises:
and comparing the valley bottom voltage signal with a second reference signal, increasing the level of the first reference signal when the valley bottom voltage signal is greater than the second reference signal, and decreasing the level of the first reference signal when the valley bottom voltage signal is less than the second reference signal.
Optionally, the first reference signal is provided by a second capacitor,
said increasing said first reference signal level comprises charging said second capacitor,
the reducing the level of the first reference signal includes discharging the second capacitor.
Optionally, the ramp signal is obtained according to the second pwm signal, and a pulse timing of the ramp signal is synchronized with a pulse timing of the second pwm signal.
Optionally, the first pulse width modulation signal is obtained according to the first voltage signal and a second sampling signal,
the rising edge time of the second pulse width modulation signal is determined by delaying the falling edge time of the first pulse width modulation signal by a first delay time.
Optionally, the rising edge time of the first pulse width modulation signal is determined by the first voltage signal, the falling edge time is determined by the second sampling signal,
the rising edge of the first pulse width modulation signal is determined by delaying the moment of the falling edge of the second pulse width modulation signal by a second delay time.
According to a fourth aspect of the present invention, there is provided a control circuit for a half-bridge circuit, the half-bridge circuit including a first switching tube and a second switching tube coupled in series, the control circuit comprising:
the first switch control module provides a first pulse width modulation signal for controlling the first switch tube at least based on a first voltage signal representing the voltage difference between two ends of the first switch tube;
a second switch control module providing a second PWM signal controlling a second switching transistor based on at least the first voltage signal, wherein the second switch control module comprises:
the valley bottom position detection unit is used for acquiring the first voltage signal and acquiring the level of the first voltage signal at the moment as a valley bottom voltage signal when detecting that the falling slope of the first voltage signal is smaller than a preset threshold value; and
and the second switch conduction duration adjusting circuit is used for comparing the valley bottom voltage signal with a second reference signal, adjusting the conduction duration of the second switch tube according to a comparison result, and reducing the conduction duration of the second switch tube when the valley bottom voltage signal is greater than the second reference signal.
According to a fifth aspect of the present invention, there is provided a control method for a half-bridge circuit, the half-bridge circuit including a first switching tube and a second switching tube coupled in series, the control method comprising:
when the voltage difference between the two ends of the first switch tube is reduced to a zero value position, the first switch tube is conducted;
when the first switching tube meets a preset condition, the first switching tube is turned off, so that the voltage at two ends of the second switching tube is reduced;
when the voltage at the two ends of the second switching tube is reduced to a zero value position, the second switching tube is conducted, and the second switching tube is turned off after the conducting time;
acquiring a level as a valley voltage signal when the voltage difference at the two ends of the first switching tube resonates to a valley position; and
and adjusting the conduction duration of the second switching tube based on the comparison result of the valley bottom voltage signal and a second reference signal.
The control circuit of the active clamping flyback circuit comprises a first switch control module and a second switch control module, wherein the first switch control module provides a first pulse width modulation signal, the second switch control module provides a second pulse width modulation signal, the first switch and the second switch are controlled to be switched on and switched off respectively, the second switch control module can adjust the pulse width of the second pulse width modulation signal according to a valley bottom voltage signal of a first voltage signal, the on-time of a second switch tube is further adjusted and controlled, the magnitude of negative current of exciting current is further adjusted, the resonance state of voltages at two ends of the first switch tube after the second switch tube is switched off is adjusted, the first switch tube can be guaranteed to resonate to a target point during zero-voltage switching, the zero-voltage switching efficiency of the first switch tube is guaranteed, and the system efficiency is improved.
The active clamping flyback circuit provided by the invention comprises the control circuit provided by the invention, so that the voltages at two ends of the first switching tube can be ensured to resonate to a target point when the first switching tube is switched at zero voltage, the zero voltage switching efficiency of the first switching tube is ensured, and the system efficiency is improved.
The control method of the active clamping flyback circuit comprises the steps of adjusting the pulse width of a second pulse width modulation signal according to a valley bottom voltage signal when a first voltage signal resonates to a valley bottom position, adjusting the conduction time of a second switching tube, adjusting the negative current of an exciting current, and adjusting the resonant state of the voltage at two ends of the first switching tube after the second switching tube is switched off, so that the first switching tube can resonate to a target point when being switched at zero voltage, the zero voltage switching efficiency of the first switching tube is guaranteed, and the system efficiency is improved.
The control circuit for the half-bridge circuit provided by the invention adjusts the conduction time of the second switching tube according to the valley voltage signal of the voltage difference between the two ends of the first switching tube and the valley voltage signal of the valley position in the second switching tube which are coupled in series in the half-bridge circuit, so as to adjust the resonance state of the voltage difference between the two ends of the first switching tube after the second switching tube is switched off, ensure the zero-voltage switching control of the first switching tube, reduce the switching loss and improve the system efficiency of the half-bridge circuit.
The control method for the half-bridge circuit provided by the invention adjusts the conduction time of the second switch tube according to the valley voltage signal of the voltage difference between the two ends of the first switch tube and the voltage difference between the two ends of the second switch tube which are coupled in series in the half-bridge circuit and resonate to the valley position, so as to adjust the resonance state of the voltage difference between the two ends of the first switch tube after the second switch tube is switched off, ensure the zero-voltage switch control of the first switch tube, reduce the switch loss and improve the system efficiency of the half-bridge circuit.
Drawings
The above and other objects, features and advantages of the present invention will become more apparent from the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:
fig. 1 shows a schematic diagram of a partial structure of an active clamp flyback circuit according to the prior art;
fig. 2 shows a timing diagram of part of the signals of an active clamp flyback circuit according to the prior art;
fig. 3 shows a schematic diagram of an active clamp flyback circuit according to an embodiment of the invention;
fig. 4A, 4B and 4C show timing diagrams for different cases of partial signals of an active clamp flyback circuit according to an embodiment of the invention;
fig. 5 shows a schematic structural diagram of a control circuit of the active clamp flyback circuit according to an embodiment of the invention.
Detailed Description
Various embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. Like elements in the various figures are denoted by the same or similar reference numerals. For purposes of clarity, the various features in the drawings are not necessarily drawn to scale.
The following detailed description of embodiments of the present invention is provided in connection with the accompanying drawings and examples.
Fig. 3 shows a schematic structural diagram of an active clamp flyback circuit according to an embodiment of the present invention, and the active clamp flyback circuit 200 of the embodiment of the present invention is different from the active clamp flyback circuit 100 of the related art in its control circuit 220, and the same parts are not described in detail.
As shown in fig. 3, the control circuit includes a control circuit 220 and a driving unit 210, wherein an input terminal of the control circuit 220 is connected to a second terminal of the primary winding Lm to obtain a first voltage signal Vsw, and also receives an input of a second sampling signal CS to provide a first pulse width modulation signal PWM1 and a second pulse width modulation signal PWM2 according to the first voltage signal Vsw and the second sampling signal CS, respectively for on and off control of the first switching tube Q1 and the second switching tube Q2, and the driving unit 210 receives a first pulse width modulation signal PWM1 and a second pulse width modulation signal PWM2 to provide a first gate driving signal and a second gate driving signal according to a first pulse width modulation signal PWM1 and a second pulse width modulation signal PWM2, respectively for driving control of the first switching tube Q1 and the second switching tube Q2.
In this embodiment, the second end of the primary winding Lm is grounded through the first switching tube Q1, and the first voltage signal Vsw obtained according to the voltage of the second end of the primary winding Lm is the voltage VQ1 across the first switching tube Q1.
Fig. 4A, 4B, and 4C show timing diagrams of different cases of partial signals of an active clamp flyback circuit according to an embodiment of the invention. The high levels of the first PWM signal PWM1 and the second PWM signal PWM2 correspond to the turn-on of the first switch Q1 and the second switch Q2, respectively, and the pulse width of the second PWM signal PWM2 corresponds to the turn-on time Ton of the second switch Q2. Wherein, each time matches with the time sequence of fig. 2, and is not described herein again.
Referring to fig. 4A, 4B and 4C, the slope of the voltage VQ1 across the first switching tube Q1 (the slope is zero and the position near the zero can be determined as the valley position) is detected to determine that VQ1 resonates to the valley position, and obtain the valley voltage signal Vzcd corresponding to the voltage across the main switching tube Q1 at the switching time t5 of the conduction of the main switching tube Q1, and the magnitude of the valley voltage signal Vzcd is compared with the second reference signal Vth to control the increase or decrease of the conduction time Ton of the second switching tube Q2.
Fig. 4A corresponds to a case where the valley bottom voltage signal Vzcd is greater than the second reference signal Vth, a level corresponding to the valley bottom voltage signal Vzcd in a lower period needs to be lowered, a negative current of the excitation current ILm needs to be increased correspondingly, and the on-time Ton of the second switching tube Q2 needs to be increased correspondingly.
Fig. 4B corresponds to a case where the valley bottom voltage signal Vzcd is smaller than the second reference signal Vth, the level of the valley bottom voltage signal Vzcd in the next period needs to be increased, the magnitude of the negative current of the excitation current ILm needs to be decreased, and the on-time Ton of the second switching tube Q2 needs to be decreased.
Fig. 4C corresponds to the case where the valley voltage signal Vzcd is equal to the second reference signal Vth, and the on-time Ton of the second switching tube Q2 does not need to be adjusted.
After the first switch tube Q1 is turned off and a first delay time elapses, the second switch tube Q2 is turned on, the first delay time corresponds to a time period from t1 to t2 and is generally set to a fixed value, and the active clamping flyback circuit according to the embodiment of the present invention can regulate and control the on time Ton of the second switch tube Q2 only by controlling the time t 3.
Fig. 5 shows a schematic structural diagram of a control circuit of the active clamp flyback circuit according to an embodiment of the invention.
As shown in fig. 5, the control circuit 220 of the active-clamp flyback circuit 200 according to the embodiment of the present invention includes a first voltage signal input terminal and a second sampling signal input terminal, which respectively receive the first voltage signal Vsw and the second sampling signal CS, and provide the first pulse-width modulation signal PWM1 and the second pulse-width modulation signal PWM2 according to the first voltage signal Vsw and the second sampling signal CS.
The first PWM signal PWM1 is obtained by the first switch control module 221 according to the first voltage signal Vsw and the second reference signal CS, specifically, the first switch control module 221 mainly includes a fourth comparator a4, a third comparator A3, and a second flip-flop U2, where the third comparator A3 compares the first voltage signal Vsw with a third reference signal Vth1 to provide a third comparator signal, and the third comparator signal is used to provide a second set signal Lon to the set end of the second flip-flop U2, so as to control the pulse start time of the first PWM signal PWM1 according to the voltage on the primary winding Lm and control the conduction time of the first switching tube Q1; the fourth comparator a4 compares the second sampling signal CS with the third reference signal Vcop, and provides the second reset signal Loff to the reset terminal of the second flip-flop U2, so as to control the pulse falling time of the first pulse width modulation signal PWM1 according to the second sampling signal CS, and control the turn-off time of the first switch tube Q1, thereby realizing the transfer of electric energy from the primary side circuit to the secondary side circuit.
The second PWM2 is obtained by the second switch control module 222 according to the first voltage signal Vsw and the first reset signal Hon, and specifically, the second switch control module 222 mainly includes a valley position detecting unit 24, a regulating unit 23, a first comparator a1, and a first flip-flop U1. The regulation unit 23, the first comparator a1 and the first flip-flop U1 constitute a second switch on-time adjusting circuit to adjust the on-time of the second switch Q2 according to the valley bottom voltage of the voltage VQ1 across the first switch Q1 provided by the valley bottom position detecting unit 24.
The inverting input terminal of the first comparator a1 receives the first reference signal Von, the non-inverting input terminal obtains the ramp signal from the ramp signal generating unit 21, compares the first reference signal Von and the ramp signal to provide a first reset signal Hoff value, the reset terminal of the first flip-flop U1, and the first flip-flop U1 provides the second pulse width modulation signal PWM2 according to the first set signal Hon and the first reset signal Hoff.
The ramp signal generating unit 21 provides the ramp signal according to the second PWM signal PWM2, the pulse timing of the ramp pulse of the ramp signal is synchronized with the pulse timing of the second PWM signal PWM2, that is, the ramp signal is provided at the pulse rising edge of the second PWM signal PWM2, the timing start time of the first reset signal Hoff provided by the first comparator a1 is synchronized with the pulse start time of the second PWM signal PWM2, when the ramp signal level rises to the first reference signal Von level, the first reset signal Hoff is set to 1, the second PWM2 is set to 0, the first reference signal Von level is adjusted, and the time that the first reset signal Hoff is set to 1 is adjusted, so that the pulse width of the second PWM signal PWM2 can be adjusted.
The regulation unit 23 provides the first reference signal Von, and may adjust a level of the first reference signal Von to adjust a pulse width of the first pulse width modulation signal PWM 2.
In the present embodiment, the regulation unit 23 includes a second comparator a2, an inverter a6, a first current source I1, a second switch S2, a third switch S3, a second current source I2, and a second capacitor C2. The first current source I1, the second switch S2, the third switch S3 and the second current source I2 are sequentially connected in series to ground, an intermediate node of the second switch S2 and the third switch S3 is connected to a first end of a second capacitor C2, a second end of the second capacitor C2 is connected to ground, a non-inverting input terminal of a second comparator a2 receives a valley voltage signal Vzcd, an inverting input terminal receives a second reference signal Vth, the comparison valley voltage signal Vzcd and the second reference signal Vth provide a second comparison signal, an output terminal of a second comparator a2 is connected to a control terminal of the second switch S2, an inverter A6 is connected between an output terminal of the second comparator a2 and a control terminal of the third switch S3 to turn on the second switch S2 or the third switch S3 according to the second comparison signal, the second capacitor C2 is charged or discharged to increase or decrease the level of the first reference signal Von.
The valley bottom position detecting unit 24 detects the first voltage signal Vsw, provides a level value output of the first voltage signal at the time when the first voltage signal Vsw resonates to the valley bottom position, that is, provides the valley bottom voltage signal Vzcd for output, and the adjusting unit 23 adjusts the level of the first reference signal Von according to the valley bottom voltage signal Vzcd.
In this embodiment, the valley position detecting unit 24 includes a slope detecting unit 241, a first switch S1 and a third capacitor C3, wherein an input terminal of the slope detecting unit 241 receives a first voltage signal Vsw, an output terminal provides a valley voltage Vsw for output, the slope detecting unit detects the first voltage signal Vsw, determines whether the first voltage signal Vsw resonates to the valley position according to the slope of the first voltage signal Vsw, provides a valid second control signal to a control terminal of the first switch S1 when the first voltage signal Vsw resonates to the valley position, turns on the first switch S1, turns on a channel from the input terminal to the output terminal of the valley position detecting unit 24, and outputs a level value of the first voltage signal Vsw at this time as the valley voltage signal Vzcd. The third capacitor C3 is connected between the output terminal of the bottom position detection unit 24 and ground, and serves as a voltage output capacitor for ensuring the stability of the bottom voltage Vzcd to be output.
The control circuit 220 further includes a first turn-off delay unit 11, a second turn-off delay unit 12, and an or logic unit a 5. The input end of the first turn-off delay unit 11 is connected to the output end of the first switch control module 221, receives the first pulse width modulation signal PWM1, delays the falling edge time of the first pulse width modulation signal PWM1 for a first delay time, and provides a first set signal Hon of a high level, and controls the pulse start of the second pulse width modulation signal PWM2 output by the first flip-flop U1, that is, the second switch tube Q2 is turned on after the first delay time corresponding to the turn-off of the first switch tube Q1, so that closed-loop control is implemented, and the reliability of the system is improved.
In an alternative embodiment, the first set signal Hon is determined according to the state of the voltage difference across the second switch Q2, referring to fig. 2, that is, the t2 is determined according to the time when the VQ2 is lowered to the zero point, and then the valid time of the first set signal Hon is confirmed, so as to set the second pulse width modulation signal PWM2 to 1 through the first flip-flop U1 at the time t 2.
The input of the second turn-off delay unit 12 is connected to the output of the second switch control module 222, receives the second PWM signal PWM2 input, the falling edge of the second PWM signal PWM2 is delayed by a second delay time to provide a high signal to one input terminal of the or logic unit a5, the other input terminal of the or logic unit a5 is connected to the output terminal of the third comparator A3, the second set signal Lon is provided at the third comparison signal and the output signal of the second turn-off delay unit 12, after the third comparison signal is at high level or the falling edge of the second PWM signal PWM2 is delayed for a second delay time, the first PWM signal PWM1 is controlled to be inverted to high level, the first switch Q1 is turned on, that is, the first switch Q1 is turned on when the first voltage signal Vsw decreases to the third reference signal Vth1 or after the second delay time elapses after the second switch Q2 is turned off.
The slope detection unit 241 can perform detection after the second switch Q2 is turned off, and avoid the interference of the slope when the first voltage signal Vsw is asserted for the time period from t2 to t3 after the time period t3 in fig. 4A, wherein the execution and the suspension of the detection of the slope detection unit 241 can be controlled according to the second PWM2 signal.
In an optional embodiment, a single pulse module is further disposed between the control terminals of the second switch S2 and the third switch S3, so that the on-time of the second switch S2 and the third switch S3 in one detection is equal to the pulse width of the single pulse module, and the electric quantity corresponding to the charging and discharging of the second capacitor C2 in one regulation is related to the pulse width of the single pulse, that is, the level variation of the first reference signal Von in one regulation is fixed, thereby avoiding the charging or discharging time of the one regulation from being too long, excessive regulation, and avoiding unnecessary loss of regulation efficiency. The pulse width of the single pulse module can be adjusted according to the difference between the valley bottom voltage signal Vzcd and the second reference signal Vth, the larger the difference between the valley bottom voltage signal Vzcd and the second reference signal Vth, the wider the pulse width of the single pulse module, the longer the charging or discharging time of the second capacitor C2 is, the larger the adjustment amount of the first reference signal Von is, the larger the difference between the valley bottom voltage signal Vzcd of the next period and the second reference signal Vth is, the closer the valley bottom voltage signal Vzcd of the next period and the second reference signal Vth can be in single adjustment, the adjustment and control effect is improved, the zero voltage switching effect is improved, and the system efficiency is improved.
The control method of the active clamp flyback single circuit comprises the following steps: sampling the voltage of the second end of the primary winding to obtain a first voltage signal Vsw representing the voltage at two ends of the first switching tube; the magnitude of the valley voltage signal Vzcd of the first voltage signal Vsw when the first voltage signal Vsw resonates to the valley position is compared with the magnitude of the second reference signal Vth, and the pulse width of the second pwm signal is adjusted according to the comparison result.
Wherein, the voltage (the second reference signal Von) of the first end of the second capacitor C2 is used for comparing with the ramp signal to provide the first reset signal Hoff, and the state transition time of the first reset signal Hoff corresponds to the state transition time (from high level to low level) of the second pulse width modulation signal PWM 2.
When the valley bottom voltage signal Vzcd is greater than the second reference signal Vth, the first end of the second capacitor is charged; when the valley bottom voltage signal Vzcd is less than the second reference signal Vth, the first terminal of the second capacitor is discharged.
The control circuit and the control method of the active clamping flyback circuit are mainly used for controlling the second switching tube in the first switching tube and the second switching tube which are coupled in series, and the control circuit and the control method can also be used for other types of half-bridge circuits with the first switching tube and the second switching tube which are coupled in series, so that the switching loss of the half-bridge circuit can be reduced, and the system efficiency is improved.
According to the active clamping flyback circuit, the control circuit and the control method thereof, the pulse width of the second pulse width modulation signal is adjusted according to the valley bottom voltage signal when the first voltage signal resonates to the valley bottom position, the conduction time of the second switching tube in the next period is adjusted, the maximum value of the negative current of the exciting current is adjusted, and the resonant state of the first switching tube after the second switching tube is switched off is adjusted, so that the variable actual requirements are met, the switching loss of the first switching tube is reduced, and the system efficiency is improved.
While embodiments in accordance with the invention have been described above, these embodiments are not intended to be exhaustive or to limit the invention to the precise embodiments described. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the invention and the practical application, to thereby enable others skilled in the art to best utilize the invention and various embodiments with various modifications as are suited to the particular use contemplated. The invention is limited only by the claims and their full scope and equivalents.

Claims (19)

1. A control circuit for an active clamp flyback circuit, comprising:
the first switch control module is used for providing a first pulse width modulation signal for controlling the first switch tube according to the first voltage signal and the second sampling signal;
the second switch control module is used for providing a second pulse width modulation signal for controlling a second switch tube according to the first voltage signal,
wherein the second switch control module comprises:
the valley bottom position detection unit is used for detecting the first voltage signal and providing a valley bottom voltage signal representing the level when the first voltage signal resonates to the valley bottom position; and
and the second switch conduction duration adjusting circuit is used for comparing the valley voltage signal with a second reference signal to provide a first reset signal, and the first reset signal is used for adjusting the pulse width of a second pulse width modulation signal so as to adjust the conduction duration of the second switch tube.
2. The control circuit of claim 1, wherein the control circuit further comprises a first flip-flop for providing the second pulse width modulated signal according to the first reset signal and a first set signal, the second switch on-time adjustment circuit comprising:
the regulating unit is used for providing a first reference signal according to the valley bottom voltage signal;
and the first comparator is used for comparing the first reference signal with a ramp signal and providing the first reset signal.
3. The control circuit of claim 2,
the first setting signal is obtained according to the first pulse width modulation signal or the voltage difference state between the two ends of the second switch tube.
4. The control circuit of claim 2, wherein the regulation unit comprises:
a second comparator for providing a first control signal according to the valley bottom voltage signal and a second reference signal;
the circuit comprises a first current source, a second switch, a third switch and a second current source which are sequentially connected to the ground in series, wherein the control end of the second switch receives a first control signal, and the control end of the third switch receives an inverted signal of the first control signal;
a second capacitor having a first terminal connected to a middle node of the second switch and the third switch, a second terminal connected to ground, the first reference signal provided by the first terminal of the second capacitor.
5. The control circuit of claim 1, further comprising:
and a third capacitor connected between the output end of the valley bottom position detecting unit and ground.
6. The control circuit according to claim 1, wherein the valley bottom position detecting unit includes:
and the slope detection unit is used for detecting the slope of the first voltage signal, providing an effective second control signal when the first voltage signal resonates to the valley bottom position, controlling the conduction of the first switch according to the effective second control signal, and outputting the first voltage signal at the moment as the valley bottom voltage signal.
7. The control circuit of claim 2,
and the first set signal is obtained by delaying through a first turn-off delay unit according to the first pulse width modulation signal.
8. The control circuit of claim 2,
the ramp signal is obtained according to the second pulse width modulation signal, and the pulse timing of the ramp signal is synchronous with the pulse timing of the second pulse width modulation signal.
9. The control circuit of claim 1, further comprising:
and the second turn-off delay unit is used for delaying a second delay time and then controlling the first pulse width modulation signal to be turned to a high level when the second pulse width modulation signal is turned to a low level.
10. An active clamp flyback circuit comprising:
the transformer is used for transmitting electric energy from a primary side circuit to a secondary side circuit, the secondary side circuit is connected with a load, a first end of a primary side winding of the transformer is coupled to a high-order output end of the input capacitor, and a second end of the primary side winding of the transformer is grounded through a first switching tube;
a first capacitor having a first terminal connected to the high-side output terminal of the input capacitor and a second terminal connected to the second terminal of the primary winding through a second switching tube, and,
a control circuit according to any one of claims 1 to 9.
11. A method of controlling an active-clamped flyback circuit, the active-clamped flyback circuit comprising:
the transformer is used for transmitting electric energy from a primary side circuit to a secondary side circuit, the secondary side circuit is connected with a load, a first end of a primary side winding of the transformer is coupled to a high-order output end of the input capacitor, and a second end of the primary side winding of the transformer is grounded through a first switching tube;
a first capacitor, a first end of the first capacitor is connected to the high-order output end of the input capacitor, a second end of the first capacitor is connected to the second end of the primary winding through a second switching tube,
wherein the control method comprises the following steps:
controlling the on and off of the first switching tube according to a first pulse width modulation signal;
controlling the second switching tube to be switched on and off according to a second pulse width modulation signal; and the number of the first and second groups,
detecting a first voltage signal representing the voltage at two ends of the first switching tube to obtain a valley bottom voltage signal of the first voltage signal when the first voltage signal resonates to a valley bottom position;
and adjusting the pulse width of the second pulse width modulation signal according to the valley bottom voltage signal.
12. The control method of claim 11, wherein the detecting a first voltage signal indicative of a voltage across the first switching tube to obtain a valley voltage signal of the first voltage signal when the first voltage signal resonates to a valley position comprises:
and detecting the slope of the first voltage signal to judge that the first voltage signal resonates to a valley bottom position, and obtaining the valley bottom voltage signal according to a level value when the first voltage signal resonates to the valley bottom position.
13. The control method according to claim 11, wherein,
the second pulse width modulation signal is obtained by the first flip-flop according to the first reset signal and the first set signal,
the first reset signal is obtained by comparing a first reference signal with a ramp signal,
the adjusting the pulse width of the second pulse width modulated signal according to the valley bottom voltage signal comprises:
and comparing the valley bottom voltage signal with a second reference signal, increasing the level of the first reference signal when the valley bottom voltage signal is greater than the second reference signal, and decreasing the level of the first reference signal when the valley bottom voltage signal is less than the second reference signal.
14. The control method according to claim 13, wherein,
the first reference signal is provided through a second capacitor,
said increasing said first reference signal level comprises charging said second capacitor,
the reducing the level of the first reference signal includes discharging the second capacitor.
15. The control method according to claim 13, wherein,
the ramp signal is obtained according to the second pulse width modulation signal, and the pulse timing of the ramp signal is synchronous with the pulse timing of the second pulse width modulation signal.
16. The control method according to claim 11, wherein,
the first pulse width modulation signal is obtained according to the first voltage signal and the second sampling signal,
the rising edge time of the second pulse width modulation signal is determined by delaying the falling edge time of the first pulse width modulation signal by a first delay time.
17. The control method according to claim 11, wherein,
the rising edge time of the first pulse width modulation signal is determined by the first voltage signal, the falling edge time is determined by the second sampling signal,
the rising edge of the first pulse width modulation signal is determined by delaying the moment of the falling edge of the second pulse width modulation signal by a second delay time.
18. A control circuit for a half-bridge circuit, the half-bridge circuit including a first switching tube and a second switching tube coupled in series, the control circuit comprising:
the first switch control module provides a first pulse width modulation signal for controlling the first switch tube at least based on a first voltage signal representing the voltage difference between two ends of the first switch tube;
a second switch control module providing a second PWM signal controlling a second switching transistor based on at least the first voltage signal, wherein the second switch control module comprises:
the valley bottom position detection unit is used for acquiring the first voltage signal and acquiring the level of the first voltage signal at the moment as a valley bottom voltage signal when detecting that the falling slope of the first voltage signal is smaller than a preset threshold value; and
and the second switch conduction duration adjusting circuit is used for comparing the valley bottom voltage signal with a second reference signal, adjusting the conduction duration of the second switch tube according to a comparison result, and reducing the conduction duration of the second switch tube when the valley bottom voltage signal is greater than the second reference signal.
19. A control method for a half-bridge circuit, the half-bridge circuit including a first switching tube and a second switching tube coupled in series, the control method comprising:
when the voltage difference between the two ends of the first switch tube is reduced to a zero value position, the first switch tube is conducted;
when the first switching tube meets a preset condition, the first switching tube is turned off, so that the voltage at two ends of the second switching tube is reduced;
when the voltage at the two ends of the second switching tube is reduced to a zero value position, the second switching tube is conducted, and the second switching tube is turned off after the conducting time;
acquiring a level as a valley voltage signal when the voltage difference at the two ends of the first switching tube resonates to a valley position; and
and adjusting the conduction duration of the second switching tube based on the comparison result of the valley bottom voltage signal and a second reference signal.
CN202110155759.7A 2021-02-04 2021-02-04 Active clamp flyback circuit and related control circuit and control method Pending CN112821775A (en)

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CN103795260A (en) * 2014-01-21 2014-05-14 广州金升阳科技有限公司 Non-complementary flyback active clamp converter
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