CN112820613B - Ion implantation apparatus and ion implantation method - Google Patents

Ion implantation apparatus and ion implantation method Download PDF

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CN112820613B
CN112820613B CN202110002080.4A CN202110002080A CN112820613B CN 112820613 B CN112820613 B CN 112820613B CN 202110002080 A CN202110002080 A CN 202110002080A CN 112820613 B CN112820613 B CN 112820613B
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ion implantation
semiconductor structure
angle
plasma beam
implantation apparatus
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CN112820613A (en
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於成星
刘小辉
张和
周静兰
刘修忠
沈保家
李军辉
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Yangtze Memory Technologies Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/02—Details
    • H01J37/04—Arrangements of electrodes and associated parts for generating or controlling the discharge, e.g. electron-optical arrangement, ion-optical arrangement
    • H01J37/147—Arrangements for directing or deflecting the discharge along a desired path
    • H01J37/1478—Beam tilting means, i.e. for stereoscopy or for beam channelling
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/30—Electron-beam or ion-beam tubes for localised treatment of objects
    • H01J37/317—Electron-beam or ion-beam tubes for localised treatment of objects for changing properties of the objects or for applying thin layers thereon, e.g. for ion implantation
    • H01J37/3171—Electron-beam or ion-beam tubes for localised treatment of objects for changing properties of the objects or for applying thin layers thereon, e.g. for ion implantation for ion implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26586—Bombardment with radiation with high-energy radiation producing ion implantation characterised by the angle between the ion beam and the crystal planes or the main crystal surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H10B41/35—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H10B43/35—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
    • H01J2237/15—Means for deflecting or directing discharge
    • H01J2237/1501—Beam alignment means or procedures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
    • H01J2237/30—Electron or ion beam tubes for processing objects
    • H01J2237/317—Processing objects on a microscale
    • H01J2237/31701—Ion implantation

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Abstract

The application discloses an ion implantation device and an ion implantation method. An ion implantation apparatus, comprising: the bearing table is used for bearing the semiconductor structure; an ion source unit for generating a plasma beam and moving the plasma beam toward the semiconductor structure; and the angle adjusting unit is positioned between the ion source unit and the bearing table and is used for matching the injection angle of the plasma beam with the inclination angle of the groove in the semiconductor structure. The implantation angle of the plasma beam ejected by the angle adjusting unit is matched with the inclination angle of the groove, so that the plasma beam is prevented from damaging the side wall of the ion implantation channel (groove), and the electrical performance of the 3D storage device is improved.

Description

Ion implantation apparatus and ion implantation method
Technical Field
The present invention relates to the field of semiconductor manufacturing technology, and more particularly, to an ion implantation apparatus and an ion implantation method.
Background
In the fabrication process of the 3D memory device, a plasma implantation technique is generally used. For example, in the selective epitaxial growth of the substrate surface, the epitaxial layer is doped using a plasma implantation technique.
With the increase of the storage density of the 3D memory device, the number of stacked layers of the stacked structure is increased, and the aspect ratio of the trench penetrating through the stacked structure is increased, which may cause the trench to be inclined. The epitaxial layer at the bottom of the trench is doped by using the existing ion implantation equipment, the emitted plasma beam is implanted into the inclined trench, and part of the plasma beam is blocked by the inclined trench side wall and cannot be implanted into the epitaxial layer at the bottom of the trench. Further, since the plasma cannot be completely implanted into the epitaxial layer, the doping cannot achieve an expected effect, and thus the electrical characteristics of the epitaxial layer are affected, which in turn causes a decrease in the threshold voltage uniformity of the semiconductor device.
Accordingly, further improvements in ion implantation equipment are desired to improve the electrical characteristics of memory devices.
Disclosure of Invention
In view of the above problems, it is an object of the present invention to provide an improved ion implantation apparatus and an ion implantation method, in which an electrical characteristic and device stability of a 3D memory device are improved by providing an angle adjustment unit in the ion implantation apparatus, and guiding a plasma beam to implant into a bottom of a trench of a semiconductor structure at an angle matching with an inclination angle of the trench.
According to a first aspect of the present invention, there is provided an ion implantation apparatus comprising: the bearing table is used for bearing the semiconductor structure; an ion source unit for generating a plasma beam and moving the plasma beam toward the semiconductor structure; and the angle adjusting unit is positioned between the ion source unit and the bearing table and is used for matching the injection angle of the plasma beam with the inclination angle of the groove in the semiconductor structure.
Optionally, the angle adjusting unit includes a guide electrode to which an electric field is applied to adjust an implantation angle of the plasma beam.
Optionally, the guiding electrode comprises a plurality of through holes, and a pore canal of at least one of the through holes is inclined so as to enable the plasma beam to implant the semiconductor structure through the through hole, wherein the inclination angle of the through hole is matched with the implantation angle.
Optionally, the through hole corresponds to the groove.
Optionally, the plasma beams are implanted into the semiconductor structure through the through holes in the same circular array at the same angle.
Optionally, the plasma beam implants the semiconductor structure at different angles through vias located in different circular arrays.
Optionally, the plurality of through holes are arranged in a concentric circle array, and the cross section of each through hole is circular, circular or arc.
Optionally, the apparatus further includes a voltage source for providing a first voltage to the guide electrode and a second voltage to the carrier, respectively, and an electric field pointing from the guide electrode to the carrier is formed between the guide electrode and the carrier.
Optionally, the first voltage applied to the guide electrode is greater than the second voltage applied to the carrier.
Optionally, the support stage is a plate electrode or an electronic clamp.
According to a second aspect of the present invention, there is provided an ion implantation method, comprising: providing a semiconductor structure, wherein the semiconductor structure is provided with a groove; and injecting the plasma beam into the bottom of the groove at a preset angle by adopting the ion injection equipment, wherein the preset angle is consistent with the inclination angle of the groove. .
According to the ion implantation equipment and the ion implantation method, the angle adjusting unit is arranged, and the plasma beam generated by the ion source unit is guided to be implanted into the bottom of the groove of the semiconductor structure at the preset angle, wherein the preset angle is matched with the inclination angle of the groove. Further, the ion implantation equipment emits plasma beams with different angles, and the plasma beams are implanted into the epitaxial layer through the groove in the 3D memory device to dope the epitaxial layer. The injection angle of the plasma beam injected by the angle adjusting unit is matched with the inclination angle of the ion injection channel, so that the damage of the plasma beam to the side wall of the ion injection channel is avoided, and the electrical performance of the 3D memory device is improved.
Further, the angle adjusting unit comprises a guide electrode, and the angle of the plasma beam injected into the semiconductor structure provided in the ion source unit is adjusted by the electric field force of the guide electrode and is further emitted through the through hole on the guide electrode. Wherein the hole passage of at least one of the through holes is inclined so that the plasma beam passing through the through hole is injected into the bottom of the trench of the semiconductor structure at the trench inclination angle. And further, the incident angle of the plasma beam injected to the surface of the semiconductor structure is matched with the inclination degree of the groove in the semiconductor structure, and the plasma doping effect of the semiconductor structure device is improved.
Furthermore, the through hole in the guide electrode corresponds to the position of the groove in the semiconductor structure, and then the plasma beam is guided to be injected into the bottom of the groove through the through hole so as to dope the epitaxial layer in the substrate. The plasma beam is prevented from being blocked by the side wall of the groove, and the groove is prevented from being damaged. Furthermore, the plasma beams are implanted into the semiconductor structure at the same angle through the through holes in the same circular array, so that the plasma beams emitted by the ion implantation equipment can be regularly implanted into the semiconductor structure, and the doping effect can be effectively controlled. Furthermore, the plasma beams are implanted into the semiconductor structure at different angles through the through holes in different circular arrays, so that the plasma beams emitted by the ion implantation equipment can be suitable for the semiconductor structure with various groove gradients, and the doping effect is improved.
Drawings
The above and other objects, features and advantages of the present invention will become more apparent from the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:
fig. 1 shows a schematic structural view of an ion implantation apparatus according to an embodiment of the present invention.
Fig. 2 shows a schematic diagram of ion implantation according to an embodiment of the present invention.
Fig. 3a shows a top view of a guide electrode according to an embodiment of the invention, and fig. 3b shows a top view of a further guide electrode according to an embodiment of the invention.
Fig. 4 shows a schematic structural diagram of a semiconductor structure device after ion implantation according to an embodiment of the present invention.
Detailed Description
The invention will be described in more detail below with reference to the accompanying drawings. Like elements in the various figures are denoted by like reference numerals. For purposes of clarity, the various features in the drawings are not necessarily drawn to scale. In addition, certain well known components may not be shown. For simplicity, the semiconductor structure obtained after several steps can be described in one figure.
It will be understood that when a layer or region is referred to as being "on" or "over" another layer or region in describing the structure of the device, it can be directly on the other layer or region or intervening layers or regions may also be present. If for the purpose of describing the situation directly on another layer, another area, the expression "directly on … …" or "on … … and adjacent thereto" will be used herein.
In the present application, the term "semiconductor structure" refers to the general term for the entire semiconductor structure formed in the various steps of manufacturing a memory device, including all layers or regions that have been formed. In the following description, numerous specific details of the invention, such as structure, materials, dimensions, processing techniques and techniques of the devices are described in order to provide a more thorough understanding of the invention. However, as will be understood by those skilled in the art, the present invention may be practiced without these specific details.
Currently, an ion implantation process is generally used to selectively epitaxially grow a doped epitaxial layer in a substrate to improve the performance of a semiconductor device. In a 3D memory device, for example, in a process of manufacturing a 3D NAND device, a stacked structure is formed on a substrate surface, then a trench penetrating the stacked structure to reach the substrate surface is formed, and ion implantation is performed with the trench as an ion implantation channel to selectively form a doped epitaxial layer in the substrate. With the continuous pursuit of high storage density of storage products, the aspect ratio of the trench penetrating through the laminated structure is increasingly larger, and further the trench may be inclined to a certain extent. Further, when ion implantation is performed on the exposed substrate surface through the inclined trench, in order to prevent a portion of plasma from being blocked by the inclined trench and not achieving an expected doping effect, it is necessary to improve an ion implantation apparatus and an ion implantation method, so that the doping effect of ion implantation through the inclined trench is improved, and further, the threshold voltage uniformity of the semiconductor structure device is improved.
The inventors of the present application have noticed the above-mentioned problems affecting the yield and reliability of the 3D memory device, and thus have proposed a further improved ion implantation apparatus and ion implantation method.
The present invention may be embodied in various forms, some examples of which are described below.
Fig. 1 shows a schematic structural diagram of an ion implantation apparatus according to an embodiment of the present invention, and fig. 2 shows a schematic diagram of ion implantation according to an embodiment of the present invention.
As shown in fig. 1, the ion implantation apparatus 100 includes an ion source unit 110, a voltage source 120, an angle adjustment unit, and a susceptor 140.
The ion source unit 110 generates a plasma beam, which is directionally moved toward the semiconductor structure 200 (a semiconductor structure device to be subjected to a doping process). There are various methods of generating a plasma beam for a subsequent ion doping process, for example, by high frequency excitation, Electron Cyclotron Resonance plasma (ECR), magnetic field assisted discharge (mr), and the like. Specifically, the ion source unit 110 includes, for example, a magnetic field generating unit, a main discharge unit. The magnetic field generating unit generates a microwave resonance magnetic field, and electrons in the reaction substance resonate and absorb microwaves to generate reaction plasma. The main discharge unit comprises a discharge chamber and a plurality of permanent magnets positioned on the outer wall of the discharge chamber, the plurality of permanent magnets generate a magnetic field in the discharge chamber, and a third voltage is applied to the discharge chamber so as to introduce, for example, a forward plasma beam required by a subsequent doping process into the discharge chamber. Wherein the third voltage applied to the discharge chamber is provided, for example, by a voltage source 120. It should be noted that the ion source unit 110 may have different embodiments in practical applications, and the foregoing only schematically describes one embodiment, and the ion source unit 110 may be implemented by using other technical solutions without affecting the implementation of the ion implantation apparatus provided in the present application.
An angle adjustment unit is located between the ion source unit 110 and the susceptor 140 for matching an implantation angle of the plasma beam with a tilt angle of the trench in the semiconductor structure 200 located on the susceptor 140. The angle adjusting unit includes a guide electrode 130. The guiding electrode 130 is connected to the voltage source 120 to apply a first voltage to the guiding electrode 130. The guide electrode 130 implants the plasma beam generated in the ion source unit 110 into the bottom of the trench of the semiconductor structure 200 at a predetermined angle. The guide electrode 130 is, for example, a flat conductive electrode. The guide electrode 130 includes a plurality of through holes 131 therein, and the through holes 131 correspond to the positions of trenches (ion implantation channels) in the semiconductor structure. The implantation angle of the plasma beam in the ion source unit 110 is adjusted by the electric field on the guide electrode 130, and the plasma beam is emitted through the plurality of through holes 131 in the guide electrode 130, and is emitted based on the channel direction of the through holes 131 to be implanted into the surface of the semiconductor structure 200 at different angles, thereby completing the doping process. Specifically, the plurality of through holes 131 includes at least one hole with a tilted via 131, so that the ion beam passing through the through hole 131 is implanted into the semiconductor structure 200 at a predetermined angle, wherein the predetermined angle is consistent with the tilt angle of the trench of the semiconductor structure 200.
The carrier 140 is used to position the semiconductor structure to be doped (the semiconductor structure device of the memory device in the manufacturing process at the stage before the doping process). The guide electrode 130 is positioned between the ion source unit 110 and the susceptor 140, and injects the plasma beam into the semiconductor structure at a predetermined angle to match the inclination of the trench in the semiconductor structure, thereby improving the uniformity of the semiconductor structure layer formed by doping the epitaxial layer. The susceptor 140 is connected to the voltage source 120 to receive a second voltage, which attracts the plasma beam emitted from the guide electrode 130 to the surface of the semiconductor structure 200.
The carrier 140 may be a plate-like electrode or an electronic holder.
The voltage source 120 can provide different voltages to the ion generating device 110, the guide electrode 130, and the carrier stage 140. Wherein, the voltage source 120 provides a first voltage and a second voltage to form an electric field between the guide electrode 130 and the carrier platform 140, the electric field is directed from the guide electrode 130 to the carrier platform 140, wherein the first voltage applied to the guide electrode 130 is greater than the second voltage applied to the carrier platform 140.
During the plasma implantation of the semiconductor structure device to complete the doping process, as shown in fig. 2. After the plasma beam generated by the ion source unit 110 is emitted, the plasma beam is directed by the guide electrode 130 to be implanted into the semiconductor structure 200 at a predetermined angle. Specifically, the pore channels of the plurality of through holes 131 of the guide electrode 130 may have different inclinations. To eject the plasma beam into the semiconductor structure 200 through the via 131. Further, the inclination of the through hole 131 is matched with the adjusted implantation inclination of the plasma beam, and then the plasma beam is implanted into the bottom of the trench of the semiconductor structure 200, so that the implanted ions are prevented from damaging the sidewall of the ion implantation channel in the semiconductor structure, and the uniformity of the plasma beam implanted into the semiconductor structure 200 can be improved.
Fig. 3a shows a top view of a guide electrode according to an embodiment of the invention.
As shown in fig. 3a, the guide electrode 330 is a plate-shaped conductive electrode. A plurality of through holes 331 are included, the plurality of through holes 331 reaching along a first surface of the guide electrode 330, e.g., near a plasma beam outlet of the ion source unit 110, to a second surface near a semiconductor structure placed on the carrier stage 140. The plurality of through holes 331 includes at least one hole path inclined through hole 331, so that the plasma beam is emitted at the adjusted implantation angle after passing through such through hole 331. The through-hole 331 is circular in shape. In a preferred embodiment, the plurality of through holes 331 are arranged in a concentric circular array. In the preferred embodiment, ions passing through the vias 331 in the same circular array are implanted at the same angle into the semiconductor structure 200. In a preferred embodiment, the plasma beams emitted from the through holes 331 in at least two different circular arrays are implanted at different angles into the semiconductor structure 200. In the preferred embodiment, the aperture size of each through hole 331 is the same. The arrangement of the through holes 331 and the inclination degree of the channel of each through hole 331 may be determined according to the specific structure of the semiconductor structure device to be doped and the inclination degree of the ion implantation channel (e.g., a trench in the semiconductor structure device).
Fig. 3b shows a top view of yet another guide electrode according to an embodiment of the invention.
As shown in fig. 3b, the guide electrode 230 is a plate-shaped conductive electrode. A plurality of through holes 231 are included, the plurality of through holes 231 reaching along a first surface of the guide electrode 230, for example, near the plasma beam outlet of the ion source unit 110, to a second surface near the semiconductor structure 200 placed on the carrier stage 140. The plurality of through holes 231 includes at least one hole 231 having a slant, so that the plasma beam is emitted at an angle after passing through such a through hole 231. The shape of the through-hole 231 is a combination of arc and circle. In a preferred embodiment, the plurality of through holes 231 are arranged in a concentric circular array. In the preferred embodiment, ions passing through the arc-shaped vias 231 in the same circular array are implanted at the same angle into the semiconductor structure 200. In a preferred embodiment, the plasma beams emitted from the at least two circular through holes 231 are implanted into the semiconductor structure 200 at different angles. In a preferred embodiment, the aperture size of each through hole 231 is the same. The arrangement of the through holes 231 and the inclination degree of the pore channels of the through holes 231 may be determined according to the specific structure of the doped semiconductor structure device and the inclination degree of the ion implantation channel (for example, the trench in the semiconductor structure device).
It should be noted that in other alternative embodiments, the shape of the plurality of through holes in the guide electrode may also be an arc shape or a polygon shape. Wherein, a plurality of through-holes of arc or a plurality of through-holes of polygon are for example in concentric circle array arrangement. Further, the plasma beams passing through the through holes in the same circular array are implanted at the same angle into the semiconductor structure 200. Further, the plasma beams emitted from the through holes in at least two different circular arrays are implanted into the semiconductor construction device 200 at different angles. Further, the aperture size of each through hole is the same.
In other alternative embodiments, for example, the shape of the plurality of through holes in one steering electrode may be any combination of circular, arcuate, and annular. It should be noted that any embodiment expanded based on the present application is included in the scope of protection of the present application.
Fig. 4 shows a schematic structural diagram of a semiconductor structure device after ion implantation according to an embodiment of the present invention.
The present application takes the ion implantation apparatus 100 to implant ions into the semiconductor structure 200 to realize the plasma doping process as an example, and the ion implantation method provided by the present application is described in detail. The ion implantation apparatus of the present application may also be applied to other semiconductor structure devices, and the following description of the present application is not intended to be the only embodiment of the present application, and the implementation of the present application is not limited thereto.
As shown in fig. 4, before doping the epitaxial layer 205 by a plasma doping process, the semiconductor structure 200 includes a substrate 201, an insulation stack structure 210 located on a surface of the substrate 201, a trench 204 penetrating the insulation stack structure 210 to reach the surface of the substrate 201, and the epitaxial layer 205 located in the substrate 201 and exposed by the trench 204 at a portion of the surface. The insulating stack structure 210 includes an insulating layer 202 and a sacrificial layer 203 stacked in this order. The semiconductor structure 200 is then positioned on the stage 140 by implanting a plasma beam at a predetermined angle into the semiconductor structure 200 through the guide electrode using the ion implantation apparatus 100. A plasma beam is ejected from the guide electrode based on the through hole and implanted through the trench 204 (ion implantation channel) into the epitaxial layer 205 exposed by the trench 204 to complete the doping. The angle of the plasma beam emitted based on the guide electrode is matched with the inclination angle of the groove, so that the damage of the plasma beam to the side wall of the groove 204 is avoided, and the electric performance of the storage device is improved by the epitaxial layer formed by the method.
The embodiments of the present invention have been described above. However, these examples are for illustrative purposes only and are not intended to limit the scope of the present invention. The scope of the invention is defined by the appended claims and equivalents thereof. Various alternatives and modifications can be devised by those skilled in the art without departing from the scope of the invention, and these alternatives and modifications are intended to fall within the scope of the invention.

Claims (10)

1. An ion implantation apparatus, comprising:
the bearing table is used for bearing the semiconductor structure;
an ion source unit for generating a plasma beam and moving the plasma beam toward the semiconductor structure;
and the guide electrode is positioned between the ion source unit and the bearing table, and comprises a plurality of through holes, the pore canal of at least one through hole is inclined, the inclination of the through hole is matched with the inclination angle of the groove in the semiconductor structure, and the guide electrode is used for matching the implantation angle of the plasma beam after passing through the through hole with the inclination angle of the groove in the semiconductor structure.
2. The ion implantation apparatus of claim 1, wherein an electric field is applied to the steering electrode to adjust an implantation angle of the plasma beam.
3. The ion implantation apparatus of claim 1, wherein the via corresponds to a location of the trench.
4. The ion implantation apparatus of claim 1, wherein the plasma beams implant the semiconductor structures at the same angle through vias located in the same circular array.
5. The ion implantation apparatus of claim 1, wherein the plasma beam implants the semiconductor structure at different angles through vias located in different circular arrays.
6. The ion implantation apparatus of claim 3, wherein the plurality of through holes are arranged in a concentric circular array, the through holes having a cross section that is circular, or arcuate.
7. The ion implantation apparatus of claim 2, further comprising a voltage source for providing a first voltage to the guide electrode and a second voltage to the carrier stage, respectively, wherein an electric field is formed between the guide electrode and the carrier stage directed from the guide electrode to the carrier stage.
8. The ion implantation apparatus of claim 6, wherein a first voltage applied to the guide electrode is greater than a second voltage applied to the carrier table.
9. The ion implantation apparatus of claim 1, wherein the carrier stage is a plate electrode or an electronic clamp.
10. An ion implantation method, comprising:
providing a semiconductor structure, wherein the semiconductor structure is provided with a groove;
the ion implantation apparatus of any of claims 1-9, wherein the plasma beam is implanted at a predetermined angle into the bottom of the trench, wherein the predetermined angle is coincident with an angle of inclination of the trench.
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1954409A (en) * 2004-05-18 2007-04-25 库克有限公司 Implanted counted dopant ions
CN106233418A (en) * 2014-04-30 2016-12-14 艾克塞利斯科技公司 Use the angle sweep of angular energy filter device
WO2020117939A1 (en) * 2018-12-07 2020-06-11 Applied Materials, Inc. Apparatus and techniques for angled etching using multielectrode extraction source

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1954409A (en) * 2004-05-18 2007-04-25 库克有限公司 Implanted counted dopant ions
CN106233418A (en) * 2014-04-30 2016-12-14 艾克塞利斯科技公司 Use the angle sweep of angular energy filter device
WO2020117939A1 (en) * 2018-12-07 2020-06-11 Applied Materials, Inc. Apparatus and techniques for angled etching using multielectrode extraction source

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