CN112817889A - Data acquisition method and system - Google Patents
Data acquisition method and system Download PDFInfo
- Publication number
- CN112817889A CN112817889A CN201911118023.1A CN201911118023A CN112817889A CN 112817889 A CN112817889 A CN 112817889A CN 201911118023 A CN201911118023 A CN 201911118023A CN 112817889 A CN112817889 A CN 112817889A
- Authority
- CN
- China
- Prior art keywords
- data
- data line
- line number
- current
- row
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 43
- 239000012634 fragment Substances 0.000 claims abstract description 21
- 238000005192 partition Methods 0.000 claims description 32
- 238000010008 shearing Methods 0.000 claims description 5
- 238000011084 recovery Methods 0.000 description 7
- 230000005540 biological transmission Effects 0.000 description 4
- 238000004891 communication Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 230000003111 delayed effect Effects 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 230000005856 abnormality Effects 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 238000003384 imaging method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000011664 signaling Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/382—Information transfer, e.g. on bus using universal interface adapter
- G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
Abstract
The application discloses a data acquisition method and a system, wherein the data acquisition method comprises the following steps: for each block in the storage area, judging whether the data line number of a first data line in the block is equal to the current line number or not, and whether the data line number of a second data line in the block is equal to the sum of the current line number and a preset value or not; and if the judgment result of the first data line is equal to the judgment result of the second data line, cutting the first data line in the corresponding fragment area to a preset space, and setting the data line number of the first data line cut to the preset space as the current line number. The data acquisition method can ensure the synchronism of the data acquired by the plurality of camera boards.
Description
Technical Field
The present application relates to the field of imaging technologies, and in particular, to a data acquisition method and system.
Background
In the related art, a five-path array camera board can be generally connected through a patch panel, and data of five channels are received at the same time, wherein 5 network ports are arranged on the patch panel, the five network ports are in one-to-one communication connection with the five camera boards, and then the five network ports are integrated and transmitted to an upper computer through a Camera Link interface for processing.
However, in implementing the present invention, the inventors found that at least the following problems exist in the related art: if one of the camera boards loses one line of data abnormally in the transmission process, the signals of the camera board in all subsequent lines are delayed by one line compared with the signals of other camera boards, if several lost lines occur, the image synthesized by the upper computer by adopting the received line of data is more and more disordered, the problem except integral reset cannot be solved, and the synchronism and reliability of the data acquired by the plurality of camera boards are greatly reduced.
Disclosure of Invention
The present application is directed to solving, at least to some extent, one of the technical problems in the related art described above.
To this end, a first object of the present application is to propose a method for acquiring data. The data acquisition method can effectively ensure the synchronism of the data acquired by a plurality of camera boards.
A second object of the present application is to provide a data acquisition system.
In order to achieve the above object, an embodiment of a first aspect of the present application discloses a data acquisition method, including the following steps: for each block in the storage area, judging whether the data line number of a first data line in the block is equal to the current line number or not, and whether the data line number of a second data line in the block is equal to the sum of the current line number and a preset value or not; wherein, the data in each of the plurality of areas in the storage area is written by the corresponding fifo on the patch panel; and if the judgment result of the first data line is equal to the judgment result of the second data line, cutting the first data line in the corresponding fragment area to a preset space, and setting the data line number of the first data line cut to the preset space as the current line number.
According to the data acquisition method, the data of the lost line can be supplemented by using the data of the adjacent area by modifying the line number of the data, the synchronism and the reliability of the data acquired by a plurality of camera boards can be ensured, and the accuracy of picture recovery is improved.
In some examples, further comprising: and if the data line number of the first data line is greater than the current line number and the data line number of the second data line is greater than the sum of the current line number and a preset value, copying the first data line to the preset space, and setting the data line number of the first data line copied to the preset space as the current line number. Through the steps, more error conditions can be adjusted, the synchronism and the reliability of data collected by a plurality of camera boards are further ensured, and the accuracy of picture recovery is improved.
In some examples, further comprising: and if the data line number of the first data line is smaller than the current line number and the data line number of the second data line is smaller than the sum of the current line number and the preset value, changing the data reading address of the corresponding block area to skip reading the first data line and updating the second data line into the first data line. In the same way, more error conditions can be adjusted through the step, the synchronism and the reliability of the data collected by the plurality of camera boards are further ensured, and the accuracy of picture recovery is improved.
In some examples, the determining, for each partition in the storage area, whether the data line number of the first data line in the partition is equal to the current line number, and whether the data line number of the second data line in the partition is equal to the sum of the current line number and a preset value includes: updating the current line number and setting each chip area in the storage area under the current line number to be in an unread state; and judging whether the data line number of a first data line in the storage area is equal to the current line number or not and whether the data line number of a second data line in the storage area is equal to the sum of the current line number and a preset value or not for each block in an unread state in the storage area. And responding to the update of the current line number, and setting the state of each fragment area under the current line number, so as to facilitate the realization of fast processing of the data of each fragment area.
In some examples, after cutting the first data line in the respective tile to the preset space, or copying the data of the first data line in the respective tile to the preset space, the method further comprises: and setting the corresponding area under the current line number to be in a read state. The time for caching data in each partition may not be synchronous, the partition is set to be in an unread state before reading data according to the current line number, and the partition is set to be in a read state after reading data.
In some examples, the method further comprises: detecting whether a first data line and a second data line are cached in each chip area which is in an unread state under the current line number in the storage area; the determining, for each partition in the storage area, whether the data row number of the first data row in the partition is equal to the current row number, and whether the data row number of the second data row in the partition is equal to the sum of the current row number and a preset value, includes: if the first data line and the second data line are detected to be cached in the film area which is in the unread state under the current line number in the storage area, whether the data line number of the first data line in the film area is equal to the current line number or not and whether the data line number of the second data line in the film area is equal to the sum of the current line number and a preset value or not are judged for each film area in the storage area. After the two rows of data are determined to be cached, subsequent reading operation is carried out, so that the data can be read quickly, timely and accurately.
In some examples, the method further comprises: and detecting whether the fifo corresponding to each partition is full of a row of data, and if so, writing the full row of data into the corresponding partition. Whether data are required to be written in the corresponding fragment area can be determined by detecting whether the fifo is cached with a row of data or not, so that the data in the fifo can be written in the fragment area corresponding to the fifo in time.
In some examples, before cutting the first data line in the corresponding tile to the preset space or copying the data of the first data line in the corresponding tile to the preset space, further comprising: judging whether the corresponding fragment area has write-in operation or not; if so, the write operation is preferentially performed.
A second aspect of the present application discloses a data acquisition system, comprising: the judging module is used for judging whether the data line number of a first data line in the storage area is equal to the current line number or not and whether the data line number of a second data line in the storage area is equal to the sum of the current line number and a preset value or not according to each block in the storage area; wherein, the data in each of the plurality of areas in the storage area is written by the corresponding fifo on the patch panel; and the shearing module is used for shearing the first data line in the corresponding fragment area to a preset space when the judgment result of one of the two is equal to the preset space, and setting the data line number of the first data line sheared to the preset space as the current line number.
According to the data acquisition system, the synchronism and the reliability of the data acquired by the plurality of camera boards can be guaranteed, and therefore the accuracy of picture recovery is improved.
In some examples, the above data acquisition system further includes: and the copying module is used for copying the first data line to the preset space when the data line number of the first data line is greater than the current line number and the data line number of the second data line is greater than the sum of the current line number and a preset value, and setting the data line number of the first data line copied to the preset space as the current line number.
In some examples, the above data acquisition system further includes: and the changing module is used for changing the data reading address of the corresponding block area when the data line number of the first data line is smaller than the current line number and the data line number of the second data line is smaller than the sum of the current line number and the preset value, so that the reading of the first data line is skipped, and the second data line is updated to be the first data line.
In some examples, the determining module is specifically configured to: updating the current line number and setting each chip area in the storage area under the current line number to be in an unread state; and judging whether the data line number of a first data line in the storage area is equal to the current line number or not and whether the data line number of a second data line in the storage area is equal to the sum of the current line number and a preset value or not for each block in an unread state in the storage area.
In some examples, after cutting the first data line in the respective tile to the preset space, or copying the data of the first data line in the respective tile to the preset space, the system is further configured to: and setting the corresponding area under the current line number to be in a read state.
In some examples, the system further comprises: the detection module is used for detecting whether a first data line and a second data line are cached in each chip area which is in an unread state under the current line number in the storage area; the judging module is further configured to: if the first data line and the second data line are detected to be cached in the film area which is in the unread state under the current line number in the storage area, whether the data line number of the first data line in the film area is equal to the current line number or not and whether the data line number of the second data line in the film area is equal to the sum of the current line number and a preset value or not are judged for each film area in the storage area.
In some examples, the system is further configured to: and detecting whether the fifo corresponding to each partition is full of a row of data, and if so, writing the full row of data into the corresponding partition.
In some examples, prior to cutting the first data line in the respective tile to the preset space, or copying the data of the first data line in the respective tile to the preset space, the system is further configured to: judging whether the corresponding fragment area has write-in operation or not; if so, the write operation is preferentially performed.
Additional aspects and advantages of the present application will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the present application.
Drawings
The foregoing and/or additional aspects and advantages of the present application will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
FIG. 1 is a schematic diagram of a data acquisition apparatus in the related art;
FIG. 2 is a flow chart of data acquisition by the data acquisition device of FIG. 1 in the related art;
FIG. 3 is a flow chart of a method of data acquisition according to one embodiment of the present application;
fig. 4 is a block diagram of a data acquisition system according to an embodiment of the present application.
Detailed Description
Reference will now be made in detail to embodiments of the present application, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the drawings are exemplary only for the purpose of explaining the present application and are not to be construed as limiting the present application.
The following describes a data acquisition method and system according to an embodiment of the present application with reference to the drawings.
Before describing the data acquisition method according to the embodiment of the present invention, a data acquisition method in the related art will be briefly described.
As shown in fig. 1, one adapter board is usually connected to a five-path array camera board at most, and receives data of the five channels at the same time, and then integrates the data and transmits the data to an upper computer for processing through a CameraLink interface. The interface board and the camera boards are connected through an LVDS (low-voltage differential signaling) line, the LVDS line is used for sending a trigger signal, the interface board generates the trigger signal, and sends the trigger signal to each camera board through the LVDS line, so that the camera boards are ensured to be exposed and acquire data at the same time. The adapter plate is provided with 5 network ports, the five network ports are in one-to-one communication connection with the five camera plates, the adapter plate is connected with the camera plates through gigabit network cables, and the gigabit network cables are used for sending each row of data generated by each linear array camera to the adapter plate successively. The adapter board is provided with an FPGA, a CameraLink sending module and a CameraLink interface, the specific model of the FPGA can be 5CEBA5F23C8N of altera, the configuration of the CameraLink interface is in a Base mode, the CameraLink interface in the mode corresponds to a single-channel connection chip and is connected by adopting a cable, and the cable can be a later CameraLink line. Two ends of the CameraLink line are respectively in communication connection with the adapter plate and the upper computer through a CameraLink interface, and the part connected with the CameraLink line is the CameraLink interface. The FPGA has a fifo (first input first output) memory, and likewise, the transmitting module of the CameraLink also has a fifo memory. And the transmitting module of the Camera Link integrates the data acquired by each camera and transmits the data to the upper computer through the Camera Link line.
Each data packet of a row of data sent by the camera board is added with 32-bit data for marking the current row number, and based on this, as shown in fig. 2, fifo1-5 is a memory of the FPGA, and the flow of the adapter board integrating data is as follows: each network port of the adapter plate receives data transmitted by the corresponding camera plate, and after the packet head is identified, a line of data is written into the corresponding fifo. There is a protocol, i.e. a format in general, for sending a line of data, where each data packet may comply with the following protocol, for example: header (4 bytes, 0xA 50 xCC 0x 000 x00) + row number (4 bytes) + the row data + trailer (4 bytes, 0xFF × 4). In fig. 2, the status indicator is mainly the rdusedw signal of fifo indicating the number of data buffered in the fifo read port, and when the rdusedw signal indicates that N data in the corresponding fifo can be read, it indicates that a line of data is buffered.
Detecting whether the fifo1-5 caches at least one line of data quantity; if not, continuing to execute the step; if so, reading one line of data from fifo1-5 in sequence and writing the data into fifo in the CameraLink sending module, and after the step is completed, returning to repeatedly execute the step of detecting whether the fifo1-5 caches the data amount of at least one line; and the CameraLink sending module detects that at least one line of data is cached in the fifo, reads the line of data, packs the data and sends the data to the upper computer. It should be noted that the data buffered in fifo actually consists of the original five-line data, that is, the data is formed by sequentially arranging (may be in a preset arrangement order between the camera boards) the five-line data read from fifo1-5 when written into eth _ fifo, that is, the data is integrated.
However, if one of the camera boards loses one line of data abnormally in the transmission process, the operation according to the above-mentioned process results in that the signals of the camera board in all the subsequent lines lag behind the other lines by one line, and if several lost lines occur, the image synthesized by the upper computer by using the received line data becomes more and more disordered, which greatly reduces the synchronism and reliability of the data collected by the plurality of camera boards.
The invention provides a data acquisition method based on the problems, which effectively improves the synchronism and reliability of data acquired by a plurality of camera boards.
Fig. 3 is a flow chart of a data acquisition method according to another embodiment of the present application. As shown in fig. 3, the data acquisition method according to an embodiment of the present application includes the following steps:
s301: and aiming at each block in the storage area, judging whether the data line number of a first data line in the block is equal to the current line number or not, and judging whether the data line number of a second data line in the block is equal to the sum of the current line number and a preset value or not, wherein the data in each block in a plurality of blocks in the storage area is written by corresponding fifo on the adapter board. The preset value may be 1, and of course, may be other predetermined values.
The storage area may be a memory, such as: DDR3(DDR, also known as Double data Rate SDRAM, Double data Rate SDRSDRAM is a high speed CMOS dynamic random access memory).
Specifically, in view of the limited depth of fifo, fifo is a first-in first-out dual-port buffer, data is written in sequence and read out in sequence, and the same data cannot be read out repeatedly. Specifically, the embodiment of the application can realize stable data synchronization through external storage of the DDR 3. The DDR3 may be divided into 5 partitions, and receive data written from 5 fifo, for example: the data in fifo1-fifo5 is received in a one-to-one correspondence. Of course, in other embodiments, the fifo may be in other numbers, such as 4, 6, etc. The number of partitioned extents in the DDR3 may be equal to or more than the number of fifo, so that there may be one extent for each fifo for storing data written by the fifo.
The first data line and the second data line are a line of data arranged at the first bit and the second bit in the chip area according to the storage sequence, namely the read address currently points to the initial address of the first data line, and the second data line is a line of data arranged behind the first data line according to the storage sequence.
In one embodiment, for each partition in the storage area, determining whether the data line number of the first data line in the partition is equal to the current line number, and whether the data line number of the second data line in the partition is equal to the sum of the current line number and a preset value includes: updating the current line number and setting each chip area in the storage area under the current line number to be in an unread state; and judging whether the data line number of a first data line in the storage area is equal to the current line number or not and whether the data line number of a second data line in the storage area is equal to the sum of the current line number and a preset value or not for each block in an unread state in the storage area.
Each row of data written by fifo into the tile area itself carries a data row number, the current row number being the row number that is currently to be read out, e.g. the data can be read in the order of row numbers of 1, 2, 3.
It should be understood that fifo is written in the form of a data packet, and the data packet includes a data line number. For example: each network port receives data transmitted from a corresponding camera board, and writes a line of data into corresponding fifo after recognizing the packet header. Sending a line of data is agreed upon, namely: each packet follows the following protocol:
header (4 bytes, 0xA 50 xCC 0x 000 x00) + data line number (4 bytes) + the line data + trailer (4 bytes, 0xFF × 4).
Therefore, in order to avoid the situation that the signals of the camera board in all the subsequent rows are delayed by one row compared with other rows due to the fact that one row of data is lost abnormally in the transmission process, the current row number can be updated, each fragment area in the storage area under the current row number is set to be in an unread state, and therefore each fragment area in the unread state in the storage area is judged, and whether the data row number of the first data row in each fragment area in the unread state is the same as the current row number or not is determined.
In some examples, the method further comprises: detecting whether a first data line and a second data line are cached in each chip area which is in an unread state under the current line number in a storage area; for each block in the storage area, judging whether the data line number of a first data line in the block is equal to the current line number or not, and whether the data line number of a second data line in the block is equal to the sum of the current line number and a preset value or not, the method comprises the following steps: if the fact that the first data line and the second data line are cached in the film area which is in the unread state under the current line number in the storage area is detected, whether the data line number of the first data line in the film area is equal to the current line number or not and whether the data line number of the second data line in the film area is equal to the sum of the current line number and a preset value or not are judged for each film area in the storage area.
S302: and if the judgment result of the first data line is equal to the judgment result of the second data line, cutting the first data line in the corresponding fragment area to a preset space, and setting the data line number of the first data line cut to the preset space as the current line number. The preset space is, for example, fifo of the transmitting module of the CameraLink in the patch panel, which is also referred to herein as fifo of the CameraLink.
It should be understood that, if one of the determination results is equal, that is, any one of the determination results is equal, then the first data row in the corresponding fragment area is cut to the preset space, and the data row number of the first data row cut to the preset space is set as the current row number, for example, the data row number of the first data row in the fragment area is equal to the current row number, and whether the data row number of the second data row in the fragment area is equal to the sum of the current row number and the preset value, the data row number of the first data row cut to the preset space is set as the current row number; for another example, the data line number of the second data line in the segment is equal to the sum of the current line number and the preset value, and no matter whether the data line number of the first data line in the segment is equal to the current line number, the first data line in the corresponding segment is cut to the preset space, and the data line number of the first data line cut to the preset space is the current line number, so that the synchronism and reliability of data acquired by the plurality of camera boards can be effectively ensured, and the accuracy of picture recovery is improved.
It should be noted that, copying or cutting a line of data from each tile area into fifo of the CameraLink may be to directly write the data into fifo of the CameraLink, for example, the data packet contains addresses or identifications of the respective camera boards, so that under the current line number, the data written into fifo may be arranged according to a predetermined sequence between the camera boards, for example, the data sequentially corresponds to fifo 1-5. Of course, the data can also be indirectly written into fifo of the CameraLink, and eth _ fifo1-5 is additionally arranged and respectively corresponds to 5 slice areas one by one, under the current line number, one line of data of a certain slice area is directly written into the corresponding eth _ fifo of eth _ fifo1-5 in a cutting or copying mode, and then eth _ fifo1-5 is arranged and written into fifo of the CameraLink according to the predetermined sequence among the camera boards. For example, the current row number is noted as: local _ line _ num; the data line number of the first data line in the block area is recorded as: line _ num; the data line number of the second data line in the block is recorded as: line _ num _ next; when line _ num is equal to local _ line _ num, or line _ num _ next is equal to local _ line _ num +1, where 1 is a preset value, the line data of the corresponding slice area, i.e. the first data line (according to the order of storing data in the slice area, the line refers to the data _ of the previous line) is read out in a cutting manner and written into the corresponding eth _ fifo, where the line number written into eth _ fifo is set to local _ line _ num, and after the line data is written into eth _ fifo, the slice area under the current line number is marked as read out.
That is, the row number of the previous row of data is correct regardless of whether the row number of the next row is correct, and the row number of the next row of data is correct regardless of whether the row number of the previous row is correct, that is, only one row of data is correct, thereby effectively avoiding that the data of the whole row is misplaced due to sudden change (for example, transmission error, and read-write error of DDR 3) of a certain row number, for example, the row numbers are 1, 2, 3, 56, 5, 6, and 7.
Further, after reading out the first data line from the corresponding tile, the method further comprises: and setting the corresponding area under the current line number to be in a read state. The reading out of the first data line from the corresponding segment may be cutting the first data line in the corresponding segment to a preset space, or copying the data of the first data line in the corresponding segment to a preset space.
The term "cut" means that the read address is assigned to the start address of the next line after the data is completely read, and the next line is the next line of the currently read line in the storage order of the data. Copying means that after reading the data, the read address is continued to point to the start address of the current line.
Further, the above data acquisition method further includes: and if the data line number of the first data line is greater than the current line number and the data line number of the second data line is greater than the sum of the current line number and a preset value, copying the first data line to a preset space, and setting the data line number of the first data line copied to the preset space as the current line number.
For example: line _ num is greater than local _ line _ num and line _ num _ next is greater than local _ line _ num + 1.
The row data of the corresponding slice area, namely the first data row, is read out in a copying mode and written into the corresponding eth _ fifo, wherein the row number written into the eth _ fifo is set as local _ line _ num, and the slice area under the current row number is marked as read out after the row data is written into the eth _ fifo.
In this case, a row of data is less, for example, the currently read local _ line _ num is 5, the actually read line _ num is 9, and line _ num _ next is 10, so that the row of data with the row number of 5 in the cache is not difficult to see (of course, if there is no row number 6, 7, 8, the following row of data needs to be copied for filling), and therefore, the data filling of the currently read row number of 9 is borrowed.
Further, the above data acquisition method further includes: and if the data line number of the first data line is smaller than the current line number and the data line number of the second data line is smaller than the sum of the current line number and the preset value, changing the data reading address of the corresponding block area to skip reading the first data line and update the second data line into the first data line.
And if the first data row and the second data row are continuously stored after the second data row is updated to the first data row under the condition that the segment is still in an unread state under the current line number, returning to execute the step S301 again until one line of data is read out from the segment under the current line number, and marking the current line number as read-out.
For example: line _ num is less than local _ line _ num and line _ num _ next is less than local _ line _ num +1, the read address is directly incremented to the start address pointing to the next line, and then the state jumps back to "detect whether each tile is full of two lines of data, i.e., whether the first and second lines of data are cached, if there is and the current line number (local _ line _ num) the tile is read unmarked". That is, when there is one more row, the present application does not perform a read operation on the current first data. Further, the above data acquisition method further includes: and if the judgment result of one is larger than the judgment result of the other is smaller than the judgment result of the other, shearing the first data line in the corresponding fragment area to a preset space, and setting the data line number of the first data line sheared to the preset space as the current line number.
It should be understood that, if the data line number of the first data line is less than the current line number and the data line number of the second data line is greater than the sum of the current line number and the preset value, or if the data line number of the first data line is greater than the current line number and the data line number of the second data line is less than the sum of the current line number and the preset value, the first data line in the corresponding slice area is cut to the preset space, and the data line number of the first data line cut to the preset space is set as the current line number.
Specifically, when another data abnormality occurs, the processing may be performed in the above-described manner 1). Namely: and reading the line data of the corresponding slice area, namely the first data line, in a cutting mode and writing the line data into the corresponding eth _ fifo, wherein the line number written into the eth _ fifo is set as local _ line _ num, and after the line data is written into the eth _ fifo, marking the slice area under the current line number as read.
If all the slice areas under the current line number are marked as read, the current line number (local _ line _ num) is updated by increasing 1, and each slice area under the new current line number is marked as unread.
Further, before the cutting the first data line in the corresponding section to the preset space, or copying the data of the first data line in the corresponding section to the preset space, the method further includes: judging whether a write operation exists in the corresponding fragment area; if so, the write operation is preferentially performed.
Specifically, before reading data from a sector of the DDR3, it is also necessary to determine whether a write operation is required for the sector, and if so, perform the write operation first, and if not, perform the read operation again, where the priority of the write operation is greater than the priority of the read operation.
In some examples, the method further comprises: and detecting whether the fifo corresponding to each partition is full of a row of data, and if so, writing the full row of data into the corresponding partition.
Specifically, the embodiment of the present invention may detect whether each tile is full of two rows of data, and if there is a tile and the tile is not read under the current line number (local _ line _ num), if none of the tiles meets the requirement, the state is turned back to the previous state, that is, "detect whether there is one row of data full of data cached in fifo1-5, and if there is a row of data in the corresponding fifo, read and store the data in the corresponding tile into DDR3," and sequentially read out the line numbers (line _ num and line _ num _ next) of the two rows.
According to the data acquisition method, the synchronism and the reliability of the data acquired by the plurality of camera boards can be guaranteed, and the accuracy of picture recovery is improved.
Fig. 4 is a block diagram of a data acquisition system according to an embodiment of the present application. As shown in fig. 4, a data acquisition system 600 according to an embodiment of the present application includes: a decision block 610 and a clipping block 620.
The determining module 610 is configured to determine, for each partition in the storage area, whether a data line number of a first data line in the partition is equal to a current line number, and whether a data line number of a second data line in the partition is equal to a sum of the current line number and a preset value; wherein the data in each of the plurality of sections in the storage area is written by the corresponding fifo on the patch panel. The cutting module 620 is configured to cut the first data line in the corresponding segment to the preset space when the determination result of one is equal to that, and set the data line number of the first data line cut to the preset space as the current line number.
In some examples, the above data acquisition system 600 further includes: and the copying module is used for copying the first data line to a preset space when the data line number of the first data line is greater than the current line number and the data line number of the second data line is greater than the sum of the current line number and a preset value, and setting the data line number of the first data line copied to the preset space as the current line number.
In some examples, the above data acquisition system 600 further includes: and the changing module is used for changing the data reading address of the corresponding chip area when the data line number of the first data line is smaller than the current line number and the data line number of the second data line is smaller than the sum of the current line number and a preset value, so that the reading of the first data line is skipped, and the second data line is updated into the first data line.
In some examples, the determining module 610 is specifically configured to: updating the current line number and setting each chip area in the storage area under the current line number to be in an unread state; and judging whether the data line number of a first data line in the storage area is equal to the current line number or not and whether the data line number of a second data line in the storage area is equal to the sum of the current line number and a preset value or not for each block in an unread state in the storage area.
In some examples, after cutting the first data line in the respective tile to the preset space, or copying the data of the first data line in the respective tile to the preset space, the system is further configured to: and setting the corresponding area under the current line number to be in a read state.
In some examples, the system further comprises: the detection module is used for detecting whether a first data line and a second data line are cached in each chip area which is in an unread state under the current line number in the storage area; the determining module 610 is further configured to: if the fact that the first data line and the second data line are cached in the film area which is in the unread state under the current line number in the storage area is detected, whether the data line number of the first data line in the film area is equal to the current line number or not and whether the data line number of the second data line in the film area is equal to the sum of the current line number and a preset value or not are judged for each film area in the storage area.
In some examples, the system further comprises: and detecting whether the fifo corresponding to each partition is full of a row of data, and if so, writing the full row of data into the corresponding partition.
In some examples, before cutting the first data line in the corresponding tile to the preset space or copying the data of the first data line in the corresponding tile to the preset space, the system further includes: judging whether a write operation exists in the corresponding fragment area; if so, the write operation is preferentially performed. .
It should be noted that the foregoing explanation of the embodiment of the data acquisition method is also applicable to the data acquisition system of the embodiment, and is not repeated here.
According to the data acquisition system provided by the embodiment of the application, the synchronism and the reliability of the data acquired by the plurality of camera boards can be ensured, so that the accuracy of picture recovery is improved.
In the description herein, reference to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the application. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction.
Although embodiments of the present application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present application, and that variations, modifications, substitutions and alterations may be made to the above embodiments by those of ordinary skill in the art within the scope of the present application.
Claims (10)
1. A data acquisition method is characterized by comprising the following steps:
for each block in the storage area, judging whether the data line number of a first data line in the block is equal to the current line number or not, and whether the data line number of a second data line in the block is equal to the sum of the current line number and a preset value or not; wherein, the data in each of the plurality of areas in the storage area is written by the corresponding fifo on the patch panel;
and if the judgment result of the first data line is equal to the judgment result of the second data line, cutting the first data line in the corresponding block area to a preset space, and setting the data line number of the first data line cut to the preset space as the current line number.
2. The method of claim 1, further comprising:
and if the data line number of the first data line is greater than the current line number and the data line number of the second data line is greater than the sum of the current line number and a preset value, copying the first data line to the preset space, and setting the data line number of the first data line copied to the preset space as the current line number.
3. The method of claim 1, further comprising:
and if the data line number of the first data line is smaller than the current line number and the data line number of the second data line is smaller than the sum of the current line number and the preset value, changing the data reading address of the corresponding block area to skip reading the first data line and updating the second data line into the first data line.
4. The method of claim 2, wherein the determining, for each partition in the storage area, whether the data row number of the first data row in the partition is equal to the current row number and whether the data row number of the second data row in the partition is equal to the sum of the current row number and a predetermined value comprises:
updating the current line number and setting each chip area in the storage area under the current line number to be in an unread state;
and judging whether the data line number of a first data line in the storage area is equal to the current line number or not and whether the data line number of a second data line in the storage area is equal to the sum of the current line number and a preset value or not for each block in an unread state in the storage area.
5. The data acquisition method according to claim 2 or 4, wherein after the first data line in the corresponding tile is cut to a preset space or the data of the first data line in the corresponding tile is copied to the preset space, the method further comprises:
and setting the corresponding area under the current line number to be in a read state.
6. A method of acquiring data according to claim 3, the method further comprising: detecting whether a first data line and a second data line are cached in each chip area which is in an unread state under the current line number in the storage area;
the determining, for each partition in the storage area, whether the data row number of the first data row in the partition is equal to the current row number, and whether the data row number of the second data row in the partition is equal to the sum of the current row number and a preset value, includes:
if the first data line and the second data line are detected to be cached in the film area which is in the unread state under the current line number in the storage area, whether the data line number of the first data line in the film area is equal to the current line number or not and whether the data line number of the second data line in the film area is equal to the sum of the current line number and a preset value or not are judged for each film area in the storage area.
7. The method of claim 2, wherein the method further comprises:
and detecting whether the fifo corresponding to each partition is full of a row of data, and if so, writing the full row of data into the corresponding partition.
8. The data acquisition method according to claim 2, wherein before the cutting the first data row in the corresponding tile into the preset space or copying the data of the first data row in the corresponding tile into the preset space, the method further comprises:
judging whether the corresponding fragment area has write-in operation or not;
if so, the write operation is preferentially performed.
9. A system for data acquisition, comprising:
the judging module is used for judging whether the data line number of a first data line in the storage area is equal to the current line number or not and whether the data line number of a second data line in the storage area is equal to the sum of the current line number and a preset value or not according to each block in the storage area; wherein, the data in each of the plurality of areas in the storage area is written by the corresponding fifo on the patch panel; and the shearing module is used for shearing the first data line in the corresponding fragment area to a preset space when the judgment result of one of the two is equal to the preset space, and setting the data line number of the first data line sheared to the preset space as the current line number.
10. The data acquisition system of claim 9, wherein the system further comprises: and the copying module is used for copying the first data line to the preset space when the data line number of the first data line is greater than the current line number and the data line number of the second data line is greater than the sum of the current line number and a preset value, and setting the data line number of the first data line copied to the preset space as the current line number.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911118023.1A CN112817889A (en) | 2019-11-15 | 2019-11-15 | Data acquisition method and system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911118023.1A CN112817889A (en) | 2019-11-15 | 2019-11-15 | Data acquisition method and system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN112817889A true CN112817889A (en) | 2021-05-18 |
Family
ID=75851551
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201911118023.1A Pending CN112817889A (en) | 2019-11-15 | 2019-11-15 | Data acquisition method and system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN112817889A (en) |
Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1114489A (en) * | 1994-03-24 | 1996-01-03 | Dva公司 | Pipeline |
| DE69124606D1 (en) * | 1991-10-17 | 1997-03-20 | Ibm | Adaptive FIFO memory control |
| US20040041018A1 (en) * | 1997-07-15 | 2004-03-04 | Kia Silverbrook | Card having coded data and visible information, for operating a device |
| CN1879383A (en) * | 2003-09-10 | 2006-12-13 | 高通股份有限公司 | High data rate interface |
| CN101309420A (en) * | 2007-05-17 | 2008-11-19 | 索尼株式会社 | Information processing device and method, and information processing system |
| CN101447017A (en) * | 2008-11-27 | 2009-06-03 | 浙江工业大学 | Method and system for quickly identifying and counting votes on the basis of layout analysis |
| CN104111756A (en) * | 2013-04-17 | 2014-10-22 | 广州视睿电子科技有限公司 | Method and system for increasing frame rates of images and optical imaging touch screen system |
| CN105096444A (en) * | 2014-05-22 | 2015-11-25 | 浙江大学 | Banknote identification instrument image acquisition and data processing method and circuit |
| CN106909445A (en) * | 2016-07-01 | 2017-06-30 | 阿里巴巴集团控股有限公司 | Data duplication or the method for shearing, device and electronic equipment in form |
| CN108959656A (en) * | 2018-08-13 | 2018-12-07 | 电子科技大学 | A kind of three-dimensional mapping synchronous method of more FPGA multichannel collecting systems |
-
2019
- 2019-11-15 CN CN201911118023.1A patent/CN112817889A/en active Pending
Patent Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE69124606D1 (en) * | 1991-10-17 | 1997-03-20 | Ibm | Adaptive FIFO memory control |
| CN1114489A (en) * | 1994-03-24 | 1996-01-03 | Dva公司 | Pipeline |
| US20040041018A1 (en) * | 1997-07-15 | 2004-03-04 | Kia Silverbrook | Card having coded data and visible information, for operating a device |
| CN1879383A (en) * | 2003-09-10 | 2006-12-13 | 高通股份有限公司 | High data rate interface |
| CN101309420A (en) * | 2007-05-17 | 2008-11-19 | 索尼株式会社 | Information processing device and method, and information processing system |
| CN101447017A (en) * | 2008-11-27 | 2009-06-03 | 浙江工业大学 | Method and system for quickly identifying and counting votes on the basis of layout analysis |
| CN104111756A (en) * | 2013-04-17 | 2014-10-22 | 广州视睿电子科技有限公司 | Method and system for increasing frame rates of images and optical imaging touch screen system |
| CN105096444A (en) * | 2014-05-22 | 2015-11-25 | 浙江大学 | Banknote identification instrument image acquisition and data processing method and circuit |
| CN106909445A (en) * | 2016-07-01 | 2017-06-30 | 阿里巴巴集团控股有限公司 | Data duplication or the method for shearing, device and electronic equipment in form |
| CN108959656A (en) * | 2018-08-13 | 2018-12-07 | 电子科技大学 | A kind of three-dimensional mapping synchronous method of more FPGA multichannel collecting systems |
Non-Patent Citations (1)
| Title |
|---|
| 倪奇志 等: ""HD-SDI 数字视频信号处理及传输的FPGA 设计与实现"", 《电子技术与软件工程》, 31 December 2018 (2018-12-31), pages 72 * |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US11805224B2 (en) | Image transmission device and method including an image data receiver and a processor | |
| US8499105B2 (en) | Buffer manager and buffer management method based on address pointer linked list | |
| US7792014B2 (en) | Method of skipping nullified packets during mass replay from replay buffer | |
| CN103236270B (en) | Flash memory device and method | |
| US20120314709A1 (en) | Method for processing data packets in flow-aware network nodes | |
| US5016221A (en) | First-in, first-out (FIFO) memory with variable commit point | |
| CN111683252B (en) | Server and output system and method of video compression image | |
| JPWO2004066570A1 (en) | Network switch device and network switch method | |
| TWI753063B (en) | Data transfer apparatus and data transfer method | |
| JP2016503526A (en) | Data processing method and apparatus | |
| JP6543246B2 (en) | Network interface | |
| CN112822386B (en) | Data acquisition method and system | |
| US20080195793A1 (en) | Microcontroller with memory trace module | |
| CN112817889A (en) | Data acquisition method and system | |
| US8363653B2 (en) | Packet forwarding method and device | |
| US10581555B2 (en) | Information processing device and burst error reproducing method | |
| CN109285580B (en) | Data preprocessing device and method and asynchronous double-end random access memory system | |
| CN106406752A (en) | Method for integrally migrating and storing batch test data by optical module | |
| JP4886420B2 (en) | Relay connection unit | |
| TWI488043B (en) | Accelerated access apparatus and reading and writing methods thereof | |
| US7783796B2 (en) | Method for releasing data of storage apparatus | |
| US20170331768A1 (en) | Switch and data accessing method thereof | |
| US6963955B1 (en) | Scattering and gathering data for faster processing | |
| CN105337898A (en) | Double-cache message processing method with control information separated from data | |
| CN117762329A (en) | Video data storage method, device, computer equipment and storage medium |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |