CN112804178A - Method for solving joint frame synchronization and carrier phase ambiguity in high-speed data transmission - Google Patents
Method for solving joint frame synchronization and carrier phase ambiguity in high-speed data transmission Download PDFInfo
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Abstract
The invention provides a method for solving a combined frame synchronization and carrier phase ambiguity value in high-speed data transmission, which comprises the following steps: for received signal rkSolving the signal phase through an inverse trigonometric function to obtain a symbol phase; carrying out serial-parallel conversion on the symbol phase sequence, and sending the symbol phase sequence into a data preparation module to form N continuous cache data blocks; sending N parallel cache data blocks and S phases of local pilot symbols to N correlation detectors; the correlation detector determines the phase correlation value C between the received data and the local pilotK(ii) a The real part and the imaginary part of the last step output are compared with two thresholds lambda0、λ1Comparing to obtain the initial position of the data frame and the estimated value of the phase ambiguity value; after the estimation results of the initial position and the phase ambiguity value of the data frame are obtained, sending the frame synchronization peak pulse result to a protection module; the phase of the received symbol is corrected using the estimated value of the phase ambiguity value. The invention simplifies the frame synchronization algorithm, not only can reduce the operation complexity, but also can simultaneously estimate the phase fuzzy value.
Description
Technical Field
The invention relates to the technical field of wireless communication synchronization, in particular to a method for solving joint frame synchronization and carrier phase fuzzy value in high-speed data transmission.
Background
In digital communication, the purpose of any receiver is to recover the original information of the transmitting end as correctly as possible, reducing the error rate. In this sense, the best receiver is the one that minimizes the probability of transmission bit errors.
In packet-based communications (such as communications systems employing LDPC block coding techniques), data streams are typically transmitted in a pre-arranged order, so whether a receiver can detect the start of each data frame is critical to signal demodulation and information recovery, and this process of detecting the start of a data frame is referred to as frame synchronization. Most frame synchronization methods operate in a data-assisted (DA) mode, i.e., utilize known pilot information in the data frame to assist in performing the frame synchronization.
MPSK modulation has been widely used in the field of communications, and the most important demodulation methods are coherent demodulation and noncoherent demodulation. Compared with coherent demodulation, non-coherent demodulation has poor performance, but the phase ambiguity problem of the MPSK signal must be solved when coherent demodulation is carried out. In order to effectively solve the phase ambiguity problem, Cacciamani et al propose a phase ambiguity resolving algorithm based on a Maximum Likelihood (ML) criterion, but the method cannot simultaneously meet the requirements of frame synchronization. The traditional frame synchronization algorithm is generally implemented by inserting a pilot sequence at the beginning of data frame transmission, and the most common synchronization method is to perform correlation operation on received data and local pilot, and such methods are generally based on complex multiplication and have high complexity.
Although a few documents have appeared for the frame synchronization problem or the phase ambiguity value solution problem, few documents relate to the problem of combining frame synchronization and phase ambiguity value solution, especially in high speed data transmission systems.
Disclosure of Invention
The invention provides a method for solving the combined frame synchronization and carrier phase fuzzy value in high-speed data transmission aiming at the constant envelope characteristic of MPSK modulation, simplifies the frame synchronization algorithm, can reduce the operation complexity and can estimate the phase fuzzy value at the same time.
A method for solving the combined frame synchronization and carrier phase ambiguity in high-speed data transmission comprises the following steps:
step 1: for received signal rkThe signal phase is obtained by an inverse trigonometric function to obtain a symbol phase pk=arg(rk);
Step 2: for symbol phase sequence { pkPerforming serial-to-parallel conversion, and sending the converted data into a data preparation module to form N continuous cache data blocks { buf }nTherein of
And step 3: parallel N-way cache data block { bufnS phases of pilot symbols and local pilot symbolsSending the signals to N paths of correlation detectors;
and 4, step 4: correlation detector according to equation (7) for { bufnAndperforming correlation operation to obtain phase correlation value C between the received data and local pilot frequencyK:
Where K is the true start position of the pilot sequence in the data frame, S is the length of the pilot sequence, rK+iIs received data, p, corresponding to the pilot positionK+i=arg(rK+i) Is the corresponding phase, θiThe phase value of the local pilot frequency symbol is represented, and theta is a phase ambiguity value;
and 5: the real part and the imaginary part of the output of the step 4 are compared with two thresholds lambda0、λ1Comparing to obtain the initial position of data frame and the estimated value of phase ambiguity
Step 6: after the estimation results of the initial position and the phase ambiguity value of the data frame are obtained, sending the frame synchronization peak pulse result to a protection module so as to reduce the probability of false synchronization and missing synchronization;
and 7: using estimated values of phase ambiguity valuesAnd correcting the phase of the received symbol so as to complete the joint frame synchronization and phase ambiguity resolution.
WhereinTo correct the phase of the symbol after the phase ambiguity value,to correct the sign after the phase ambiguity value.
Further, the working process of the protection module in step 6 is as follows: and when X times of peak pulses are continuously detected, determining synchronization, and when X times of peak pulses are not continuously detected, determining desynchronization.
The invention uses a simplified phase correlation algorithm, which only uses the phase difference between the receiving symbol and the local pilot frequency symbol, and achieves the purpose of simultaneously realizing the joint frame synchronization and the phase fuzzy value detection by introducing two threshold values, and designs a parallel realization structure suitable for a high-speed data transmission system for the method; matlab simulation and FPGA realization results show that the algorithm can achieve the expected effect of combining frame synchronization and phase ambiguity resolution. In addition, the algorithm has certain universality, and different MPSK modulation orders and different transmission rates can be adapted by adjusting the threshold value and realizing the number of paths in parallel.
Drawings
FIG. 1 shows the correlation peak | C of the present inventionKA detection schematic diagram;
FIG. 2 is a logic for joint detection and decision of 8PSK frame synchronization start position and phase ambiguity value according to the present invention;
FIG. 3 is a schematic diagram of a high-speed parallel implementation of the present invention for implementing joint frame synchronization and phase ambiguity resolution;
FIG. 4 is a schematic diagram of the operation of the frame synchronization protection module according to the present invention;
FIG. 5 is a diagram of Matlab simulation effect of combining frame synchronization and phase ambiguity resolution according to the present invention;
FIG. 6 is a diagram of the effect of combining frame synchronization and phase ambiguity resolution for FPGA implementation.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
System model
The invention takes MPSK modulation as an example, and assumes that the received signal has already finished ideal symbol timing and carrier synchronization, so the received signal rkCan be expressed as:
whereinIs the transmitted kth MPSK baseband symbol, wkIs additive complex Gaussian white noise (AWGN) that is independent of each other in the in-phase and quadrature components and has the same variance N0/2. Theory of thingsUnder ideal conditions, ak1 represents the constant envelope characteristic of MPSK;the phase of the kth MPSK symbol is in a phase range corresponding to the M constellation points, and the phase corresponding to each k has different values;is the phase ambiguity to be estimated, its range of values and phikSimilarly, the difference is that when the channel environment is ideal, Θ generally remains stable, and the phase value corresponding to each k is the same.
It is assumed that the length of data transmitted per frame is L, that is, each L MPSK symbols constitute 1 frame, and each L symbols are composed of a pilot sequence with length S and an effective data sequence with length L-S. The local pilot replica at the receiving end can be denoted asWherein m isiAnd thetaiCorresponding to the amplitude and phase of the ith pilot symbol, respectively.
It is therefore the task of the invention to derive the symbol data r from a sequence of received symbolss+1rs+2...rs+Lrs+L+1...rs+2LThe start position of the data frame and the phase ambiguity value theta are determined.
Frame synchronization and phase ambiguity resolution
Since m-sequences have good autocorrelation characteristics, the present invention selects m-sequences with length S as pilots, and maps 0 and 1 in the m-sequences to symmetric constellation points of the MPSK constellation, respectively, i.e., their phase difference is 180 degrees. The conventional maximum likelihood estimation method is as follows:
where K is the detected value of the start position of the data frame, [ theta ] is the corrected value of the phase ambiguity value, rK+ie-jΘ′I.e. expressed as rKAs a received sequence rkThe frame synchronization of (E) } detects the start position and performs e on it-jΘ'Correction of the phase ambiguity value.Indicating the operation of the real part. cor-K,Θ'Represents the correlation value when the frame start position is K and the phase ambiguity value is theta',that is, the correlation value corK,Θ'The maximum corresponding frame start position is K, the phase ambiguity value is theta' as the estimated values of the frame start position and the phase ambiguity value
Because the MPSK signal has the constant envelope characteristic, the invention can simplify the signal amplitude component in the formula (3) to obtain:
in combination with equations (2) and (4), a normalized correlation peak is sought to obtain an estimate of the frame start position and the phase ambiguity valueThe most straightforward approach is to make [ K, Θ 'for each possible pair']Combine, perform correlation value calculation, and then make the maximum correlation value correspond to [ K, Θ']Combined pair as an estimate of frame start position and phase ambiguity valueHowever, the complexity of the exhaustive search method is still too high, and the method adopts the method based on double thresholdsA simplified method of decision.
(III) Joint frame synchronization and phase ambiguity solution method based on double-threshold judgment
Firstly, the received signal sequence r is directly corrected without phase ambiguity correctionkWith a local pilot replicaCarrying out correlation:
as can be seen from the detection result of the correlation peak shown in fig. 1, | CKThe | peak value appears at the real frame start position, i.e. theThe position of (a). Wherein, the 4 subgraphs with different colors respectively correspond to four different phase ambiguities, and it can be seen that: the position where the correlation peak appears is independent of the phase ambiguity value Θ, i.e. the phase ambiguity does not affect the detection of the correlation peak. How the phase ambiguity estimation is performed is analyzed as follows:
assuming that K is the real starting position of the pilot sequence in the data frame, the received data corresponding to the pilot position can be expressed as:
substituting it into equation (5) can obtain:
from the above equation, the absolute value | C of the correlation peak can be seenKThe l is independent of the phase ambiguity value theta, but the phase is determined by theta, so that the real part and the imaginary part of the l are changed along with the change of theta. Thus the correlation value C can be adjustedKIs compared with two thresholds toThe starting position of the data frame and the phase ambiguity value are judged.
For example, 8PSK, (1) C if Θ is 2 π m/4, m is 0,1,2,3KConsisting of only real or imaginary parts. The absolute value of the real or imaginary part (almost equal to S) should be larger than the decision threshold, set to λ0. (2) If Θ is 2 π (m +1)/4, m is 0,1,2,3, then C is presentKIs composed of a real part and an imaginary part. So the absolute values of the real and imaginary parts (almost equal to)) Should be greater than the set second threshold, an embodiment of the invention sets to λ1. From the above analysis it can be seen that the decision method is actually described as relating the real and imaginary parts of the correlation values to two thresholds λ respectively0、λ1 The comparison is performed and the logical relationship is determined as shown in fig. 2. By comparing the two thresholds with the real and imaginary parts, estimates of the start position and phase ambiguity value of the frame can be easily derivedThe result is used to perform frame synchronization and phase ambiguity resolution (phase correction) on the original received data, as shown in the following equation:
compared with the traditional search method shown in equation (2), the joint decision method according to equation (7) and fig. 2 greatly reduces the computational complexity, and brings great convenience to the realization of the function on chips such as an FPGA (field programmable gate array).
(IV) high-speed parallel realization structure for realizing combined frame synchronization and phase ambiguity value solution
Aiming at the realization problem of combining frame synchronization and phase ambiguity value solution in a high-speed data transmission system, the invention designs a method based on FPThe structure of the N-way parallel implementation of the GA is shown in fig. 3. The parallel implementation structure comprises N correlation detectors, as shown in formula (7), which perform simplified correlation operation on the phase of the local frame synchronization pilot sequence and the phase of the received data, and determine by looking up the table shown in FIG. 2 according to the values of the real part and the imaginary part, thereby detecting the frame synchronization start position and the phase ambiguity value at the same timeThe specific working process is as follows:
firstly, carrying out serial-parallel conversion on a received symbol phase so as to reduce the data rate from Rs to Rs/N, thus ensuring that a subsequent module can work at a lower processing speed;
secondly, parallel symbols obtained by the serial-parallel conversion processing enter a data preparation module to form N paths of continuous cache data blocks { bufnTherein of
Then, the data block { buf is cachednSending the S phases of the local pilot symbols and the S phases to an N-path correlation detector, detecting the initial position and the phase ambiguity value of the frame by combining 2 threshold values, and sending the frame synchronization result to a frame synchronization protection module when the initial position and the phase ambiguity are obtained, wherein the protection logic can be described as follows: when X times of peak pulses are continuously detected, synchronization is determined, and when X times of peak pulses are not continuously detected, synchronization is determined, and as shown in fig. 4, the probability of false synchronization and missing synchronization is reduced.
Finally, the phase of the received symbol is corrected with the phase ambiguity, thereby completing the joint frame synchronization and phase ambiguity resolution.
With reference to the above description, an embodiment of the present invention provides a method for solving a joint frame synchronization and carrier phase ambiguity in high-speed data transmission, including the following steps:
step 1: for received signal rkThe signal phase is obtained by an inverse trigonometric function to obtain a symbol phase pk=arg(rk);
Step 2: for symbol phase sequence { pkPerforming serial-to-parallel conversion, and sending the converted data into a data preparation module to form N continuous cache data blocks { buf }nTherein of
And step 3: parallel N-way cache data block { bufnS phases of pilot symbols and local pilot symbolsSending the signals to the N paths of correlation detectors together to execute the step 4;
and 4, step 4: correlation detector according to equation (7) for { bufnAndperforming correlation operation to obtain phase correlation value C between the received data and local pilot frequencyK:
Where K is the true start position of the pilot sequence in the data frame, S is the length of the pilot sequence, rK+iIs received data, p, corresponding to the pilot positionK+i=arg(rK+i) Is the corresponding phase, θiThe phase value of the local pilot frequency symbol is represented, and theta is a phase ambiguity value;
and 5: the real part and the imaginary part of the output of step 4 are compared with the two thresholds lambda shown in FIG. 20、λ1Comparing to obtain the initial position of data frame and the estimated value of phase ambiguityWherein λ0Can take the value of 0.7S, lambda1Can take values
Step 6: after the estimation results of the initial position and the phase ambiguity value of the data frame are obtained, sending the frame synchronization peak pulse result to a protection module so as to reduce the probability of false synchronization and missing synchronization; the working process of the protection module is shown in fig. 4, and can be described as follows: when X times of peak pulses are continuously detected, synchronization is judged, and when X times of peak pulses are not continuously detected, synchronization is judged.
And 7: using estimated values of phase ambiguity valuesAnd correcting the phase of the received symbol so as to complete the joint frame synchronization and phase ambiguity resolution.
WhereinTo correct the phase of the symbol after the phase ambiguity value,to correct the sign after the phase ambiguity value.
Simulation and realization results:
the joint frame synchronization and phase ambiguity resolution algorithm is simulated through matlab, and the result is shown in fig. 5, wherein the first line represents the absolute value of correlation, and the second line represents the initial position after frame synchronization. It can be seen that it can detect the correct starting point. The third row shows the working of the frame sync plus protection module to reduce the probability of false and missed syncs. The last row is the actual frame sync flag (start position of the frame) after the protection module.
Taking two parallel structures as an example, it is described that the FPGA chip is used to implement the functions of combining frame synchronization and phase ambiguity resolution in parallel, and the results obtained by chipscope are shown in fig. 6. Wherein the numbers pha0 and pha1 represent two paths of phase information after serial-parallel conversion; flag _ af _ syn represents a flag bit after frame synchronization, and the bit width is 2 bits because two paths of parallel processing are performed; p0_ af _ syn and p1_ af _ syn represent phase information after correction of the phase ambiguity values. Therefore, frame synchronization is realized, phase ambiguity solution is realized, and simultaneously, the data processing rate can be reduced through the parallel processing, so that the application in a high-speed data transmission system is realized.
Matlab simulation and FPGA realization results show that: the method provided by the invention can effectively complete the functions of combining frame synchronization and phase ambiguity value solution.
The above description is only an embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (3)
1. A method for solving the combined frame synchronization and carrier phase ambiguity in high-speed data transmission is characterized in that: the method comprises the following steps:
step 1: for received signal rkThe signal phase is obtained by an inverse trigonometric function to obtain a symbol phase pk=arg(rk);
Step 2: for symbol phase sequence { pkPerforming serial-to-parallel conversion, and sending the converted data to a data preparation module to form N continuous cache data blocks { buf }nTherein of
And step 3: parallel N-way cache data block { bufnS phases of pilot symbols and local pilot symbolsSending the signals to N paths of correlation detectors;
and 4, step 4: correlation detector according to equation (7) for { bufnAndperforming correlation operation to obtain phase correlation value C between the received data and local pilot frequencyK:
Where K is the true start position of the pilot sequence in the data frame, S is the length of the pilot sequence, rK+iIs received data, p, corresponding to the pilot positionK+i=arg(rK+i) Is the corresponding phase, θiThe phase value of the local pilot frequency symbol is represented, and theta is a phase ambiguity value;
and 5: the real part and the imaginary part of the output of the step 4 are compared with two thresholds lambda0、λ1Comparing to obtain the initial position of data frame and the estimated value of phase ambiguity
Step 6: after the estimation results of the initial position and the phase ambiguity value of the data frame are obtained, sending the frame synchronization peak pulse result to a protection module so as to reduce the probability of false synchronization and missing synchronization;
and 7: using estimated values of phase ambiguity valuesAnd correcting the phase of the received symbol so as to complete the joint frame synchronization and phase ambiguity resolution.
3. The method of claim 1 for joint frame synchronization and carrier phase ambiguity resolution in high speed data transmission, wherein: the working process of the protection module in the step 6 is as follows: and when X times of peak pulses are continuously detected, determining synchronization, and when X times of peak pulses are not continuously detected, determining desynchronization.
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